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Gowin FPGAs are featured at Maker Faire as a tool for scalable education.
The Verilog Meetup, a group that gathers at Hacker Dojo in Silicon Valley, will showcase Gowin FPGA board setups at Maker Faire in Vallejo, California, from October 18 to 20. These boards will be programmed with educational examples created by the Verilog Meetup team, which are already being used at numerous universities. The team believes they can extend this reach to K12 education, while also helping university graduates prepare for job interviews in the tech industry.
Introducing FPGA boards into K12 education has always posed challenges. EDA software was often too complex for high school students, and basic projects with buttons and LEDs didn't engage students. Verilog Meetup addressed this by creating simple push-button scripts for FPGA synthesis and developing sound and graphics-based examples that allow students to design games on LCD screens. In doing so, they aim to make FPGAs as approachable and interactive as Arduino did for microcontrollers.
Another key goal of Verilog Meetup is to equip graduate students with skills for technical job interviews by providing microarchitecture examples that mimic interview challenges. These include topics like pipelining, FIFO queues, flow control, and CPU stalls. Gowin FPGAs are ideal for this purpose due to their fast synthesis times and scalability. Gowin offers affordable options like the Tang Nano 9K, as well as higher-capacity boards like the Tang Mega 138K, which can support advanced projects like a synthesized superscalar CPU core or even clusters of cores, running Linux with memory management and cache features.
To see live demos, visit the Verilog Team's booth at Maker Faire or check out their entry page at https://makerfaire.com/maker/entry/75973/. You can also join Verilog Meetup sessions every Sunday at Hacker Dojo in Mountain View, California, from 11 a.m. to 2 p.m. For more information, visit http://verilog-meetup.com and explore their FPGA products and solutions.
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