Openings for Physical Design , RTL, Verification and Circuit Design -Bangalore

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Chakri jayant

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Apr 5, 2013, 12:42:00 AM4/5/13
to Semiconductor Jobs
Dear Friends

Can you please share your resume if you are looking for change


Work Location :Bangalore


8+ years of RTL design experience in Verilog.

Good understanding of synthesis and implementation flows

Experience working on complex designs

Processor experience a plus



· Verification ( 3+ yrs)-15yrs

· PD:- (2+ yrs)-15yrs

· Digital Circuit Design ( 3+ yrs) : VERY CRITICAL

· Standard Cell-3-5

·
Job Category: Digital Circuit Design

Qualification: Masters in Electrical/Electronics Engineering

Experience required: 3-7 years

Desired skills:

- Solid understanding of transistor level fundamentals especially the
switching characteristics of transistors and inverters.

- Different regions/modes of operation of CMOS devices, sizing of
basic CMOS gates and realization of logic using transistors.

- Solid understanding of sequential elements like flip-flops, latches
and clock-gaters.

- Strong understanding of static timing analysis (setup/hold) in
digital circuits.

- Hands-on experience in transistor level simulations, preferably
spice/spectre simulations

- Good knowledge of RC characteristics of interconnect, and concepts
of crosstalk and electromigration.

- Familiarity with any HDL language, preferably Verilog

- Experience in custom clock tree networks and clock divider circuits
is a plus


Physical design


Core PD Job description
Academic Credentials:
Bachelor , Master’s or PhD in (Micro) Electronics from reputed
institutes

Experience–2-10 years of experience in logic implementation /
physical design / Electrical Analysis / Macro design

Hands on working exposure to Synthesis and/or Custom design in
500Mhz-2Ghz frequency

Exposure to Design Compiler, IC Compiler , Z Route, Timing using
PT/PTSI, Physical verification

Should have gone through one or more tape outs in 40nm and beyond

Electrical Analysis including Em/IR (Apache), Signal EM, Noise
analysis (PTSI-Noise)

Clock grid design, analysis

Macro design & analysis

Exposure to basic circuit simulation using Hspice etc, critical
path analysis, repeater analysis. Memory design is an desirable

Good understanding on low power design optimization techniques

Scripting using PERL, TCL

Regards

chakri




HEMAL NAYAK

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Jan 10, 2014, 10:46:21 AM1/10/14
to semicondu...@googlegroups.com
To The recruiter,

Hello sir..!!
My self Hemal nayak,Ahmedabad.I did Master of engineer in Electronics & communication with specialise in VLSI system design.


I have hands-on experience in all SYNOPSYS tools including VCS,DC,ICC,TETRAMAX.
key skills: Verilog,System verilog,Verification,Synthesis,Physical Design

I am very much interested to work in your company for this position. 
I believe my skills make me an ideal candidate for this role.
I am very curious for new technologies and its real implementation.I possess good programing skills and innovative nature.
I want to join fast growing VLSI industry to give my best and learn more.

I look forward to speaking with you soon about this position.
Thank you for your consideration.

I have attached my cv here.

With Best regards,
Hemal Nayak
Hemal Nayak cv.pdf
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