Exciting Oppurtunity with Top Semiconductor Services Company - Please send across your resume

[Chakri jayant]

Dear  Group members

 

 

I  Request you to  send across your resume ASAP as i am in process of closing positions by  March end  with my clients into Semiconductor Domain

 

  Analog  Layout:3+yrs

·         Standard cell layout:3+YRS

·         PD:3+yrs

·         CAD:3+yrs

Sl.No.	Description	Skill set	Experience
1	Power aware design implementation	Strong understanding of concepts in UPF and CPF Understanding of power aware libraries (UPF .libs) Experience in developing flows and methodologies for implementing UPF/CPF based floorplanning, level shifter implementation, switch cell placement Hands on expertise in low power Place and Route Knowledge in Power aware synthesis Knowledge in CLP Excellent skills in scripting - Perl, Tcl	5+ yrs
2	Power aware verification	Strong understanding of concepts in UPF and CPF Understanding of power aware libraries (UPF .libs) Knowledge in Power aware verification Knowledge in CLP Excellent skills in scripting - Perl, Tcl	5+ yrs
3	ECO flow development	Excellent skills in scripting - Perl, Tcl Understanding of the ECO process - funactional and timing ECO flow development and implementation Experience with Verdi tool	5+ yrs
4	20 nm technology setup	Excellent skills in scripting - Perl, Tcl Strong understanding of the PD concepts - library development , technology file setup Understanding and creating rule decks for 20nm process Experience with ICC, Olympus	5+ yrs
5	Emulation in Cadence Palladium/ Mentor Veloce/Synopsys EVE	Knowledge in Emulation concepts Experience with any one of the following tools Cadence Palladium/ Mentor Veloce/Synopsys EVE Knowledge in Perl, Tcl

 

 

·