Z80 CPU Board Questions

149 views
Skip to first unread message

smb...@gmail.com

unread,
Jan 30, 2023, 2:01:05 AM1/30/23
to SEBHC
I finally finished my Z80 CPU Board. A little late (plan was to get this done over Christmas) but I got distracted with a few things... :)

1) Am I correct in assuming that the H17 only works at 2MHz ? I tried the other speeds, but could not get them to boot. I would not be surprised if there are loops in the H17 code that are tuned to a specific CPU speed.

2) Is the CPU speed setting persisted? If someone wants to run faster, do they have to change it on each boot?

3) I seem to recall the front panel has provision for LEDs to indicate CPU speed. Is there a way to connect them to the Z80 board? Or is that only for the Z180 board?

4) It looks like one purpose of the DUART piggyback board is to substitute 2X 16550 for 1X 162550. Was this primarily due to parts availability? or are there other reasons?

5) I had one incident where I could not get the H17 to work again until physically repowering the computer. Resetting and fussing with the speed alone did not resolve the issue. Anyone else experience this?

6) Finally, an observation -- a respin of the board with MAX202/MAX232 drivers and 10-pin serial headers would be nice, allowing elimination of the +/- 12V regulators.

I am running the h8mon2-v2.0b24.rom image

Scott

Glenn Roberts

unread,
Jan 30, 2023, 4:19:19 AM1/30/23
to se...@googlegroups.com
H17 operates only at 2mhz. Ken Owen did patches to HDOS device driver and CP/M BIOS to automatically do temporary speed drops when drives are accessed. Not sure where those live…

I set the speed every time. Not sure if there’s a setting in Douglas’ ROM code to always run at high speed? The newer OSes have batch scripts that you can use at boot time to set speed.

In its original incarnation, the CPU speed was controlled by a separate board, which had LEDS to show setting. I believe that logic is now on the System Support board. The new front panel CPU board can accommodate the LEDs with a ribbon cable to the System Support board.

Norberto can best answer the DUART daughterboard question.

I recently had trouble using the h17 piggyback board when I was trying to make an H8D image for the VDIP software. However I never had issues with the same board in Big Blue, so most likely operator error of some sort…

Sent from my iPad

On Jan 30, 2023, at 2:01 AM, smb...@gmail.com <smb...@gmail.com> wrote:

I finally finished my Z80 CPU Board. A little late (plan was to get this done over Christmas) but I got distracted with a few things... :)
--
You received this message because you are subscribed to the Google Groups "SEBHC" group.
To unsubscribe from this group and stop receiving emails from it, send an email to sebhc+un...@googlegroups.com.
To view this discussion on the web visit https://groups.google.com/d/msgid/sebhc/9b3e9a5a-7c1a-47cf-a7c0-2fae9e78ef12n%40googlegroups.com.

Douglas Miller

unread,
Jan 30, 2023, 8:22:45 AM1/30/23
to se...@googlegroups.com

The speed control always reverts to 2MHz on RESET, which is probably a good thing. It is possible to add a byte to the EEPROM config space for speed, I forget if we had good reasons not to do that. It is somewhat "safer" to always start out at the slower speed, but with the "all in one" CPU board known to run at all speeds, seems like you could always slow the speed down before booting (etc) if you were having problems elsewhere. Something we might discuss. I don't believe it would be possible to "brick" the machine if something went wrong, but there still might be situations where you have to pull the EEPROM out a reprogram it outside the machine (e.g. can't use vflash or the config command if the system is not working).

"b24" is a pretty old version of the monitor. I recently "released" the latest version as "2.0" (should be the same as "b32"). http://sebhc.durgadas.com/mms89/h8mon2/. For the Z80 with front panel, you want "h8mon2-v2.0.rom".

Regarding DUART and 16'2550 parts, one issue was a change in those parts to how interrupts are enabled, which caused some legacy software to fail (requiring an extra bit to be set before interrupts worked). I'm not sure if there were other reasons as well. This difference between 16'550 and 16'2550 makes no sense to me, but we're stuck with it.

Douglas Miller

unread,
Jan 30, 2023, 8:38:58 AM1/30/23
to se...@googlegroups.com

On the speed config question, Norberto and I recently discussed adding WAIT state config for the Z180 board, another case where you might get into trouble and "brick" the machine. We decided that this one was OK *because* the board always reverted to 2MHz (where 0-WAIT states still works - always). So, if you also allow CPU speed to be configured to a high value, then it would be possible to "brick" the H8-Z180 if one sets the configs for high CPU speed and 0-WAIT states.

norberto.collado koyado.com

unread,
Jan 30, 2023, 4:20:01 PM1/30/23
to se...@googlegroups.com
The main issue with the 16’2550 was the interrupt circuit that was different than the 8250. You can only run CP/M 2.2.03 as it doesn’t use interrupts. HDOS and CP/M 2.2.04 will hang waiting for the interrupt to occurred.

From: se...@googlegroups.com <se...@googlegroups.com> on behalf of Douglas Miller <durga...@gmail.com>
Sent: Monday, January 30, 2023 5:22:32 AM
To: se...@googlegroups.com <se...@googlegroups.com>
Subject: Re: [sebhc] Z80 CPU Board Questions
 

norberto.collado koyado.com

unread,
Jan 30, 2023, 4:26:40 PM1/30/23
to se...@googlegroups.com
The Z80 board has a jumper to enable only 2MHz on the H8 bus, even if the CPU is running at 16MHZ. The new full size H17 board will use such capability. The only thing to do is to recalculate the values for the timing constants. This is too much work. It is easier to change the speed to 2MHz and call it good. 

From: se...@googlegroups.com <se...@googlegroups.com> on behalf of norberto.collado koyado.com <norberto...@koyado.com>
Sent: Monday, January 30, 2023 1:19:55 PM

glenn.f...@gmail.com

unread,
Jan 30, 2023, 4:59:16 PM1/30/23
to se...@googlegroups.com

So with 2Mhz on the bus does this mean we might be able to use the H17 at higher CPU speeds?

Terry Smedley

unread,
Jan 30, 2023, 5:34:25 PM1/30/23
to SEBHC
I posted this a while back.  It's a study that Trionyx commissioned from Tom Jorgensen (Software Wizardry) to compute the H17 timing constants for the Trionyx Z-H8 CPU board at speeds other than 2MHz.  There are several constants that need to be computed for each combination of CPU speed and wait states.  

As Norberto says, just use the "gear shifter" code.  As far as I can see, that works flawlessly with any CPU speed up to 16MHz.  Besides, if you're using your Blinkenlights controller and the front panel speed LEDs, you get the pleasure of seeing the CPU toggle between speeds with each H17 access.

tas
Trionyx_Jorgenson_4MHz.pdf

smb...@gmail.com

unread,
Jan 30, 2023, 5:50:37 PM1/30/23
to SEBHC
Where is this "gear shifter" code found? I assume it entails both a set of drivers (for HDOS and CP/M) as well as a new ROM for booting?

Thanks,
Scott

glenn.f...@gmail.com

unread,
Jan 30, 2023, 7:02:39 PM1/30/23
to se...@googlegroups.com

I think most of Ken’s work on “gear shifting” (i.e. slowing down the clock during disk access and then restoring it) is captured here:

https://koyado.com/Heathkit/H-8_Speed_Mod.html

               

toward the bottom of the page.

 

he modified the QuikStor BIOS for CP/M and the HUG SY: device driver for HDOS

 

  • Glenn

smb...@gmail.com

unread,
Jan 30, 2023, 8:26:32 PM1/30/23
to SEBHC
Okay, this all makes sense. It's not necessary to do anything with the ROM, because you leave it in 2 MHz until the OS is booted, then you gearshift to turbo while using the modified driver in the OS.

Scott

glenn.f...@gmail.com

unread,
Jan 30, 2023, 8:41:36 PM1/30/23
to se...@googlegroups.com

To be clear, to shift to high speed there’s a short program (SPDSBC) that you execute from the command line. We have CP/M and HDOS versions.  You can put it in your boot up batch file.  Then when you execute any command or program that hits the H17 drive Ken’s mod’s cause it to “downshift” for the duration of the access…

 

Have you found the SPDSBC code?  Doug has a CP/M version (I *think* the latest from him is attached, attachment 1). The speed program has changed across the various versions of the CPU board.  I *think* attachment 2 is my version for HDOS.  The trick is you not only have to output to the speed port but also update a shadow copy kept in RAM (but earlier versions of the CPU board just let you update the port).

spdsbc.asm
SPDGFR.C

Douglas Miller

unread,
Jan 30, 2023, 9:11:27 PM1/30/23
to se...@googlegroups.com

The official current version is here: https://github.com/durgadas311/MmsCpm3/blob/master/util/src/spdsbc.asm. This latest version was updated to avoid calling the highest speed "10MHz", since depending on your board config it may actually be 16MHz. Instead, the setting is "MAX". There is also a version for MP/M (mpmspd.asm).

But the version Glenn attached should work for CP/M 2 and MMS CP/M 3. The current versions .COM files are here: https://github.com/durgadas311/MmsCpm3/blob/master/util/bin/spdsbc.com

As background, MMS CP/M 3 and MP/M cannot access the shadow location used by HDOS and CP/M 2 (all have a different shadow location for various reasons), so that's why there are different version. CP/M 3 and CP/M 2 are enough alike that they can be implemented in the same program.

smb...@gmail.com

unread,
Jan 30, 2023, 9:49:20 PM1/30/23
to SEBHC
Okay, I'm going to put this on my shortlist of things to figure out how to do this in my HDOS3 install. It sounds like compiling Glenn's source is my first task. I'm trying to figure out the right set of drivers from https://koyado.com/Heathkit/H-8_Speed_Mod.html to use. Looks like  HDOS302.H8SPD.FlpyDvrs.PKG.zip is probably the right file.

I'm also a little confused about which devices are affected. Certainly the H17, but what about the H37 and H67?

Also not entirely sure what a PKG file is... H8-specific archive format?

Is there a disk image somewhere that has a handy file transfer program? I could use a way to upload things, for example via xmodem.

Scott

Glenn Roberts

unread,
Jan 30, 2023, 10:04:46 PM1/30/23
to se...@googlegroups.com
It’s not easy to navigate the hodgepodge we've built over the years!

If you don’t have a functioning c/80 setup you might be better converting Doug’s assembly SPDSBC to work with HDOS. I’m sure someone (Ken?) already did this, probably somewhere on Norberto’s site.

I think the PKG is just a naming artifact. It’s probably actually a zip. We have been known to rename to .PKG to get past email screeners looking for .ZIP.

H67 definitely works fine up to at least 10mhz (as fast as I run). Not sure about the 37 as I rarely use floppys.

Ken did some writeups on transferring via serial, here:

To bring up a configuration from scratch I use the H17, creating disks via H89 LDR, then transfer VPIP and thereafter all transfers are via flash drive.

Sent from my iPad

On Jan 30, 2023, at 9:49 PM, smb...@gmail.com <smb...@gmail.com> wrote:

Okay, I'm going to put this on my shortlist of things to figure out how to do this in my HDOS3 install. It sounds like compiling Glenn's source is my first task. I'm trying to figure out the right set of drivers from https://koyado.com/Heathkit/H-8_Speed_Mod.html to use. Looks like  HDOS302.H8SPD.FlpyDvrs.PKG.zip is probably the right file.

Douglas Miller

unread,
Jan 30, 2023, 10:18:29 PM1/30/23
to se...@googlegroups.com

I've had some recent success creating HDOS executables under Linux, I could try using the same for Glenn's HDOS version of SPDSBC. But that sill leaves you with a way to get that executable onto your system. VDIP or using H8D utility are some ways. Are there changes that need to be made to Glenn's HDOS version? Isn't there already a copy of the .ABS somewhere?

Terry Smedley

unread,
Jan 30, 2023, 10:50:09 PM1/30/23
to SEBHC
Here's what I use.  Not guaranteed to satisfy purists or perfectionists.

tas
H8SPD.ABS

Terry Smedley

unread,
Jan 30, 2023, 10:50:58 PM1/30/23
to SEBHC
Meant to attach source.
H8SPD.ASM

smb...@gmail.com

unread,
Jan 30, 2023, 11:15:00 PM1/30/23
to SEBHC
As far as getting binary files across, a poor man's solution may be to use DEBUG, paste the file as a series of memory alter commands, and then save it from DEBUG. It's crude and slow, but effective.

Another answer is my Pi-Supervisor board that I mentioned a few weeks back. I have yet to test it with the Z80 board, but at least in the case of the 8080 board, I could easily stuff some binary contents into memory and then save it from DEBUG.

Scott

norberto.collado koyado.com

unread,
Jan 31, 2023, 12:04:06 AM1/31/23
to se...@googlegroups.com

Yes! Just that the disk timing constant has to be modified as the CPU will run such values faster. For 4/8/16MHZ, the values will need to be modified for each frequency and for each OS.

 

Terry, do you have the Trionyx HDOS speed program to test in my system at 4MHz with the H17?

 

Norberto

Terry Smedley

unread,
Jan 31, 2023, 12:07:00 AM1/31/23
to SEBHC
Yes, I will send you the Trionyx speed program.

tas

Mark Garlanger

unread,
Jan 31, 2023, 12:18:54 AM1/31/23
to se...@googlegroups.com
For some of those faster speeds, I don't think the current counter provides enough bits.  IIRC, it's only 8 bits, someone could update the source and make it a 16-bit counter, which should work. But just doing the speed change (since nothing usually is being done anyway, it's just a busy loop), is probably the better long-term fix.

One of timing loops, is once it reads a sector, it expects to see an sector hole before the timer expires, if it doesn't it'll be a soft-error, and it will start over looking for the sector.

norberto.collado koyado.com

unread,
Jan 31, 2023, 2:02:14 AM1/31/23
to se...@googlegroups.com

Thanks Terry!

 

Scott,

 

Finally, an observation -- a respin of the board with MAX202/MAX232 drivers and 10-pin serial headers would be nice, allowing elimination of the +/- 12V regulators.

Good suggestion, but need to be backwards compatible with the Heathkit 15 pin serial port cables as they can be used on the H8-4 board as well. I did add this idea onto the H8-Z5-5 tape backup storage board as it was a complete new board with new capabilities.

 

Norberto

Terry Smedley

unread,
Jan 31, 2023, 2:25:14 AM1/31/23
to SEBHC
Norberto (and anyone else who might be interested):

Here is the speed change utility as supplied by Trionyx.   It patches the H17 timing constants based on the values it reads from the Trionyx CPU configuration switch for wait states and the CPU speed register.    Taken without modification off the Trionyx Z-H8 distribution floppy (conveniently stored in Glenn's JukeBox).
README.DOC
SPEED.ASM
SPEED.DOC
SPEED.ABS

Glenn Roberts

unread,
Jan 31, 2023, 6:34:29 AM1/31/23
to se...@googlegroups.com
Fascinating approach. Very clever. Could this be used on our z80 boards? Not sure it would scale to higher speeds or if we can determine wait states being applied? Tom did some very innovative work back then!

Sent from my iPad

On Jan 31, 2023, at 2:25 AM, Terry Smedley <terry....@gmail.com> wrote:

Norberto (and anyone else who might be interested):
To view this discussion on the web visit https://groups.google.com/d/msgid/sebhc/30eb4d6a-2782-42e4-a1c7-274f19beb303n%40googlegroups.com.
<README.DOC>
<SPEED.ASM>
<SPEED.DOC>
<SPEED.ABS>

norberto.collado koyado.com

unread,
Jan 31, 2023, 12:13:00 PM1/31/23
to se...@googlegroups.com

Thanks Terry!

 

We will need software to re-calculate such timing constants under HDOS for the different CPU speeds. I think Douglas’ simulator will be handy here.

 

DB          20,16,20,20,80                  2 MHz operation default

DB          46,47,48,46,164                4 MHz, no waits set

DB          xx,xx,xx,xx,xx                      8 MHz

DB          xx,xx,xx,xx,xx                      10 MHz

DB          xx,xx,xx,xx,xx                      16 MHz

 

Will this work for HDOS? As speed doubles I can make linear calculations, but not for 10MHz.

 

WRITA

WRITC

WHDA

WNHA

WSCA

SPEED

20

16

20

20

80

2mhz

46

47

48

46

164

4mhz

72

78

76

72

248

8mhz

98

109

104

98

332

16mhz

X

X

X

X

X

10mhz

 

D.WRITA       040.112      Times the period during WRITE's from
                               when a sector is located until the
                               sync pattern is to be written.

 

D.WRITC       040.114      Times the period from when the sync
                               pattern is first called to be written
                               until the first pattern byte is output.

 

D.WHDA        040.123      Times the period from when a hard sector
                               hole is detected until the WHD (wait
                               for hole detect) routine returns to its
                               caller.

 

D.WNHA        040.124      Times the period from when a no-hole is
                               verified until the WNH (wait for no-hole)
                               routine returns to its caller.

 

D.WSCA        040.125      Timeout counter for a missing sync byte.

 

Norberto

Mark Garlanger

unread,
Jan 31, 2023, 12:59:44 PM1/31/23
to se...@googlegroups.com
Those numbers look off. And these are only 8 bit values so once it's above 255, it's not going to work.

Looking at the first one - writA, to handle 2 more MHz, the counter was increased by 26, but going from 4 -> 8, is 4 MHz, so at a minimum it would need to be increased by 52 (26*2). Same issue with the other values in the table.

Another thing, every one of the counters increased by more than 2x going from 2 MHz to 4 MHz, that probably has to do with the time for the code to set up the counters going faster on the faster processors. For example, writA needed 30% increase over just doubling the 2 Mhz speed. There may be a need to increase more than double when doubling the speed to account for this.

As for using emulators for testing, it will depend on how accurate the virtual drive/disks are modeled. For example when I was working on my emulator, I was able to get reads working, or so it seemed. It wasn't until I ran TEST17.ABS, that I saw a ton of soft-errors. I tracked it down to my code not waiting the proper amount of time between characters. I had the timing of the sector holes, accurate. But once it started reading a sector, I just returned the next byte upon every request. The problem was the code finished reading the sector much quicker than a real disk. The code assumed after reading the sector, the next sector hole would occur within a fixed amount of time. I had to work on the timing of each character to make sure it would only say a character was ready when the proper amount of time had passed. We may be able to get some estimates with emulators, but testing with real drives/disks will be needed to verify the values are correct.

Mark


Terry Smedley

unread,
Jan 31, 2023, 1:12:37 PM1/31/23
to SEBHC
FWIW, my two cents worth is not to bother with any of this at all.  Switch the CPU to 2MHz for hardware H17 access.  There are proven solutions doing that for both HDOS and CP/M.  

tas

norberto.collado koyado.com

unread,
Jan 31, 2023, 4:11:13 PM1/31/23
to se...@googlegroups.com
Agree. But at least I can test 4 MHz on the new H17 just to check out the jumper's while CPU is at 4MHz and H17 is at 2MzHz clock.

From: se...@googlegroups.com <se...@googlegroups.com> on behalf of Terry Smedley <terry....@gmail.com>
Sent: Tuesday, January 31, 2023 10:12:37 AM

smb...@gmail.com

unread,
Jan 31, 2023, 8:19:34 PM1/31/23
to SEBHC
Well I seem to have broken my Z80 CPU board.

I was attempting to switch it from internal RAM to external RAM. I moved the RAM_CONFIG jumper, but not the RAM_DIS jumper. My assumption is this caused the 74HCT640 and the AS6C1008 to both use the data bus at the same time and took one or both of them out. Does this sound like a plausible explanation? I'm going to see if I can replace both ICs with spares.

Scott

smb...@gmail.com

unread,
Jan 31, 2023, 11:17:34 PM1/31/23
to SEBHC
Well that's interesting. The mismatched jumpers didn't break anything, but they did cause the EEPROM to be erased and/or corrupted.

Scott

norberto.collado koyado.com

unread,
Feb 1, 2023, 12:24:47 AM2/1/23
to se...@googlegroups.com

What you did is to enable external and internal RAM at the same time. So, during a read cycle the internal and external memory driven by the 74LS640 will be in contention and  will cause the CPU to execute the wrong code and who knows  what is going to do.

 

You can always burned a configured Z80 monitor to an EPROM if there are no plans to change it. Or write protect the EEPROM by using the jumper or using the programmer to write protect it after configuring the monitor.

 

Norberto

smb...@gmail.com

unread,
Feb 1, 2023, 1:42:56 AM2/1/23
to SEBHC
It was just an oversight of not realizing there were two jumpers -- I won't do it again. I was just surprised at the outcome.

Scott

Scott Baker

unread,
Feb 1, 2023, 4:10:20 AM2/1/23
to se...@googlegroups.com
I've fooled around with the thing again tonight, but I have no luck finding a way to transfer files to it. Even putting the 8080 board back in and using h8dutility, I can't get h8dutility to write a usable disk image for maple. H8dutility claims to write 40 tracks, but the maple disk is unreadable in HDOS. I can't seem to write any usable disks with h8dutility anymore. I even tried writing the same HDOS 3.02 images that I wrote a month or two ago. I'm at a loss with what has gone wrong with the H8 now.

Disks that I created previously remain usable.

Can someone confirm for me, when using h8dutility should I have the interrupts enabled for port 340 on the H8-4 board? I'm trying to go through everything I could have possibly done before to get h8dutility working.

Scott

Glenn Roberts

unread,
Feb 1, 2023, 5:08:50 AM2/1/23
to se...@googlegroups.com
The software does not use interrupts so no you should not have interrupts enabled on 340

Sent from my iPad

On Feb 1, 2023, at 4:10 AM, Scott Baker <smb...@gmail.com> wrote:



smb...@gmail.com

unread,
Feb 1, 2023, 1:50:15 PM2/1/23
to SEBHC
Thanks Glenn... I wish I had taken better notes when I had this working. This weekend I'll try to backtrack to exactly the same configuration I succeeded with before. I know it *did* work, so therefore I can make it work again.

Scott

norberto.collado koyado.com

unread,
Feb 1, 2023, 4:45:30 PM2/1/23
to se...@googlegroups.com
On port 340Q I always use /INT 5.

From: se...@googlegroups.com <se...@googlegroups.com> on behalf of smb...@gmail.com <smb...@gmail.com>
Sent: Wednesday, February 1, 2023 10:50:14 AM

Glenn Roberts

unread,
Feb 1, 2023, 4:46:35 PM2/1/23
to se...@googlegroups.com
We’ll there’s always this REMarks I did, but it could use some updating

There were a number of discussions here about lost bytes when transferring with a Z80, and years ago I did a version of the software that blanks the LED display while the H8 is receiving data (not an issue of course on the h89). If you have this problem the symptom is the software hangs. Since it uses task time polling (not interrupts) characters can be lost if a front panel refresh interrupt takes too long. For years I never heard from anyone else but then recently Joe reported seeing this, so I’m not sure exactly what conditions trigger this.

Sent from my iPad

On Feb 1, 2023, at 1:50 PM, smb...@gmail.com <smb...@gmail.com> wrote:

Thanks Glenn... I wish I had taken better notes when I had this working. This weekend I'll try to backtrack to exactly the same configuration I succeeded with before. I know it *did* work, so therefore I can make it work again.

Glenn Roberts

unread,
Feb 1, 2023, 4:54:52 PM2/1/23
to se...@googlegroups.com
Ok so having the INT5 jumper installed doesn’t interfere with h8dutility? Good to know. But the code does not require it or use interrupt-driven IO. I believe most xmodem transfer programs probably do.

Sent from my iPad

On Feb 1, 2023, at 4:45 PM, norberto.collado koyado.com <norberto...@koyado.com> wrote:



Joseph Travis

unread,
Feb 1, 2023, 4:55:28 PM2/1/23
to se...@googlegroups.com
I think Glenn nailed it.  The updated version of the H89LDR that he sent to me works great on my H8 with the Z80 board.  I've had no issues since.

Joe


smb...@gmail.com

unread,
Feb 1, 2023, 5:27:49 PM2/1/23
to SEBHC
My gut feeling is that bytes are being lost. For example it did seem to initialize at least part of the boot sector, and it does have part of a volume number (but not a volume name, and the number doesn't seem correct). I did have an interrupt jumper in place during this attempt.

One thing I'm going to try is to use Norberto's Tape Board's UART instead of the H8-4 and see if that makes a difference. The H8-4 is, for whatever reason, still seeming wonky and unreliable. I have patched the tape board PLD to use port 340 instead of 350, but you cannot change the interrupt. Hence my question about interrupts. So I'll just leave the interrupt jumper off.

A good test would be to send an image across, write it to disk, and then read it back. See if I end up with the same image.

Scott

glenn.f...@gmail.com

unread,
Feb 1, 2023, 7:45:18 PM2/1/23
to se...@googlegroups.com

May be missing bytes but it’s a different problem than the one I was working I think.  Because the receiver code just loops until it receives 256 bytes, if a byte was lost the code would wait forever (for the byte that’s not coming) and the transfer would hang indefinitely.

 

Perhaps you’re having H8-4 issues. Are you using 8250s or 16550s?  not sure the latter work reliably with the Heath H8-4.  Les Bird specifically advertised that his implementation of the H8-4 (from 2009!) could be used with either one.

https://sebhc.github.io/sebhc/pcbs/H8-2000_Construction.html

 

I like the idea of trying the alternate UART on the new H8-5 board.

 

 

 

 

From: se...@googlegroups.com <se...@googlegroups.com> On Behalf Of smb...@gmail.com
Sent: Wednesday, February 01, 2023 5:28 PM
To: SEBHC <se...@googlegroups.com>
Subject: Re: [sebhc] Z80 CPU Board Questions

 

My gut feeling is that bytes are being lost. For example it did seem to initialize at least part of the boot sector, and it does have part of a volume number (but not a volume name, and the number doesn't seem correct). I did have an interrupt jumper in place during this attempt.

 

One thing I'm going to try is to use Norberto's Tape Board's UART instead of the H8-4 and see if that makes a difference. The H8-4 is, for whatever reason, still seeming wonky and unreliable. I have patched the tape board PLD to use port 340 instead of 350, but you cannot change the interrupt. Hence my question about interrupts. So I'll just leave the interrupt jumper off.

 

A good test would be to send an image across, write it to disk, and then read it back. See if I end up with the same image.

 

Scott

On Wednesday, 1 February 2023 at 13:55:28 UTC-8 Joe Travis N6YPC wrote:

I think Glenn nailed it.  The updated version of the H89LDR that he sent to me works great on my H8 with the Z80 board.  I've had no issues since.

 

Joe

 

 

On Wed, Feb 1, 2023 at 4:46 PM Glenn Roberts <glenn.f...@gmail.com> wrote:

We’ll there’s always this REMarks I did, but it could use some updating

smb...@gmail.com

unread,
Feb 1, 2023, 9:24:25 PM2/1/23
to SEBHC
Glenn, you're right -- in my circumstance it is not hanging. So it must be a different problem. Perhaps rather than missing bytes, I'm getting empty bytes / zeroes in some positions.

I am using 16550 on the board. I probably do have some 8250 somewhere.

Scott

Glenn Roberts

unread,
Feb 1, 2023, 9:28:53 PM2/1/23
to se...@googlegroups.com
You built this board though, right? Not an original Heath board? If you built it you must have used Les’ design from 2009? In which case the 16550 should work, but swapping in an 8250 couldn’t hurt…

Sent from my iPad

On Feb 1, 2023, at 9:24 PM, smb...@gmail.com <smb...@gmail.com> wrote:

Glenn, you're right -- in my circumstance it is not hanging. So it must be a different problem. Perhaps rather than missing bytes, I'm getting empty bytes / zeroes in some positions.

smb...@gmail.com

unread,
Feb 1, 2023, 9:38:12 PM2/1/23
to SEBHC
Yep, and not only that, I built two of them, because the first one was wonky and unreliable (why did I think the second would be any different? I don't remember...)

Scott

glenn.f...@gmail.com

unread,
Feb 1, 2023, 9:43:56 PM2/1/23
to se...@googlegroups.com

Interesting. FWIW the one I have (“Les Bird H8-4) in “Rusty” dates back about 10 years. never a problem. 16550 UARTS…  wonder if there was some kind of fabrication issue?  Or if you don’t have the best and final gerber files? The silkscreen art on mine says “REV 1.3”

smb...@gmail.com

unread,
Feb 1, 2023, 10:07:18 PM2/1/23
to SEBHC
Rev 1.4, but it turns out the H8-4 is not to blame. (it might be to blame for other problems, but not this). I feel pretty silly.

A few days earlier I wrote HDOS_3.02_4UtlAbsBatTas.H8D to a floppy disk. It turned out there was something wrong, either with that image or with the write operation, and that disk was not readable. Exactly the same symptoms that I'm experiencing right now. I tossed it back in the pile of floppies to use again.

Like any responsible person, after I wrote that disk, and before I tried it out, because it was a system disk that I expected to never modify ... I flipped the write-protect tab on that disk.

Yep, I've spent longer than I'd like to admit trying to h8dutility an image onto a write-protected floppy. Oops.

Scott

smb...@gmail.com

unread,
Feb 1, 2023, 11:16:16 PM2/1/23
to SEBHC
I think I have one step left, and I can try > 2 MHz operation.

I need to figure out how to replace SY.DVD. It's locked, so I can't PIP a different file over the top of it. If I try to use CFLAGS to unlock it, then I get back an invalid command error. I've even tried booting from a different floppy and placing the floppy I want to modify in the SY1: drive. No matter what I try, clearing flags on SY.DVD returns an error. What am I missing?

Scott

smb...@gmail.com

unread,
Feb 2, 2023, 1:27:36 AM2/2/23
to SEBHC
One step forward and one step sideways. I figured out how to replace SY.DVD:

PIP SY.DVD=H17.DVD /FORCE

However, the gearshift drivers at https://koyado.com/Heathkit/H-8_Speed_Mod.html don't work with the Z80 board. It uses port 220Q instead of 362Q for speed control, performs read operations on the port to determine the current speed, and sets different bits than the Z80 card uses. It doesn't look like this would be too difficult to modify as the technique would be fairly straightforward:

* retrieve current port 362Q byte from the .CTL2FL memory address
* extract the speed bits (D2 and D4) and save them
* mask D2 and D4 to 0
* save back to .CTL2FL
* output .CTL2FL to port 362Q to set speed to 0
* call the disk io
* retrieve the saved speed bits and OR them back into .CTL2FL
* output .CTL2FL to port 362Q to restore speed

I take it nobody has done this already? If not, it's probably only around a dozen lines of assembly. I could see about doing it over the weekend, assuming I can figure out how to rebuild the H17 DVD.

Scott

Glenn Roberts

unread,
Feb 2, 2023, 5:29:14 AM2/2/23
to se...@googlegroups.com
I was under the impression this had been done for the new 362q configuration, but admit I don’t know where it would live. Probably somewhere on Norberto’s site? Don’t forget the new speed configuration differs a bit from the original design in that you also have to update the byte in memory that shadows the port configuration.

The best H17 driver to use is the HUG SY: driver. Let me know if you need more info on where to find that. There are two pieces: the driver itself and the “INIT” portion. They are assembled separately but there’s a program called COMBINE on the HUG SY: disk that lets you bolt the two together to make the final DVD.

I never knew about the /FORCE flag to override locked files. A little present from Gordon Letwin no doubt…

Once you’ve got a working config let me know. I’m building out GitHub repositories on the SEBHC site for our software and it would make sense for this to be there.

Not sure I ever heard the answer on the H37. Does it need a similar patch? The H67 IDE+ works fine up to at least 16Mhz I believe…


Sent from my iPad

On Feb 2, 2023, at 1:27 AM, smb...@gmail.com <smb...@gmail.com> wrote:

One step forward and one step sideways. I figured out how to replace SY.DVD:

glenn.f...@gmail.com

unread,
Feb 2, 2023, 7:53:43 PM2/2/23
to se...@googlegroups.com

Ah. Now I know why I wasn’t aware of the /FORCE option – it’s an HDOS 3 feature.  I guess I thank Richard Musgrave.

 

Working on transitioning to HDOS3 but still most of what I do is still stuck in 2.0…

 

  • Glenn

smb...@gmail.com

unread,
Feb 12, 2023, 7:46:21 PM2/12/23
to SEBHC
Norberto,

Have you observed any stability issues on the Z80 board switching to 10 MHz speed? My concern is that the 10 MHz oscillator is not necessarily in sync with the 2/4/8/16 MHz oscillator, and if the switchover is ill-timed, you could end up with one very short clock pulse at the transition point.

Here is a sample program I ran in HDOS BASIC:

00010 POKE 8246,118
00020 PRINT "FAST"
00030 POKE 8246,98
00040 PRINT "SLOW"
00050 GOTO 10

8246 decimal is CTL2FL, the memory location that HDOS will periodically spam onto port 262Q. Line 10 changes to max speed. Line 30 changes to min speed. This will fail in short order with a 10 MHz oscillator. Removing the 10 MHz oscillator and replacing it with a 4 MHz oscillator will also fail in short order. This leads me to believe that it's not the absolute speed, but the phase difference at transition time.

Scott

norberto.collado koyado.com

unread,
Feb 12, 2023, 8:26:24 PM2/12/23
to se...@googlegroups.com

No issues so far. You have a great point. How will you fixed such circuit?

 

At the OS level, before switching to a new speed, Interrupts must be disabled, change to the new speed, do a NOP instruction, re-enabled Interrupts, and continue working.

 

Steps during OS control:

  1. Turn off interrupts
  2. Switch to 10MHz
    1. Read memory location
    2. Only change bit 4 and bit 2 for new speed
    3. Save changes
  3. Execute some NOP’s instruction to sync
  4. Enable interrupts
  5. Continue executing the program.

 

Having interrupts on and switching over, it could lead to instability issues.

 

Please run this program from the front panel: http://koyado.com/Heathkit/H8-Z80-64K-RTC-ORG0-V3_files/Z80_Front_Panel_Clock_Select.pdf

 

Also 10Mhz, 16MHZ is guarantee when using internal memory. If using external memory, you will need to add Terry’s board that adds wait states on the H8 bus making t easy to maintain 16Mhz without any issues.

 

Thanks,

smb...@gmail.com

unread,
Feb 12, 2023, 9:42:45 PM2/12/23
to SEBHC
Results on my two tests (in both cases, the "high" speed is 4 MHz).

1) Run my basic program with a 4 MHz crystal in the 10 MHz socket (s1s0 = 11). Fails in a minute or two. Results unpredictable, sometimes cause the basic program to stop and emit an error. Other times froze the computer.

2) Run my basic program, but switch to 4 MHz from the LS161 (s1s0 = 01). Has been running about 90 minutes so far with no issue. Rock solid.

Using the front panel was my initial test and that worked fine. The basic program is executing dozens of these switches per second, so what I observed is probably a 1/1000 fault. Disabling interrupts and adding a NOP is a good idea.

The reason I started investigating this is because I was going to fix Ken's Gearshift H17 driver to support the Z80 board, and I wanted to see if there's any issues surrounding frequent speed changes.

Scott

norberto.collado koyado.com

unread,
Feb 12, 2023, 10:51:13 PM2/12/23
to se...@googlegroups.com

If you have a fix, I will like to try out as I can add it to the Z180 CPU before it goes to full production.

norberto.collado koyado.com

unread,
Feb 12, 2023, 11:06:01 PM2/12/23
to se...@googlegroups.com

I just realized the fix is in Terrys’ board for MAX frequency. Link: http://koyado.com/heathkit/New-H8-Website/h8-system-support-i.html

 

 

Reply all
Reply to author
Forward
0 new messages