On Jan 30, 2023, at 2:01 AM, smb...@gmail.com <smb...@gmail.com> wrote:
I finally finished my Z80 CPU Board. A little late (plan was to get this done over Christmas) but I got distracted with a few things... :)
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The speed control always reverts to 2MHz on RESET, which is probably a good thing. It is possible to add a byte to the EEPROM config space for speed, I forget if we had good reasons not to do that. It is somewhat "safer" to always start out at the slower speed, but with the "all in one" CPU board known to run at all speeds, seems like you could always slow the speed down before booting (etc) if you were having problems elsewhere. Something we might discuss. I don't believe it would be possible to "brick" the machine if something went wrong, but there still might be situations where you have to pull the EEPROM out a reprogram it outside the machine (e.g. can't use vflash or the config command if the system is not working).
"b24" is a pretty old version of the monitor. I recently "released" the latest version as "2.0" (should be the same as "b32"). http://sebhc.durgadas.com/mms89/h8mon2/. For the Z80 with front panel, you want "h8mon2-v2.0.rom".
Regarding DUART and 16'2550 parts, one issue was a change in those parts to how interrupts are enabled, which caused some legacy software to fail (requiring an extra bit to be set before interrupts worked). I'm not sure if there were other reasons as well. This difference between 16'550 and 16'2550 makes no sense to me, but we're stuck with it.
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On the speed config question, Norberto and I recently discussed adding WAIT state config for the Z180 board, another case where you might get into trouble and "brick" the machine. We decided that this one was OK *because* the board always reverted to 2MHz (where 0-WAIT states still works - always). So, if you also allow CPU speed to be configured to a high value, then it would be possible to "brick" the H8-Z180 if one sets the configs for high CPU speed and 0-WAIT states.
So with 2Mhz on the bus does this mean we might be able to use the H17 at higher CPU speeds?
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I think most of Ken’s work on “gear shifting” (i.e. slowing down the clock during disk access and then restoring it) is captured here:
https://koyado.com/Heathkit/H-8_Speed_Mod.html
toward the bottom of the page.
he modified the QuikStor BIOS for CP/M and the HUG SY: device driver for HDOS
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To be clear, to shift to high speed there’s a short program (SPDSBC) that you execute from the command line. We have CP/M and HDOS versions. You can put it in your boot up batch file. Then when you execute any command or program that hits the H17 drive Ken’s mod’s cause it to “downshift” for the duration of the access…
Have you found the SPDSBC code? Doug has a CP/M version (I *think* the latest from him is attached, attachment 1). The speed program has changed across the various versions of the CPU board. I *think* attachment 2 is my version for HDOS. The trick is you not only have to output to the speed port but also update a shadow copy kept in RAM (but earlier versions of the CPU board just let you update the port).
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The official current version is here:
https://github.com/durgadas311/MmsCpm3/blob/master/util/src/spdsbc.asm.
This latest version was updated to avoid calling the highest speed
"10MHz", since depending on your board config it may actually be
16MHz. Instead, the setting is "MAX". There is also a version for
MP/M (mpmspd.asm).
But the version Glenn attached should work for CP/M 2 and MMS CP/M 3. The current versions .COM files are here: https://github.com/durgadas311/MmsCpm3/blob/master/util/bin/spdsbc.com
As background, MMS CP/M 3 and MP/M cannot access the shadow
location used by HDOS and CP/M 2 (all have a different shadow
location for various reasons), so that's why there are different
version. CP/M 3 and CP/M 2 are enough alike that they can be
implemented in the same program.
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On Jan 30, 2023, at 9:49 PM, smb...@gmail.com <smb...@gmail.com> wrote:
Okay, I'm going to put this on my shortlist of things to figure out how to do this in my HDOS3 install. It sounds like compiling Glenn's source is my first task. I'm trying to figure out the right set of drivers from https://koyado.com/Heathkit/H-8_Speed_Mod.html to use. Looks like HDOS302.H8SPD.FlpyDvrs.PKG.zip is probably the right file.
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I've had some recent success creating HDOS executables under Linux, I could try using the same for Glenn's HDOS version of SPDSBC. But that sill leaves you with a way to get that executable onto your system. VDIP or using H8D utility are some ways. Are there changes that need to be made to Glenn's HDOS version? Isn't there already a copy of the .ABS somewhere?
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Yes! Just that the disk timing constant has to be modified as the CPU will run such values faster. For 4/8/16MHZ, the values will need to be modified for each frequency and for each OS.
Terry, do you have the Trionyx HDOS speed program to test in my system at 4MHz with the H17?
Norberto
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Thanks Terry!
Scott,
Finally, an observation -- a respin of the board with MAX202/MAX232 drivers and 10-pin serial headers would be nice, allowing elimination of the +/- 12V regulators.
Good suggestion, but need to be backwards compatible with the Heathkit 15 pin serial port cables as they can be used on the H8-4 board as well. I did add this idea onto the H8-Z5-5 tape backup storage board as it was a complete new board with new capabilities.
Norberto
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On Jan 31, 2023, at 2:25 AM, Terry Smedley <terry....@gmail.com> wrote:
Norberto (and anyone else who might be interested):
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<README.DOC><SPEED.ASM><SPEED.DOC><SPEED.ABS>
Thanks Terry!
We will need software to re-calculate such timing constants under HDOS for the different CPU speeds. I think Douglas’ simulator will be handy here.
DB 20,16,20,20,80 2 MHz operation default
DB 46,47,48,46,164 4 MHz, no waits set
DB xx,xx,xx,xx,xx 8 MHz
DB xx,xx,xx,xx,xx 10 MHz
DB xx,xx,xx,xx,xx 16 MHz
Will this work for HDOS? As speed doubles I can make linear calculations, but not for 10MHz.
WRITA |
WRITC |
WHDA |
WNHA |
WSCA |
SPEED |
20 |
16 |
20 |
20 |
80 |
2mhz |
46 |
47 |
48 |
46 |
164 |
4mhz |
72 |
78 |
76 |
72 |
248 |
8mhz |
98 |
109 |
104 |
98 |
332 |
16mhz |
X |
X |
X |
X |
X |
10mhz |
D.WRITA 040.112 Times the period during WRITE's from
when a sector is located until the
sync pattern is to be written.
D.WRITC 040.114 Times the period from when the sync
pattern is first called to be written
until the first pattern byte is output.
D.WHDA 040.123 Times the period from when a hard sector
hole is detected until the WHD (wait
for hole detect) routine returns to its
caller.
D.WNHA 040.124 Times the period from when a no-hole is
verified until the WNH (wait for no-hole)
routine returns to its caller.
D.WSCA 040.125 Timeout counter for a missing sync byte.
Norberto
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What you did is to enable external and internal RAM at the same time. So, during a read cycle the internal and external memory driven by the 74LS640 will be in contention and will cause the CPU to execute the wrong code and who knows what is going to do.
You can always burned a configured Z80 monitor to an EPROM if there are no plans to change it. Or write protect the EEPROM by using the jumper or using the programmer to write protect it after configuring the monitor.
Norberto
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On Feb 1, 2023, at 4:10 AM, Scott Baker <smb...@gmail.com> wrote:
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On Feb 1, 2023, at 1:50 PM, smb...@gmail.com <smb...@gmail.com> wrote:
Thanks Glenn... I wish I had taken better notes when I had this working. This weekend I'll try to backtrack to exactly the same configuration I succeeded with before. I know it *did* work, so therefore I can make it work again.
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On Feb 1, 2023, at 4:45 PM, norberto.collado koyado.com <norberto...@koyado.com> wrote:
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May be missing bytes but it’s a different problem than the one I was working I think. Because the receiver code just loops until it receives 256 bytes, if a byte was lost the code would wait forever (for the byte that’s not coming) and the transfer would hang indefinitely.
Perhaps you’re having H8-4 issues. Are you using 8250s or 16550s? not sure the latter work reliably with the Heath H8-4. Les Bird specifically advertised that his implementation of the H8-4 (from 2009!) could be used with either one.
https://sebhc.github.io/sebhc/pcbs/H8-2000_Construction.html
I like the idea of trying the alternate UART on the new H8-5 board.
From: se...@googlegroups.com <se...@googlegroups.com> On Behalf Of smb...@gmail.com
Sent: Wednesday, February 01, 2023 5:28 PM
To: SEBHC <se...@googlegroups.com>
Subject: Re: [sebhc] Z80 CPU Board Questions
My gut feeling is that bytes are being lost. For example it did seem to initialize at least part of the boot sector, and it does have part of a volume number (but not a volume name, and the number doesn't seem correct). I did have an interrupt jumper in place during this attempt.
One thing I'm going to try is to use Norberto's Tape Board's UART instead of the H8-4 and see if that makes a difference. The H8-4 is, for whatever reason, still seeming wonky and unreliable. I have patched the tape board PLD to use port 340 instead of 350, but you cannot change the interrupt. Hence my question about interrupts. So I'll just leave the interrupt jumper off.
A good test would be to send an image across, write it to disk, and then read it back. See if I end up with the same image.
Scott
On Wednesday, 1 February 2023 at 13:55:28 UTC-8 Joe Travis N6YPC wrote:
I think Glenn nailed it. The updated version of the H89LDR that he sent to me works great on my H8 with the Z80 board. I've had no issues since.
Joe
On Wed, Feb 1, 2023 at 4:46 PM Glenn Roberts <glenn.f...@gmail.com> wrote:
We’ll there’s always this REMarks I did, but it could use some updating
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On Feb 1, 2023, at 9:24 PM, smb...@gmail.com <smb...@gmail.com> wrote:
Glenn, you're right -- in my circumstance it is not hanging. So it must be a different problem. Perhaps rather than missing bytes, I'm getting empty bytes / zeroes in some positions.
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Interesting. FWIW the one I have (“Les Bird H8-4) in “Rusty” dates back about 10 years. never a problem. 16550 UARTS… wonder if there was some kind of fabrication issue? Or if you don’t have the best and final gerber files? The silkscreen art on mine says “REV 1.3”
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On Feb 2, 2023, at 1:27 AM, smb...@gmail.com <smb...@gmail.com> wrote:
One step forward and one step sideways. I figured out how to replace SY.DVD:
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Ah. Now I know why I wasn’t aware of the /FORCE option – it’s an HDOS 3 feature. I guess I thank Richard Musgrave.
Working on transitioning to HDOS3 but still most of what I do is still stuck in 2.0…
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No issues so far. You have a great point. How will you fixed such circuit?
At the OS level, before switching to a new speed, Interrupts must be disabled, change to the new speed, do a NOP instruction, re-enabled Interrupts, and continue working.
Steps during OS control:
Having interrupts on and switching over, it could lead to instability issues.
Please run this program from the front panel: http://koyado.com/Heathkit/H8-Z80-64K-RTC-ORG0-V3_files/Z80_Front_Panel_Clock_Select.pdf
Also 10Mhz, 16MHZ is guarantee when using internal memory. If using external memory, you will need to add Terry’s board that adds wait states on the H8 bus making t easy to maintain 16Mhz without any issues.
Thanks,
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If you have a fix, I will like to try out as I can add it to the Z180 CPU before it goes to full production.
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I just realized the fix is in Terrys’ board for MAX frequency. Link: http://koyado.com/heathkit/New-H8-Website/h8-system-support-i.html
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