PROGRAM: DSP WORLD EXPO / ICSPAT '93
Amnon Aliphas
from:
DSP Associates
18 Peregrine Road
Newton Centre, MA 02159
Tel: (617) 964-3817 Fax: (617) 969-6689 e_mail: DSPW...@world.std.com
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The Fourth International Conf. on Signal Processing Applications & Technology
- PROGRAM -
ICSPAT featuring DSP WORLD EXPO
Santa Clara Convention Center, Santa Clara, CA - USA
Conference Chairman Dr. Amnon Aliphas DSP Associates
Technology Forum Chair Mr. Ashok Bindra Electronic Engineering Times
Conference Manager Ms. Cynthia Margulis DSP Associates
ICSPAT Technical Review Committee
Dr. Jai Eu Bell Northern Research - USA
Dr. J.B. Evans University of Kansas - USA
Mr. Joel Felman AudioFile, Inc. - USA
Dr. Jose Fonollosa ETSE Telecomunicacio - Spain
Dr. Helmut Gander Vienna Univ. of Technology - Austria
Dr. Frank Gao Gao Research & Consulting - Canada
Mr. John Irza DSP Associates - USA
Dr. Bruce Musicus B.B.N. - USA
Dr. Tokunbo Ogunfunmi Santa Clara University - USA
Mr. Robert Owen Mentor Graphics - USA
Dr. A.M. Peterson Stanford University - USA
Dr. Tomohiko Taniguchi Fujitsu Laboratories, Ltd. - Japan
Dr. J. Van Ginderdeuren Philips, I.A. - Belgium
EXPO Manager Ms. Pamela Coneeny DSP Associates
DSP WORLD EXPO Industry Advisory Board
*Analog Devices, Inc. Al Haun, Vicki Chase
*Analogic Corporation Marc Beckerman
*Ariel Corporation Anthony Agnello, Peter Percosan
*array Microsystems, Inc. Doug Mitchell
*AT&T Microelectronics Ron Crochiere
*BSO/Tasking Vaughn Orchard
*Comdisco Systems, Inc. Brian Barrera
*CSPI, Inc. Ed Cohler
*Datacube, Inc. Susan Solomon
*DSP Software Eng., Inc. Marcia Macres
*Dynetics, Inc. Harold Messias
*IEEE Spectrum Magazine Doug Long
*Intel Corporation Ravi Rao
*Intelligent Systems Int'l. Eric Verhulst
*Loughborough Sound Images D.J. Quarmby
*Martin Marietta Greg Harrison
*Mentor Graphics/EDC Robert Owen
*Mizar, Inc. Jim Davis
*Motorola Jane Bates
*National Instruments John Hanks
*NEC George Wang
*The Rainier Company Stephen A. Schuster
*Sharp Microelectronics Corp. Robert Laird
*Sonitech International, Inc. Brewster Lamacchia
*Spectron Microsystems, Inc. Nancy Haydt
*Spectrum Signal Proc., Inc. Dan McCallum
*Spiral Software Steve Rankel
*Star Semiconductor Robert Patterson
*Tartan, Inc. Bill Novak
*Texas Instruments, Inc. Jay Reimer
*The Math Works, Inc. Kenneth Karnofsky
ICSPAT & DSP WORLD EXPO are sponsored by DSP Associates and Electronic
Engineering Times
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ICSPAT
Now in its fourth year, The International Conference on Signal Processing
Applications & Technology (ICSPAT) featuring DSP WORLD EXPO, is the world's
premier gathering of signal processing design engineers, OEM's, and scientists.
ICSPAT brings together the creative people who are doing the research and
producing the commercial applications of DSP technology. The scope of the
conference, and the exhibit, attract a truly global audience. ICSPAT attendees
come from industry and academia not only from North America but from Europe,
Asia, South America, Africa and Australia.
The speed of developments in signal-processing technology have enabled ICSPAT
to experience a phenomenal growth rate over the last three years. Brand new
applications appear each year in the Conference and this year several key
companies in the industry will unveil their latest products at the Industry
Technology Forum, which will kick-off the Conference on Tuesday, September 28,
1993.
ICSPAT eliminates the gaps between pure technology and hands-on engineering,
between research and product development, between application theory and
product design. ICSPAT's structure as a comprehensive event makes it
particularly worthwhile for DSP industrial representatives and design
engineers. In this event, attendees can:
Be Trained in a workshop on an established DSP product
Witness the unveiling of brand-new DSP products
Listen to presentations on state-of-the-art DSP applications
See the end-user systems which realize those applications
Meet other professionals working in all areas of DSP technology
Papers will be presented in live sessions and in poster-sessions. Presentations
will be scheduled in uniform time slots, which will maximize the number of
sessions which an individual can attend. The Third ICSPAT, held in Boston last
year, featured more than 180 papers (selected from a pool of 340) whose authors
came from more than 35 countries. This year's Conference has attracted even
more quality papers. A distinguished international Technical Review Committee
evaluated all of the papers submitted and chose those to be included based on
their technical merit, innovation and relevance for the hands-on engineer.
Every paper presented in a live session will focus on applications and
technology development. Excellent theoretical papers will be chosen for
presentation in posters sessions but the latest real innovations of DSP
technology will form the heart of the Conference.
All accepted papers will be printed in the Proceedings of ICSPAT '93, a bound
volume-set which will be available at the Conference. One copy of the
Proceedings is included with ICSPAT registration.
Last year's ICSPAT attendees had comments like these:
"Lots of applications; not just theory. Great!" - Jim Burrus, Hewlett-Packard
"Many excellent papers!" - Scott Brown, Becton Dickinson
"Very useful & informative...plan to attend in 93." -Y. Solowiejczyk, EDO Corp.
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DSP WORLD EXPO
DSP WORLD EXPO is a three-day exhibition featuring dozens of pioneering
companies from the DSP industry displaying their products and demonstrating how
applications presented in the Conference sessions are realized in current
commercial products. DSP WORLD EXPO presents an enormous range of commercial
goods: DSP chips, boards, tools, software, and end-user systems are all
included in the show. While the majority of products are of use to the DSP
design engineer, the EXPO also presents DSP products which have been developed
for use in fields as diverse as: telephony, automotive, medical, industrial
control, underwater, radar, multimedia, VLSI, and much more. With such an
expansive scope, DSP WORLD EXPO lives up to its name; the displays encompass
the total realm of DSP technology.
DSP WORLD EXPO has been planned with extensive consultation from the industry.
In fact, an Advisory Committee of more than 30 representatives from companies
large and small in the industry has been meeting to ensure that the EXPO serves
the needs of the industry and provides an attractive event for attendees.
AUDIENCE for ICSPAT & DSP WORLD EXPO
ICSPAT featuring DSP WORLD EXPO attracts engineers and managers who need to
understand the current state-of-the-art in signal processing applications and
technology. At this comprehensive event, they experience a plethora of new
products which exploit the latest DSP technologies. Whether they are inventing
pure technology, creating technology tools for future developments, integrating
technology products into existing systems or utilizing finished systems,
engineers and managers benefit from hearing about and seeing a full spectrum of
products capitalizing on ever-newer DSP-based technologies. From ICSPAT and DSP
WORLD EXPO, engineers and managers acquire specific technical information, get
a sense of the evolution of the signal processing field as a whole, and gain a
tangible understanding of the most innovative applications of DSP. Because the
developments discussed at ICSPAT and DSP WORLD EXPO are so exciting and
significant for the DSP field, the international trade press will provide
substantial coverage of the combined events.
REGISTRATION
The registration fee includes:
* Admission to all Conference sessions and The Industry Technology Forum
* Admission to DSP WORLD EXPO
* One Copy of The Proceedings of ICSPAT T93
* One Ticket to the ICSPAT Banquet
Registrations received before August 25, 1993 will be eligible for a
discounted fee of US $495 (US $350 for students with proof of student status).
After August 25, 1993, the cost of registration will increase to $595 ($425
for students).
Payment may be made by personal check (drawn on US banks), bank transfer (for
which there is a $20 surcharge), or credit card (Mastercard or Visa). Please
send the registration form on the inside back cover with payment made to DSP
Associates.
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TIME AND PLACE
The International Conference on Signal Processing Applications and Technology
T93 and DSP WORLD EXPO will convene at the Santa Clara Convention Center, in
Santa Clara, California, USA. The Conference will open in the morning on
Tuesday, September 28 and will finish in the evening on Friday, October 1.
Conference sessions will be held during the morning and afternoon hours, except
on the first morning of the Conference, which will be dedicated to The Industry
Technology Forum, where brand-new products will be unveiled and demonstrated
for the Conference audience.
Optional Workshops, which are open to Conference attendees, will be held on
Monday, September 27, the day before the Conference officially opens. Workshops
participants should plan to arrive in Santa Clara on Sunday, September 26.
Conference registration will begin on Monday afternoon and continue throughout
the evening.
DSP WORLD EXPO will run from September 28 - September 30, 1993.
SANTA CLARA AND SILICON VALLEY, CALIFORNIA
Santa Clara sits in the heart of CaliforniaUs world-famous "Silicon Valley",
home of the greatest concentration of high-tech companies on the planet. The
combination of extraordinary high-tech opportunities and a well-educated
population help to make Silicon Valley and the nearby (only 45-minutes by car)
San Francisco Bay Area one of the most culturally rich and exciting areas in
the United States.
Santa Clara, like most cities in central California, enjoys a mild climate; the
temperature averages 68 degrees F (19 degrees C) year-round. Within easy
driving distances are mountains, ancient forest, beaches, vineyards and
fabulous urban sightseeing in San Francisco. Great America Theme Park, a major
amusement park, is located just down the road from the Santa Clara Convention
Center. And, of course, there are local museums, historic missions, and
shopping centers which delight locals and visitors alike.
The Convention Center is located only 10 minutes from San Jose International
Airport and about 35 minutes from San Francisco International Airport. Santa
Clara is also serviced by Southern Pacific Railroad, Greyhound Bus, and Santa
Clara County Transit making the city accessible by public transportation.
HOTEL ARRANGEMENTS
Attendees are responsible for arranging their own lodging and meals. The Westin
Hotel, Santa Clara, adjacent to the Santa Clara Convention Center, will serve
as the host hotel for the Conference and EXPO. Participants should make their
reservations as early as possible in order to book into the block of rooms
reserved for ICSPAT attendees. Special rates are available for Conference
attendees and exhibitors at the Westin Hotel. When making reservations with
the Westin Hotel, please be sure to mention ICSPAT and/or DSP WORLD EXPO, in
order to take advantage of the specially discounted room rates for ICSPAT
participants.
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THE INDUSTRY TECHNOLOGY FORUM (ITF)
The Industry Technology Forum will feature several key companies in the
industry who will introduce brand-new products to the international DSP
community. The ITF will thus have the effect of showcasing, for the Conference
and Expo audience, the industryUs state-of-the-art, in its truest sense.
Participating companies will unveil their products, give brief explanations and
demonstrations and then will accept questions from the Conference audience. By
seeing the forefront of DSP technology, at the beginning of the Conference,
attendees will have a better understanding of the current capabilities of the
industry and will be able to appreciate the papers presented later, which will
deal with more in-depth applications of those and other products.
While the exact products featured in the ITF cannot be disclosed until the
event itself, the following companies are planning to present their latest
innovations within the context of the ITF, the event for those who want to put
their hands on the pulse of the industry.
*Analog Devices, Inc.
*Analogic/CDA
*Analogical Systems
*Ariel Corporation
*AT&T Microelectronics
*Catalina Research, Inc.
*Comdisco Systems, Inc.
*DSP Research, Inc.
*DSP Software Engineering, Inc.
*Dynetics, Inc.
*Hyperception
*Intelligent Systems International
*Pentek, Inc.
*Precision Filters, Inc.
*Spectron Microsystems
*Star Semiconductor
*Texas Instruments
*Traquair Data Systems, Inc.
*Wintriss Engineering Corporation
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PANEL AND SPECIAL SESSSIONS
The International Conference on Signal Processing Applications and Technology
will host three panel sessions, covering topics which are relevant to the
Conference attendees and the DSP industry as a whole. Last year's panel
sessions were very well attended and generated lively discussions.
*Mass-Marketing DSP Products
Wednesday, September 29, 1993 - Santa Clara Convention Center
Chairperson: Stephen A. Schuster, President, The Rainier Company
The complex and all-consuming depth of DSP technologies often makes the
marketing and selling of DSP products extremely challenging. In this panel,
DSP industry marketing experts will convene to examine successes and failures
in the marketing of DSP-based products.
*Scalable Multi-Processor Architectures - DSPs Move Into Supercomputing
Applications
Thursday, September 30, 1993 - Santa Clara Convention Center
Chairperson: Anthony Agnello, President, Ariel Corporation
Hardware and software innovations are now facilitating the design of high-
performance DSP-based systems which are scalable. We will discuss the complex
integration of multiple-processors required to meet the computational needs of
applications which can attain unprecedented levels of performance .
*The Future of DSP Technology
Friday, October 1, 1993 - Santa Clara Convention Center
Chairperson: Ashok Bindra, DSP Editor, Electronic Engineering Times
In this panel, representatives of key companies engaged in developing new
technologies and pioneering new applications will meet to discuss the impact of
DSP technology in areas such as wireless communications, advanced image
processing and other fields of significant growth potential for the DSP
industry.
*Special Session
There will be a lecture open to the ICSPAT audience, given by Dennis S.
Fernandez, Esq., of the California law firm of Fenwick and West. His address is
entitled, RProtecting Your Intellectual PropertyS and should be of interest to
design engineers concerned with safeguarding ownership of original designs and
innovations.
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WORKSHOPS
This year, ICSPAT is pleased to introduce workshops for Conference and EXPO
attendees. On Monday, September 27 (the day before ICSPAT convenes), several
exhibiting companies will be holding training sessions in specialized areas.
These workshops will offer engineers the opportunity to acquire specific
knowledge of DSP products in an intensive hands-on setting.
Conference attendees should register for workshops at the time they register
for the Conference itself (please see registration form on back cover). Exact
schedules and further details will be available in late summer, 1993.
*ASI 9301 Low-Cost Speech Compression Technology for
Consumer Applications [Analogical Systems, Inc.]
This workshop will introduce the Voice Pump (from Analogical Systems, a
low-cost means of adding high-quality speech compression to many products.
Available algorithms include ASM-CELP TM Analogical Systems Modified CELP at
bit-rates of 4800, 7200, and 9600 bits per second. [Half Day]
*ARC 9302 TMS320C40 Parallel Processing Development on Ariel's Hydra
[Ariel Corporation]
This Rhow-toS workshop will teach the user how to develop code for a multi-C40
system hosted on a Sun Workstation . [Half-Day]
*CSI 9303 Signal Processing WorkSystem( (SPW*) - DSP
Design from Concept to Implementation
[Comdisco Systems, Inc.]
This workshop will cover taking a DSP design from concept to implementation in
hardware and software using Comdisco SystemsU SPW - The DSP Framework*. The
workshop will start with algorithm design and verification using signal flow
block diagrams and simulation. Design trade-offs will be examined, and
real-time prototypes will be automatically generated from the system level
block diagram. Virtual product prototyping is an important consideration at
this stage of design, and human interfaces to the real-time prototype will be
quickly constructed. A portion of the system level block diagram will then be
taken to hardware implementation. Typical hardware implementation technologies
are ASIC and FPGAs and automatic design solutions will be demonstrated.
[Half-Day]
*CRI 9304 Utilization of CRIUs Sharp LH9124/LH9320-Based
Vector Processor Boards in Various Applications
[Catalina Research, Inc.]
Architecture, programming and applications utilizing the Sharp LH9124/ LH9320
vector processor chip set will be covered by this course. [Half -Day]
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*DYN 9305 Multi-Processing Software Development Using DataFlo
[Dynetics, Inc.]
We will discuss the concepts of Data flow programming paradigms in contrast to
control flow. The architecture of the DataFlo system will be reviewed and
demonstrations of multi-processor algorithms will be shown and developed.
[Half-Day]
*HYP 9306 C-Code Generation on a PC [Hyperception, Inc.]
This course will take you through a typical DSP Development Cycle, beginning
with the problem definition, and continuing with simulation, software
implementation, debugging, and hardware impementation. [Half-Day]
*ISI 9307 Transparent Real-Time Parallel Programming on
Multi-DSPs with Virtuoso
[Intelligent Systems International, Inc.]
This workshop will provide an introduction on the four-layer model built around
a nanokernel of virtuose. While with the nanokernel tasks sub-microsecond
task-switching is achieved, the semantics of the micro kernel services provide
for typology independence. [Half-Day]
*MOT 9308 (Content to be determined, Motorola)
*SPM 9310 Using Spox to Build Multi-Processor DSP Applicatons
[Spectron Microsystems]
This session will describe the Multi-processor features and functions of Spox -
the real-time O.S. In this session, an engineer will walk through the design
of multi-processor DSP applications. Examples of real MP applications will be
explained and demonstrated. [Half-Day]
*STS 9311 Signal Processing Solutions Made Easy with SPROC
[Star Semiconductor]
Attendees will gain hands-on experience developing DSP applications using
Star's revolutionary SPROC technology. Hardware/Software implementation
examples of real applications using StarUs SPROC DSP in telecommunications,
audio and controls will be discussed. [Full-Day]
*TXI 9312 TMS320C5x Design [Texas Instruments, Inc.]
This workshop will focus on the high-performance features of TI's TMS320C5x
DSPs and how a designer can take advantage of the super-high processing speeds
and very low power dissipation found in these devices. The workshops will
examine the architectural advancements that have make the TC5x DSPs the highest
performance16-bit DSPs available today, including the CPU, peripheral
functionality and power management features. This discussion will be followed
by demonstrations of powerfulTMS320 fixed-point development tools and examples
of TC5x-based applications.[Half-Day]
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CONFERENCE PROGRAM
ADVANCED TV TECHNOLOGY
Use of the TI TMS320C30 Chip in the Design of a Programmable HDTV Video Decoder, John Wiseman, Panasonic ATVL, USA
NTSC Ghost Canceling, Robert A. Peloso, Panasonic, USA
Software Implementation for a DSP Chip for a Programmable HDTV Video Dequantizer, James M. Kresse, Panasonic, USA
ASIC DSPs
An H.261 Single-Chip Low Bit Rate Video-Codec Yves Rasse, Alcatel Business Systems, France
Digital Filter Processor: A Low Cost One-Chip Solution for Audio and Speech Processing, Martin Winterer, Christian Bock, Miodrag Temerinac, Andreas Menkhoff, and Reiner Backes, ITT-INTERMETALL, Germany
A Programmable Digital Filter IC Employing Multiple Processors on a Single Chip, Alan N. Willson Jr., A.Y. Kwentus, and M.J. Werter, UCLA, USA
An Efficient 175MHz Programmable FIR Digital Filter, Kei-Yong Khoo, Alan Kwentus, and Alan N. Willson Jr., UCLA, USA
Hardware Implementation of Neural Networks Using FPGA ElementsG. Horvath and F. Deak, Technical University of Budapest, Hungary
Digital Video Capture Using Interpolation, Sanjay Jha, Dave Wicker and Tom Kovanic, Brooktree Corporation, USA
A 1024 Tap FIR Filter for Pulsar Signal Processing, Amar A. Kapadia, Hewlett-Packard Company, USA, Jan M. Rabey, Donald C. Backer, Daniel R. Werthimer, and Matthew R. Dexter, University of California-Berkeley, USA
FPGA Implementation of Digital Filters, Chi Jui Chou and Joseph B. Evans, University of Kansas, USA
AUDIO / SPEECH
Real-Time Pitch (Frequency) Shifting TechniquesSangil Park, Motorola, Inc., USA
Optimizing Sound for Listening in the Presence of Road NoiseTom Miller, International Jensen, Inc., USA
Analysis and Models of Sound Phase Fluctuations with Applications to Outdoor Active Noise Control, James Rogers, Radomir Sokolof and Marc Thomas, Michigan Technological University, USA
SPS: A Powerful PC-Based Environment for Real-Time Digital Audio Signal Processing with Applications, Johann Van Ginderdeuren, E. Emmers, G. Knapen, and J. Tielen, Philips I.A., Belgium
A DSP-based Reprogrammable Sound Card Plug-in Board for PCsNoam Levine, Analog Devices, Inc., USA
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AUTOMOTIVE APPLICATIONS
System Identification Techniques Applied to the Frequency Characterization of Engine Mufflers, Gema Pi–ero-Sipan, Luis Vergara-Dominguez and Alberto Broatch-Jacobi, Universidad PolitŽcnica de Valencia, Spain
Feedback Active Noise Control Systems Sen M. Kuo, Northern Illinois University, USA
A New Application of Spread Spectrum for Automotive Electronic Systems Communiques, F. Nouvel, G. El Zein, and J. CiterneInst. National des Sciences Appliquees, France
Parallel Architecture for an Embedded Real-Time ApplicationS. Bouazziz, R. Reynaud, and T. Maurin, UniversitŽ Paris-Sud, France
An Embedded Network for Automotive Obstacle Detection DemonstratorA. Lagreze, H. Saheb, and M. Dang, Institut IMAG/LSI Circuits, France
BIOMEDICAL APPLICATIONS
Computer and Bio Signal Processing of Paroxysmal and Non-Paroxysmal EEG Signals, Senthilvel Natarajan, Procter & Gamble India, Ltd., India
Novel Sub-Band Coding Techniques for Compressing ECG SignalsTorbj¿rn Gjerde and John HŒkon Hus¿y, Rogaland University, Norway
A New Digital Recorder for Ambulatory ECGAvtar Singh and Robert Chen, San Jose State University, USA
Wide Dynamic Range Pulse Analysis of Fluorescently Tagged Biological CellsScott Brown and Bertram Pinsky, Becton Dickinson, USA
COMMUNICATIONS AND TELEPHONY
Implementation of an Acoustic Echo Canceller Using the Motorola DSP 56001 Digital Signal Processor, Maher Umari, Andrea Electronics, USA
Recognition of a 2100 Hz Tone with Phase Reversal for Disabling an Echo Canceller, Dalmazio Raveglia and Paolo Sartorello, Italtel SIT, Italy
Digital Encryption System for Speech Communication over the Public Switching Telephone Network, Sofia Moreno Perez, Rafael Sarmiento de Sotomayor, Luis Diez del Rio, Jose Parera Bermudez, Marcelino Veiga Perez, and Ramon Garcia Gomez, E.T.S.I. de Telecomunicaci—n, Spain
Experiences with DTMF Receivers and Tone Senders in Poland Using DSPAdam Dabrowski and Wojciech Kabacinski, Technical University of Poznan,Poland
Performance of Diversity Combined Decision Feedback Equalizer for Microcellular Mobile Radio Communication Systems, Masao Iida, Nippon Idou Tsushin Corporation, Japan
Real-Time Implementation of Variable Rate QCELP Codec Using TMS320C30 DSP Kyongho Han, Byungsik Yoon, Insung Lee, and Sangwon KangElectronics & Telecom. Research Institute, Korea
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Optimum Adaptive Filter Tap-Length and Delay Estimation Techniques for a Full-Duplex Teleconferencing System, Sangil Park and Dion Messer Funderburk, Motorola, Inc., USA
Application of Fast Hartley Transform to TransmultiplexingK.M.M. Prabhu, Indian Institute of Technology, India, and K. Srinivasan, University of California-Santa Barbara, USA
Application of Adaptive Sub-Band Techniques in Teleconferencing Using C-30 DSP, M. Tahernezhadi, Northern Illinois University, USA
Performance of Linear Equalizers in Combating Adjacent Channel Interference for M-ARY QAM Systems, Mansour Tahernezhadi, Northern Illinois University, USA
Call Progress Detection Using Special WeightingAlex A. Berestetsky, Brooktrout Technologies, Inc., USA
A Fast Tone/Phase Reversal Detector Implemented on DSP, Maurizio Andronico, Salvatore Casale and Aurelio La Corte, Universita' di Catania - Fac. di Ing., Italy
A Dynamically Configured V.32bis Automode Modem on the Mwave SystemBert A. Davenport, and Raymond M. Chandler, IBM Corporation, USA
Design of a Telecommunications IC for the Digital European Cordless Telephone Systems, Stefaan Note, N.V. Philips Industrial Activities, Belgium and D.Devisch, EDC/Mentor Graphics, Belgium
Adaptive Interference Cancellation Using the FELMS Algorithm on Digital Signal Processors, Tokunbo Ogunfunmi, Santa Clara University, USA
A MOBITEX Wireless Modem ImplementationHerbert B. Cohen, AT&T Bell Laboratories, USA
Implementation of V.Fast Algorithms on the NEC µ7701x DSPGraham Brand, NEC Electronics, USA
COMMUNICATIONS ALGORITHMS
Executable System Modeling of a Mobile Communications System with Multi-resolution Spectrum Estimation of Doppler Shift, Xiaowei Yang, Cambridge Research Associates, Inc., USA, and Michael Vertal, Nu Thena Systems, Inc., USA
Improving the Cryptanalysis Algorithms Based Upon the Multiple ResiduesS.J. Tabatabaian and G.P. Singh, University of Newcastle upon Tyne, U.K.
CONSUMER APPLICATIONS
DSP and Cellular Radio, Timothy M. BurkeMurata Communications Research, Inc., USA
ST18XSTAR: The First Static Answering/Recording Single DSP ChipOlivier Leenhardt, SGS Thomson Microelectronics, France
Integrated Hands-Free Cellular Phone, Active Noise Control and Audio SystemSen M. Kuo, Holmes Chuang, and Padma Mallela, Northern Illinois University, USA
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Single-Chip, Real-Time, Harmonic Matching Pitch-to-MIDI ConverterFrancisco J. Casajus-Quiros and Pablo Fernandez-Cid ETSI Telecomunicaci—n-UPM, Spain
The NS32AM163: A Versatile Digital Answering Machine, Alberto Sandbank, Gideon Intrater, Oved Oz, Yair Baydatch, Aryeh Lezerovitz and Amir Frieziet, National Semiconductor (I.C.), Ltd., Israel
Background Noise Suppressor for a Car Hands-Free MicrophoneJuha Hakkinen and Mauri VŠŠnŠnen, Nokia Research Institute, Finland
DIGITAL FILTERS
Design of Multi-Rate Cascade Form FIR Digital Filters with Integer Coefficients, Dexiang Xu, Carl Halford, and Chiu Jer-Ming, Memphis State University, USA
Arbitrary Allocation of Center Frequencies in Signal Detectors Using the Goertzel Algorithm, Baohua Zheng, TALX Corporation, USA
Design of Lattice Wave Digital Filters in SPW EnvironmentLouisa Grisoni, M. Ansorge and F. Pellandini, UniversitŽ de Neuch‰tel, Switzerland
32-bit Digital Filtering Using a 16-bit DSPDan Ash, Analog Devices, Inc., USA
Minimum Denominator-Multiplier Pipelined IIR Digital FiltersAntonio E. De La Serna, Michael A. Soderstrand, and Herschel H. Loomis Jr.University of California-Davis, USA
DSP ALGORITHMS
Requirements and Implementation of the Zoom FFT in the Case of High Dynamics Range and the System Response Analysis, Josef Hal‡mek, Miroslav Kasal and Ivan Krejc’, Institute of Scientific Instruments, Czech Republic
Improving Two-Dimensional Feature Extraction with a Recursive Sliding Discrete Fourier Transform, Michael J. Loushine, and Joseph M. Scanlan, The Analytical Sciences Corp. (TASC), USA
Probability of Resolution of the MEM Spectrum Estimator Hui-Wen Zhang, Canton Rubber Products, Inc., P.R. China
An Improved PN Matched Filter Rapid Acquisition System, Jung-Jae Chaoand W.D. Chen, National Taiwan Ocean University, Taiwan, R.O.C.
Implementation of IIR Adaptive Filters Based on Composite Regressor Algorithm Using TMS320C25 Digital Signal Processor, Piyare L. Sharma, University of Wisconsin - Platteville, USA
A Fast VLSI Multiplication Algorithm Using Fourier Transform and Redundant Binary Representation, Hannes Hassler, Technical University - Graz, Austria
Seismic Signal Analysis and Denoising with the Wavelet TransformLetizia Lo Presti and Gabriella Olmo, Politecnico di Torino, Italy
An Approximate Kalman Filtering Approach for Multiply Perturbed SystemsPan-Tai Liu and Hui Fang, University of Rhode Island, USA andFu Li, Portland State University, USA
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Joint Time-Frequency Analysis TechniquesJohn Hanks and Dapang Chen, National Instruments, USA
In-Line Split Radix FFT for the 80386 Family of MicroprocessorsThomas J. Tobias, Voice Recognition Systems, USA
DSP ARCHITECTURES
A Neural Computer Architecture Based on Multi-DSP, Gao Yan, Nan Ning Zheng,Hu Chao and Xin Liang Feng, Xi'an Jiaotong University, P.R. China
Designing Digital Filters Using Field Programmable Gate ArraysRoger D. Hack, Indiana University - Purdue University, USA
The Use of a SPARC Processor as a DSP for Image Processing: The SPARC PC Video Board, A. Rivoire, P. Kleimann, and P. Tochon Laruaz, Inst. de Chimie & Physique Industrielles, France
Among DSP Design Choices - A Middle Way, Les Mintzer, Momentum Data Systems, USA
Integrating DSPs in PC System and Peripheral Designs, Richard LevandovAOX, Inc., USA
DSP MACHINES
Application Specific Array Processing, Richard C. Borgioli Image
& Signal Processing, Inc., USA
A Low Cost Development System for DSP ApplicationsLourival Lippmann, Jr., Universidade Federal do Parana, Brazil
Efficient Multi-Dimensional FFT Module Implementation on the Intel i860 Processor, Chao Lu, Towson State University, USAZhongshan Qian, Myoung An and Richard Tolimieri, Aware, Inc., USA
Implementation of Fast Hartley Transform on DSP Chips, S. Raghu Rama Krishna, B. Surendra Kumar, and K.M.M. Prabhu, Indian Institute of Technology, India
Implementation of the Wavelet Transform with TMS320C30, Marco Principato and Ishmail Jouny, Lafayette College, USA
DSP SOFTWARE
An Image Processing Environment Based on Object-Oriented Programming, Michael Schneider and L. Agapito, Consejo Sup. de Investigaciones Cientificas, Spain
A Software Self-Check Program for the TMS320C40 Floating-Point Digital Signal Processor, Jonathan Thorn, Texas Instruments, USA
A Generalized Package for Statistical Errors Characterization in Digital FiltersB.M. Sallam, Menouf University, Egypt
Approach to Algorithmic/Conceptual Design Using MATLABBruce Newman, Integrated Systems Consultants, USA
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Software Design Ream Dynamics: A Case StudyLois Fennimore, Sparton Corporation, USA
Real-Time Multiprocessor Kernel: Hierarchical LINDA, Eric Yao, B. Jardin, Y.H. Park, A. Belloum and K.M. HouUniversitŽ de Technologie de Compiegne, France
Virtuoso: Providing Sub-Microsecond Context Switching on DSPs with a Dedicated Nanokernel, Eric VerhulstIntelligent Systems International, Inc., Belgium
An Autoscaling Assembler for the TMS320C25Wonyong Sung and Seehyun Kim, Seoul National University, Korea
A DSP Real-Time Kernel for Fast Digital Control Using LabVIEW for User Interaction, Anders Carlsson, Sweden
Object-Oriented DSP Programming, Klas Nilsson, Lund Institute of TechnologySweden
Some New Benchmark Proposals for DSP Performance Evaluations of a Single and Multiprocessor System: A System Approach, Omprakesh M. Sharma and Dmitri V. Korchev, Image & Signal Processing, Inc., USA
Designing for ADPCM Data Transmission, Dominique Genin and Kjell CoolsMentor Graphics Corporation, Belgium
Using "C" to Interconnect DSPs, Memories, and I/O Channels, Bo Varga andBrad Taylor, Giga Operations Corporation, USA
Programming a Fixed-Point DSP for Embedded Digital Audio Processing Brent Karley, Motorola, USA
DSP TECHNOLOGY
Real-Time Instruction Cache Optimized for DSP in the Motorola DSP96002Avner Goren, Eyal Melamed-Cohen, and Paul MarinoMotorola Semiconductor Israel, Ltd., Israel
HX24 24-Bit Fixed Point Digital Signal ProcessorToru Baji, A. Kiuchi, D. Gorny, L. Kwong, J. Harrison, K. Nitta, S. Amsel, T. Sakata, H.Shimizu, J. Mok, S. Kao, P.C. Lu, A. Kikuchi, T. Akazawa, K. Kaneko, and S. Hagiwara, Hitachi Corporation, Japan and USA
Programmable Architectures for Real-Time Video CompressionTom Kopet, array Microsystems, USA
A Low-Cost DSP Solution for Consumer Applications Frank Ferro, AT&T Microelectronics, USA
A Programmable High Performance IIR Filter ChipR.F. Woods and G. Floyd, GEC Plessey Semiconductors, UKK. Wood, Timestar Developments, UK, andJ.V.McCanny, Integrated Silicon Systems, Ltd., UK
Single Chip Digital Down Converter Enhances Communication System Performance, Clay Olmstead and Mike Petrowski, Harris Semiconductor, USA
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What Can Block Floating-Point Arithmetic do For DSP ApplicationsChwen-Jye Ju, Sharp Microelectronics Technology, Inc., USA
IMAGE ANALYSIS & CODING
Color Classification of Images Based on Binary Tree Splitting MethodGabriel Marcu, Graphica Computer Corporation, Japan
Fractal Image Compression Using a Motorola DSP96002 Yoram Or-Chen, Nimrod Peleg, Bareket Raz, and Omer TzifroniThe Technion - IIT, Israel
An Image Processing System for Locating and Reading PDF417 Two-Dimensional Bar Codes, Steven J. Shellhammer and Arman Nikzad, Symbol Technologies, Inc., USA and Mitsunori Kubo, Olympus Optical Company, Japan
Repeated Applications of the JPEG Image Compression TechniqueSyin Chan, Nanyang Technological University, Singapore
High-Resolution Reconstruction of Video Frames Wen-yu Su and S.P. Kim, Polytechnic University, USA
A Feature Preserved Medium Rate BTC Quantizer Shan Lin and M. Gina Lu, Iowa State University, USA
Subband Coding of Videoconference Sequences at 384 KbpsAlonso Tirso, Minsky Luo, Homayoun Shari, and Donald J. Youtkus,AT&T Bell Laboratories, USA
Design and Implementation of Soft Morphological FiltersChristopher C. Pu and Frank Y. Shih, New Jersey Institute of Technology, USA
Variable Block-Size Image Coding Using Region Growing K. Panusopone, K. Sarika, and F. Cheevasuvit, King Mongkut's Inst. of Technolog, Thailand
Higher Order Markov Models: An Effective Approach to Lossless Image Compression, Krystyna W.Ohnesorge, Peter Stucki, and M. Bichsel,University of Zurich, Switzerland
Wavelet-Based Motion Estimation in Image Sequence ProcessingJung-Jae Chao and Z.D. Lin, National Taiwan Ocean University, Taiwan, R.O.C.
A Study on the Halftoning Algorithm Using Hopfield Neural NetworkByeong-Soo Seo and Dong-Seok Jeong, Inha University, Korea
Halftone Algorithm Using Genetic Algorithm, Naoki Kobayashi and Hideo SaitoKeio University, Japan
Shift Variant Blind Deconvolution for Blurred Binary ImageHideo Saito and Masato Nakajima, Keio University, Japan
Behavior of Generalised Step Edges in Gaussian Scale SpaceAnoop Kulkarni, Indian Institute of Technology, India
ICM Filters for Image RestorationJae Hyun Park and L. Kurz, Polytechnic University, USA
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Morphological Scale Space for Shape SmoothingBen K. Jang, Eastman Kodak Company, USA
Image Vector Quantizer Design Using Entropy Coded Tree-Structured Maximum Descent Algorithm, Chi-kit Ma and Chan Chok-ki, City Polytechnic of Hong Kong,Hong Kong
Progressive Image Transmission Using Variabl Block Size Multistage Vector Quantization , Yin-Hei Chan, City Polytechnic of Hong Kong, Hong Kong
The Computation of Visual Components in a Sub-Band Decomposition of Images H. SŽnane, A. Saadane, and D. Barba, UniversitŽ de Nantes, France
A 2-D Transform-Domain Adaptive Filter Based on the 2-D Discrete Cosine Transform, Tokunbo Ogunfunmi, Santa Clara University and Fang-Chen Cheng Worcester Polytechnic Institute, USA
IMAGE PROCESSING IMPLEMENTATIONS
DSP96000 Image Processing Workstation, Mohamed El-Sharkawy, Waleed Eshmawy, and Kurt Becker, Purdue University, USA
BASIS: The Architecture and Implementation of a Real-Time Image Processing System, BŒrd Tokerud and Vidar S. Anderson, Norwegian Defence Research Establishment, Norway
Digital Signal Processor Based Multiprocessor System for Real-Time Industrial Image Processing, Arp‡d Bakay, Hungarian Academy of Sciences, Hungary
High Performance 2-D CCD Imager, Mark M. Giza, Army Research Laboratory, USA
A Reconfigurable and Flexible Parallel Architecture Based on DSP TMS320C40 Dedicated to 3-D Reconstruction, Adam Belloum, Agus Trihandoyo, Eric Yao, Mahmoud MŽribout, Xiao-Wei Tu, Mohamed Shawky, Keli Li, Jorge Luis Mayorquim and Kun Mean Hou, Universite de Technologie de Compiegne, France
DSP Accelerator for the Wavelet Compression/Decompression of High Resolution Images, Martin A. Hunt, Shaun S. Gleason, and W. Bruce Jatko, Oak Ridge National Laboratory, USA
Integrating Parallel Edge Detection Schemes Using Neural Network Arbitration, Masn Ramalho and K.M. Curtis, University of Nottingham, UK
IMAGE UNDERSTANDING/ RESTORATION
Wigner Distribution for 2-D Motion Estimation from Noisy ImagesVinay G. Vaidya, The Boeing Company, USA and Robert M. Haralick, University of Washington, USA
A Human-Machine Interactive System for Efficient Image ReconstructionHong Tang, La Trobe University, Australia
Preliminary Test Results of a Model Based Method for Segmenting Merged Symbols in a Typewritten Text, Hamadi Jamali and Hussein Al-Hussein,Canon Research Center America, Inc., USA
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Image Processing for Extension of the Depth of Focus in Microscopic Photography, Masao Yajima and Y. Yamamoto, Sankyo Seiki Mfg., Japan M. Ohki and S. Hashiguchi, Yamanashi University, Japan
A Study on the Face Identification System Using Combined Facial Features and Counter-Propagation Neural Network, Myeong-Soo Oh and Dong-Seok Jeong, Inha University, Korea
Detection of Arbitrary Objects in Images Using Hough Technique: An Efficient Approach, H. Al-Hamadi and W.W. Boles, Queensland University of Technology, Australia
A Fast Algorithm for Vehicle Identification Using Digital Signal Processors V. Kamat and S. Ganesan, Oakland University, USA
Estimation of Skew Angle in Text Image Analysis by SLIDE: Subspace-Based Line Detection, Hamid K. Aghajan, Babak H. Khalaj and Thomas Kailath,Stanford University, USA
INDUSTRIAL AND SPECIALIZED APPLICATIONS
Evaluating Metal Cleanliness Using DSP Technology, Gregory Carayannis and Xiaodong Shi, McGill University Metals Processing Ctr., Canada
Nuclear Pulse Processors Using Digital Filters, L.F. Godbout and Hemchandra Shertukde, University of Hartford, USA
DSP Based Two-Dimensional Bar Code Laser Scanning SystemJohn Barile, Symbol Technologies, Inc., USA
Automated Visual Inspection for IC Wire-bond Using Auto-Focusing Technique, Wei Zhang, Han Ooi Lim, and Liang Mong Koh, Nanyang Technological University, Singapore
Active Noise Attentuation in Duct Using the X-BLMS Algorithm, Jiewen Liu and Qun Shen, Active Noise & Vibration Technologies, USA
Fuzzy and Neural Systems to Control Two Inverted Pendulums,Boubekeur Mendil and Kheir Benhammed, UniversitŽ Ferhat Abbas, Algeria
Fast PC Videoboard for Insect Flight Simulator, J. Balendonck, P.J. Nijenhuis,G.W. Haalboom, and F.W.H. Kampers, Tech. & Phys. Eng. Rsrch. Serv. (TFDL), Netherlands
DSP-Based Harmonic Distortion Measurement System, Following IEC 1000-4-7 Standard, Jesœs Ruiz, Elisabete Aramendi, Alvaro Ubierna, ETSI Industriales e I. de Telecomunicaci—n, Spain, L. Alberto Leturiondo, Universidad del Pais Vasco, andJavier Amantegui, Iberdrola S.A., Spain
Application of Adaptive Processing to On-Line System Identification and Optimal Control in the Hydrocarbon Industry, Gary L. Funk, SYSTEMHOUSE, USA
Application of Digital Signal Processing to Highway Bridge MonitoringQinghong Cao, Scott A.Segan, Weiping Li, and Ben T. Yen, Lehigh University, USA
Implementation of Recursive Correlation Algorithm for Real-Time Measurements of a Varying Time Delay, Carl During and Kennet Jansson,Royal Institute of Technology, Sweden
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A Data Reduction and Analysis Workstation for Space-Based SensorsGary Simmons, Michael Hatch, and Carl Bero, Nichols Research Corporation, USA
DSP Applications in the Control of Uninterruptable Power SuppliesTerry Zumwalt, International Power Machines, USA
Advances in Magnet Bearing Systems through the Use of New DSP Technology Ron Kipp, Kingsbury, Inc., USA
Application of Adaptive Noise Cancellation to Wafer Shape Measurements O.Dumas, Bahram Shafai, Hanoch Lev-Ari, and D.H. Brooks, Northeastern University, USA
Using a DSP as an Embedded Emulation ControllerDavid Ruimy Gonzales, Motorola, USA
INSTRUMENTATION AND TESTING
A DSP-Based Data Acquisition System for Propagation Experiments with the Olympus Satellite, Jorge Luis Vieira Rodrigues, Antonio Joaquim da Sila, and Armando Carlos Domingues da Rocha, University of Aveiro, Portugal
Real-Time Combustion Analyzer Using GenIE, Tien D. Doan, Caterpillar, Inc., USA
Microcomputer-Based Intelligent Instrumentation System for Automatic Testing of Microprocessors, D.K. Mishra, Shri G.S. Institute of Tech.
Science, India
MULTIMEDIA
DeskMax TM: PC Multimedia Conferencing System, Eduardo PŽrezVTEL Corporation, USA
Low Cost DSP for Multimedia Applications, Shaul Berger, Yael Gross and Gideon Wertheizer, DSP Semiconductors, Inc., USA
Synthesis and Control of Hundreds of Sinusoidal Partials on a Desktop Computer without Custom Hardware, Adrian Freed, Xavier Rodet, and Philipp DepalleUniversity of California-Berkeley, Dept. of Music, USA
A High Performance Audio Codec for VideoconferencingAnthony Crossman, PictureTel Corporation, USA
NEURAL NETWORKS
An Improved Learning Algorithm for Principal Component AnalysisShyang Chang and Liang-Hwa Chen, National Tsing Hua University, Taiwan, R.O.C.
Self-Restorable Stochastic Neurocontrol Using Back-Propation and Forward-Propagation Training Algorithms, Mario Mastriani, Universidad de Buenos Aires, Argentina
A Fast Adaptive Algorithm for Training Multilayer PerceptronsChung S. Leung, Texas A & M University - Kingsville, USA
A New Neural Network-Based Algorithm for Vector Quantization, Ce Zhu and Jun Wang, Lihua Li, and Zhenya He, Southeast University, P.R. China
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Multicriteria Neural Network with Applications for Image Reconstruction from Projections, Yuanmei Wang, Zhejiang University, P.R. China and B. Roy Frieden University of Arizona, USA
A Neural Network Approach to Array Processing Brigitte Colnet, CRIN-INRIA, France
PARALLEL PROCESSING
Correlation Used in Real-Time Image Processing, Bjorn Rudberg and BŒrd Tokerud, Norwegian Defence Research Establishment, Norway
Emerging Trends in Super Computing, with Emphasis on Image and Signal Processing Applications, Louis Schirm, IV, Image & Signal Processing, Inc., USA
2-D FFTs on a Distributed Memory Multiprocessing DSP-Based Architectures, Yedidiah Solowiejczyk and Steve Dick, EDO Corporation, USA
Communications Issues Related to the Application of Systolic/Synchronous Concepts for Real-Time Systems, Raja Prasad, Swiss Federal Institute of Technology, Switzerland
A Hierarchical Parallel Processor for Digital Signal Processing Applications. Douglas Wilmarth, SKY Computers, Inc., USA
The Fig Board: A Parallel DSP Solution, Rob Hayd, Clark University, USAYousif Asfour, Boston University, USA
New Ways in Image Processing with Parallel DSPs, Manfred Helzlehema Elektronik, Germany
Simulation-Engine and Performance Measurements on a Multi-DSP Architecture with TMS320C40, Marco Platzer, Christian Steger and Reinhold Weiss, Graz University of Technology, Austria
PROCESSOR ARCHITECTURES
Embedded Computing with a Comprehensive Reduced Instruction Set Processor,Ravi Rao, Intel, USA
On-Chip Parallelism in Digital Signal Processing, Ravi Rao, Intel, USA
A General Purpose Processing System Based on Digital Signal ProcessorsClaudio Campa, Oerlikon-Contraves A.G., Switzerland, E. Rossini and P. D'Alessandro, Contraves Italiana S.p.A., Italy
Real-Time DSP Architectures: A Case StudyJohn Zeiler, Sparton Corporation, USA
The Carry Increment Adder: A Fast Adder Structure for DSP ApplicationsHyunsik Jang, Kuchang Kang, Chuldong Oh, Kisoo Hwang, Hyundai Electronics, Ltd.Korea
A Large Memory Floating Point DSP Supporting Cluster Mutli-Processing Architectures, Bill Windsor, Analog Devices, Inc., USA
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RADAR
Time Sidelobe Suppression for Random Binary Phase Codes, Gu Hong, Guosui Liu and Xiaohua Zhu, East China Institute of Technology, P.R. China
VHF Sensor Array Real Data Processing Technique for DirectionFengzhen Wang and John Litva and Titus Lo, McMaster University, Canada
ADS System Implementation StudyLu Boying, Beijing University of Aeronautics & Astronautics, P.R. China
Entropy Analysis of Acquisition Process, Qiao Xiaolin, Liu Yongtan, and Wang Li, Harbin Institute of Technology, P.R. China
A DSP-Based Data Processing System for MST RadarEnrico Ragaini, Martin F. Sarango, and Edilberto Vasquez,Universidad de Piura - Peru, Peru
A New Source Separation Algorithm for Overcoming Signal Cancellation Problems, C.C. Ko and Z.Y. Wu, National University of Singapore, Singapore
On the Novel Application of Number Theoretic Methods to Radar Detection, Vaughan Clarkson, Defence Science & Technology Organisation, AustraliaJane Perkins, Coop. Rsrch Ctr. for Robust & Adapt. Systems, Australia
Some Results on AMTD Schemes Based on AR Map Method, K.M.M. Prabhu and A. Saimanohara, Indian Institute of Technology, IndiaV.P. Haneefa, INSAT Master Control Facility, India
An Ultra High Speed 1 Megapoint Fast Convolver Phillip Roberts, Catalina Research, Inc., USA
Adaptive Fixed Range Radar ReceiverLarry Scally, Catalina Research, Inc., USA
An MTI Processor for Ultrawideband RadarsF. Al-Faraj and Hussain Al-Ahmad, University of Bradford, U.K.
RADIO, SATCOM & NAV SYSTEMS
A Voice Communications Simulator, Erik Espe and Vidar Solli,Micro Processor Systems A.S., Norway
A DSP Implemented FSK Detector Generating Side Information in a Frequency-Hopping HF System, Arne Lindblad, National Defence Research Establishment, Sweden
Wideband HF Receiver with Digital Quadrature Splitting, Frederik Oscarsson and Arne Lindblad, National Defence Research Establishment, Sweden
A GPS Acquisition System Using Acousto-OpticsO. Bazzi and R. Torguet, UniversitŽ de Valenciennes, France
DSP Implementation of a Spread Spectrum Receiver Using High Level Code Synthesis, Matthias Pankert and Oliver Mauss, Aachen University of Technology, Germany
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A New Approach to Decode an FM Stereo Signal Using a DSPMark E. Utter, Texas Instruments, USA
DQPSK Spread Spectrum Performance in the Frequency Selective Fading Channel, Manouchehr Rafie and Soo Kwan Eo, Comdisco Systems, Inc., USA
ROBOTICS
Force Signal Processing and Control for Surgical Robot SystemT. Wang, M. Fadda, S. Martelli, M. Martacci and P. DarioInstituto Ortopedico Rizzoli, Italy
Fuzzy Controlled Robotic Manipulator Using the Motorola MC96002, R.D. Daruwala and A.A. Chachad, Victoria Jubilee Technical Institute, India
A Fuzzy ASIC Set for Robotic Arm ControlArif Khan, Dhananjay Keskar, Kushagra Vaid, and A.S.J. VijayanandVictoria Jubilee Technical Institute, India
3-D Surface Approximation Using Polygons of Fixed Orientation for a Vision System in a Mobile Robot , H. Al-Hamadi, Queensland University of Technology, Australia, and H.T. Tsul, The Chinese University of Hong Kong, Hong Kong
Motion Planning and Control under Uncertainty While Sensing the EnvironmentClaudio Facchinetti, Institute for Microtechnology, Switzerland
A Mobile Robot Architecture for Navigating in a Constraint Environment: Contribution of Fuzzy and State-Feedback Control to the System EfficiencyNathalie Pons, G. Bourdon, S. Delaplace, Laboratoire de Robotique de Paris, France
SPEECH CODING ALGORITHMS
Singular-Vector-Excited Linear Predictive (SVELP) Speech CodingMiguel Arjona Ram’rez and Normands Alens, University of S‹o Paulo, Brazil
Improving CELP Voice Quality by Modifying the ExcitationMiguel A. Ferrer-Ballester and Anibal R. Figueiras-Vidal, UPM, Spain
Least Squares Multi-Pulse Linear Predictive AnalysisKadri Hacioglu, Eastern Mediterranean University, Turkey
SPEECH CODING IMPLEMENTATION
Real-Time Implementation of High Quality Wideband Audio LD-CELP Coder at 32kpbs Using Two-DSP Hardware, Yair Shoham and Oded Gottesman,AT&T Bell Laboratories, USA
Dynamic Excitation Model for Linear Predictive 2400 BPS VocoderEugene P. Ponomariev, Signal-ROKS, Ltd., Russia
Lattice Filters for Adaptive Postfiltering and CELP CodingEugene P. Ponomariev, Signal-ROKS, Ltd., Russia
Real-Time Implementation of a Wideband Speech Coder,Erik Harborg and F.T. Johansen,SINTEF DELAB, NorwayJ.E. Knudsen and A. Fuldseth, Norwegian Telecom Research, Norway
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Real-Time Implementation of the Homomorphic Vocoder, Shahram Hoseini, Mohammad R. Nakhai and Mahmoud Tabiani, Sharif University of Technology, Iran
Speech Compression Using ARMA Model and Wavelet TransformSung-Won Park, Texas A & M University - Kingsville, USA
Real-Time Processing of a Low Bit Rate TCELP Coder/Decoder on DSP Motorola 56001, AndrŽ Goalic and S. Saoudi, ENST - Groupe Communications NumŽriques,France
A Mid-Complexity Coder for Voice Mail, J-P. Renard and J-F. RasaminjanaharyLernout & Hauspie Speech Products, Belgium
Speech Downsampling-Coding with High-Frequency Estimation Using Neural Networks, Hideyuki Urita and Kiyoshi Mizui, Kanto Gakuin University, Japan
Computationally Minimized 6.8 kbps CELP for Real-Time Recorder with a 16-bit Fixed-Point DSP Core, Jae-Bum Hong, Bang W. Lee, Kyosik Lee and Youngjin Kim,Samsung Electronics Company, Korea
A Low Bit-Rate Speech CODEC Suitable for Cellular Radio Systems, Yoshiaki Asakawa, Hidetoshi Sekine, Makoto Takashima, Nobuyoshi Ishikawa, and Toshiyuki Matsuda, Hitachi, Ltd., Japan
VoicePumpª: Voice-Over-Data Modem Technology Utilizing ASM-CELP Speech Compression at 4800, 7200, and 9600 Bits per Second, Cole Erskine and Steve Ammon, Analogical Systems, USA
Study on the Improvement of the Synthesized Speech Quality, Minsoo Hahn, Dong-Gyu Kang and Siong Hun Lee, Electronics & Telecom. Research Inst., Korea
A Fixed-Point Implementation of CELP Speech VocoderJ.F. Rasaminjanahary, Lernout & Hauspie Speech Products, Belgium
A Flexible Multi-Rate Speech CoderTerrence G. Champion, Rome Laboratories, USAJoseph B. Evans, University of Kansas, USA
SPEECH RECOGNITION ALGORITHMS
A New Diphone Extraction Technique, Gatot Soemarwoto and Jean-Hsang Lin, University of Delaware, USATimothy Bunnell and Debbie Yarrington, Univ. of Deleware-A.I. Du Pont Institute, USA
Wavelet Parameterization for Speech Recognition, Richard F. Faveroand andRobin W. King, University of Sydney, Australia
A Simple and Efficient Voiced/Unvoiced Classifier, Gao Yang, FacultŽ Polytechnique de Mons, BelgiumH. Leich, Lernout & Hauspie Speech Products, N.V., Belgium
SPEECH RECOGNITION IMPLEMENTATION
Continuous HMM for Word Spotting and Rejection of Non Vocabulary Words in Speech Recognition Over Telephone Networks, Jianming Song,University of Sydney, Australia
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Multi-Speaker Speech Recognition with Neural NetworksZhang Li-Peng and Li Li-Mei, Beijing Univ. of Posts & Telecom, P.R. China
Performance and Cost Comparison of Automatic Speech Recognition System Implementations Based on New High Speed RISC Workstations, Giuliano Antoniol, Fabio Brugnara, Mauro Cettolo, Roberto Fiutem, Roberto Flor, Gianni Lazzari,I.R.S.T., Italy
A Representation for Recognition of Isolated Words Spoken in the Romanian Language, Corneliu Burileanu, Politechnic University of Bucharest, RomaniaLuigi Eduard Bojan, Research Institute for Automation, Romania
Speaker Independent Persian Speech RecognitionM. Tabiani, F. Fekri, Mohammad R. Nakhai,Sharif University of Technology, Iran
Cepstral Coefficients as Inputs to a Multilayer Perceptron Neural Net for Speaker Identification, David Dunn, United States Air Force Academy, USA
An Experimental System for Automatic Speaker RecognitionCiro A. Martinez and Hernando Silva-Varela, CICESE Research, USA
Automatic Sampling System for Speaker Recognition Using the the Interspectral Coherence Function, Luis-Manuel Tom‡s Balibrea, Antonio Garcia Sanchez, Jose-Maria Fernadez Mero–o and Jose-Luis Ramon Garcia, University of Murcia, Spain
Intercepstral Correlation in Speakers Identification/Verification With Very Short Speech Signal, A. Garcia-Sanchez, J.L. Ramon, F. Martinez GonzalezUniversidad de Murcia, Spain
Real-Time Continuous Speech Recognition Integrating Extensive Grammars for Spoken Language, David Clementino and Egidio GiachinCentro Studi e Lab. Telecomunicazioni, Italy
Development of a Real-Time Endpoint Detection Algorithm, Hang Seop Lee and Minsoo Hahn, Electronics & Telecom. Research Inst., Korea
Adaptive Condensed Nearest Neighbour Network with an Interruptable Retraining Mode in Speech Recognition, D. Barschdorff and U. Gaertner, University of Paderborn, Germany
SPEECH RECOGNITION PRODUCTS
The Use of Speech Processing for an In-Car Voice I/O, Filip De GeijterLernout & Hauspie Speech Products, Belgium
Speech Processing in the PC Environment, Filip De GeijterLernout & Hauspie Speech Products, Belgium
A Compact and Cost-Effective Speaker-Dependent Isolated Word Recognition System for Consumer Applications, Youngjin Kim, Geun-Rae Cho, Bang W.Lee, Kyosik Lee, Jae-Bum Hong, Samsung Electronics Company, Korea
Consumer Product Applications of Speech Recognition Technology, S. Bayle and S.J. Bachorski, AT&T Microelectronics, USA
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UNDERWATER SYSTEMS & SONAR
An Application of DSP Technique in Underwater Target Automatic TrackingQihu Li, Institute of Acoustics Academia Sinica, P.R. China
GPS-Based Underwater Positioning, Jung-Jae Chao, C.C. Lee, and T.S. LeeNational Taiwan Ocean University, Taiwan, R.O.C.
Real-Time DSP-Based Underwater Communications, Victor Barroso, Pedro Geada and Jo‹o P. Gomes, Instituto Superior TŽcnico, Portugal
Real-Time Quality Assessment of Seismic Time Series, Peter K. M¿ller, Technical University of Denmark, Denmark
VLSI ARCHITECTURES
VLSI Architectures for Fast Orthogonal Transforms On-Line ComputationHamid Bessalah, CNSR Lab. LIP-IMAGE, France
An Improved Logarithmic Conversion MethodErik Hertz, National Defence Research Establishment, SwedenMats Torkelsson, Lund University, Sweden
A Prototype SCalable Array Processor (SCAP), Warren Marwood and A.P. Clarke,Materials Research Laboratory, Australia
Modular Matrix Multiplication on Systolic Arrays with Bounded I/O Bandwidth. Salah Seleim and M. Nazih El-Derini, Alexandria University, Egypt
A VLSI Inner Product Processor with Built-In Self-Test for Real-Time DSP Applications, Chiung-Hsing Chen and Janusz Starzyk, Ohio University, USA
VLSI BAM CHIP, S.M. Rezaul Hasan and Ng Kang Siong, Universiti Sains MalaysiaMalaysia
DAC: A Silicon Compiler Framework for the Design of DSP ASICsJ.V. McCanny, Y. Hu and M. Yan, Queen's University of Belfast, UK
Asynchronous Systolic Realization for One-Step Adaptive Lattice PredictorsKamran Reihani and Miguel Mayorga, New Mexico State University, USA
A Systolic Structure for 2-D Digital Filters, David Heffer, Zhirun Hu, Graham King, and Zhijian Hu, Southampton Institute, UK
A Linear Systolic Array Using DSP Microprocessors, A. Mahanta and R.K. SharmaIndian Institute of Technology, India
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HOTEL ACCOMMODATIONS
Host Hotel (Adjacent to the Santa Clara Convention Center)
The Westin Hotel Santa Clara Tel: (408) 986-0700
5101 Great America Parkway Tel: (800) 228-3000
Santa Clara, CA 95054 Fax: (408) 980-3990
@ $ 110* Single Room $ 120* Double Room
Other Hotels (Within a 3-km radius of the Convention Center)
Santa Clara Marriott Hotel Tel: (408) 988-1500
Great America Parkway & Hgwy 101 Tel: (800) 228-9290
Santa Clara, CA 95054 Fax: (408) 727-4353
@ $ 165 Single Room $ 180 Double Room
Biltmore Hotel & Suites-Silicon Valley Tel: (408) 988-8411
2151 Laurelwood Road Tel: (800) 255-9925
Santa Clara, CA 95054 Fax: (408) 988-0225
@ $ 106 Single Room $ 121 Double Room
@ $ 129 Single Suite $ 149 Double Suite
Embassy Suites Tel: (408) 496-6400
2885 Lakeside Drive Tel: (800) 362-2779
Santa Clara, CA 95054 Fax: (408) 988-7529
@ $ 159 Single Suite $ 174 Double Suite
Quality Suites - Silicon Valley Tel: (408) 748-9800
3100 Lakeside Drive Tel: (800) 345-1554
Santa Clara, CA 95054 Fax: (408) 748-1476
@ $ 115 Single Suite $ 125 Double Suite
*Please mention ICSPAT and/or DSP WORLD EXPO in order to obtain these special
rates.
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ICSPAT U93 - REGISTRATION FORM
First Name (Given Name)
Last Name (Family Name)
Company/ Organization
Department/ Division
Mailing Address
City State/ Province
Zip/ Postal Code Country
Telephone Fax
E-Mail
Registration Fees:
%Early Registration (Received on or before August 25, 1993)
$ 495.00 Regular Admission
$ 350.00 Student Admission w/valid ID
%Late Registration (Received after August 25, 1993)
$ 595.00 Regular Admission
$ 425.00 Student Admission w/valid ID
Optional Workshop:
%{Sign-up early: workshops with minimal enrollment may be cancelled.}
$ 250.00 Full-Day Workshop #
$ 150.00 Half-Day Workshop #
Accepted Methods of Payment (Payment must be made in US$ only)
%Checks (Drawn on U.S. Banks only)
Check #______ Amount
%Bank Transfers
Draft # Amount
%Credit Cards (circle one) Mastercard VISA Amount
Card # Exp.
Name on Card
Signature
Please fill out the top of this form and mail or fax it with payment to:
DSP Associates Tel: (617) 964-3817
18 Peregrine Road Fax: (617) 969-6689
Newton Centre, MA 02159 - USA email: DSPW...@world.std.com
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DSP WORLD EXPO '93
A Partial List of Exhibitors
Alacron, Inc. Loughborough Sound Images
Analog Devices, Inc. Mentor Graphics/EDC
Analogic/CDA Mercury Computer Sys., Inc.
Analogical Systems Mizar, Inc.
Ariel Corporation Motorola
AT&T Microelectronics Pentek, Inc.
CADIS GmbH Precision Filters, Inc.
Catalina Research, Inc. PTR Prentice Hall, Inc.
Comdisco Systems, Inc. The Rainier Company
CSPI, Inc. Sharp Microelectronics Corp.
DSP Research, Inc. Spectron Microsystems, Inc.
DSP Software Eng., Inc. Spectrum Sig. Proc., Inc.
Dynetics, Inc. Star Semiconductor
Electronic Engineering Times Sunnyside Systems, Ltd.
hema Electronik GmbH Texas Instruments, Inc.
Hyperception, Inc. Traquair Data Systems, Inc.
Intelligent Systems IntUl, Inc. Wintriss Engineering Corp.
Kluwer Academic Publishers Wolfram Research, Inc.
* Limited exhibit space is still available
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