ECL logic computers ?
Robert Bennetts
can anybody out there tell me why ECL logic is not used to construct
computers (to my knowledge anyway) considering the quite fast speeds it can
run at.I know it uses more power than CMOS logic, and has a smaller distinction
between logic high and low, and has a few other disadvantages.But doesn't it
also have the capability of running at 400 to 500 MHz.If the disadvantages
could be overcome, would a computer using this logic be able to run much faster
than a computer using CMOS logic, given the equivalent chip design.
For example, if you re-designed an Intel 8086 or something using ECL logic
gates.Would this chip now be able to run at 400 to 500 MHz.I know such a chip
would be bigger in physical size than the original, because of lower gate
density with ECL (one of the other disadvantages I mentioned), but if it could
run at the above speed, wouldn't it be worth the effort.
P.S. Try not to flame me if this concept is rediculous, I am only a student
and the idea came to me in a lecture.
Robert Bennetts.
-> rben...@gara.une.oz.au
OR
rben...@neumann.une.oz.au
OR
rben...@loki.une.oz.au
Matthew Klapman
In reference to ECL computers,
my friend just left for California to start his new job with Amdohl (spelling?).
He told me that they specialize in mainframe computers and they design
exclusively in ECL.
ECL computers are currently too expensive, however, as a computer engineer,
my only experience with actually prototyping devices with ECL was for
high speed / high-res graphic boards.
- Matthew Klapman
Future Vision Technologies
Rex Di Bona
> Hi,
> can anybody out there tell me why ECL logic is not used to construct
> computers (to my knowledge anyway)
It is. Some of the mainframes use it and the MIPS R6000 also uses it.
Why dont more people use it? Well, two reasons spring to mind. Even
having the CPU running fast you still need fast memory, and ECL ram
would cost, boy, would it cost. Also it would require massive power and
cooling.
The other reason is that CMOS is getting much faster. It was believe
that CMOS would run out of steam at (take your pick, 20, 30, 40, or
50MHz) at various times, but it still goes. You can buy a CMOS part
from Brooktree (a video DAC) that runs at up to 130Mhz or so, and I
have heard of a 200Mhz CMOS processor (DOD, but this might be an urban
myth :-)
So, the reason you don't see too many ECL machines out there is that
they would be a bigger headache to run, and cost MUCH more, and that
CMOS machines are catching up anyway! (The new HP snake machines, the
MIPS R4000 technology, and the RS6000 for example)
Also, when I was last designing chips (ages ago now) the design tools
knew much more about CMOS (and NMOS :-) than about ECL, so it was
easier to get that chip fabricated.
--------
Rex di Bona (r...@cs.su.oz.au)
Penguin Lust is NOT immoral
Andrew John Williams
> can anybody out there tell me why ECL logic is not used to construct
>computers (to my knowledge anyway) considering the quite fast speeds it can
>run at.I know it uses more power than CMOS logic,
>run at the above speed [400-500MHz], wouldn't it be worth the effort.
As far as I'm aware, the main reason is price. ECL is not cheap. Some
high-end machines do in fact use it, and they benefit from the extra
speed. But you pay for it. ECL chips are low-density (transistor size,
power consumption (too many gates and it melts)). Also, to run at
500MHz, you'd need rather fast RAM. OK, you say - build that with ECL as
well. Unfortunately... a few meg of ECL SRAM would fill a VERY large
box, require some very expensive cooling, and cost an absolute FORTUNE!.
People like their PCs small, cheap to buy and cheap to run. You could
run an ECL CPU with normal DRAM, but you'd lose almost all of the extra
speed.
John West (stealing Andrew's account)
wibblefish
Henry Spencer
It is. It's expensive, and needs lots of power and lots of cooling, so
you don't see it in workstations except for a chip or two to drive
monochrome hi-res video systems. In large servers and mainframes it is
not uncommon.
(As John Mashey has commented, a desktop ECL box would need no desk space,
because it could hover above the desk on its cooling fans.)
--
"We're thinking about upgrading from | Henry Spencer @ U of Toronto Zoology
SunOS 4.1.1 to SunOS 3.5." | he...@zoo.toronto.edu utzoo!henry
Jerome Grimmer
>rben...@gara.une.oz.au (Robert Bennetts) writes:
>> can anybody out there tell me why ECL logic is not used to construct
>>run at.I know it uses more power than CMOS logic,
>>...but if it could
>>run at the above speed [400-500MHz], wouldn't it be worth the effort.
>
>As far as I'm aware, the main reason is price. ECL is not cheap. Some
>high-end machines do in fact use it, and they benefit from the extra
>speed. But you pay for it. ECL chips are low-density (transistor size,
>power consumption (too many gates and it melts)). Also, to run at
>500MHz, you'd need rather fast RAM. OK, you say - build that with ECL as
>well. Unfortunately... a few meg of ECL SRAM would fill a VERY large
>box, require some very expensive cooling, and cost an absolute FORTUNE!.
>People like their PCs small, cheap to buy and cheap to run. You could
>run an ECL CPU with normal DRAM, but you'd lose almost all of the extra
>speed.
While this is true that ECL SRAM would fill a large box and be very
expensive, disregarding price, an ECL computer is still possible and you could
use normal DRAM without losing most of the extra speed, your processor would
necessarily be larger physically. You would need to endow it with LOTS of
registers (ala RISC I) and probably it would be desirable to force arithmetic
instructions to work with registers only. An internal stack for storing return
addresses would also be an advantage. If I were to design this, I would also
set up some ECL SRAM for a cache memory, (oh, say 64K or so, depending upon the
total addressable space of the computer) to further increase speed while still
being able to use normal DRAMS for main memory.
I think that in time (perhaps shorter than we think) CMOS may pass up current
ECL specifications for speed.
Jerome Grimmer
1st yr Senior EE at Southern Illinois University-Carbondale.
ST6...@siucvmb.cdale.siu.edu (Hey, it's a 5-yr program! :-))
ST6...@SIUCVMB.BITNET
ap...@cleveland.freenet.edu <--where I read my news.
Stephen Tell
Another problem with ECL is that it uses a lot of power, and therefore
dissapates a lot of heat. This means big power supplies and fans, etc., which
is fine for mainframes and special purpose stuff, but not for a desktop
machine.
Steve
--
Steve Tell te...@cs.unc.edu H: +1 919 968 1792 #5L Estes Park apts
CS Grad Student, UNC Chapel Hill. W: +1 919 962 1845 Carrboro NC 27510
Wilson P Snyder
ECL in computers? Most of the big mainframes use ECL, (recent Cray models excepted)
but it costs mega bucks.
Amhahl's most recent announced processor, the Amdahl 5995, has a 7ns cycle time (~150 Mhz).
The CPU dissapates several kW of heat in roughly a tenth of a cubic foot. Needless to say,
this requires liquid cooling.
Indeed a 8086 could be put into ECL, it would be much faster then the above, as it wouldn't
have all of the complexities of a mainframe CPU. Unfortunately, I don't think most people
want a car sized water chiller, $50 in power every hour (CPU + power + cooler...),
especially for a pricetag in the hundreds of thousands.
Realistically, there are other types of logic that are being developed that offer simular
speeds with much less power. This is what will be under the hood of the 1000 Mhz CPU that
a group at my school (Rensselaer Polytechnic Institute) plans to have working in 2 years.
(DARPA Funded.) Unfortunately, these new logic families don't yet enjoy mass production,
so the cost is still up there.
P. S. I could build a 10 THz+ computer with ECL now - but I'll leave you in charge of the
cooling system.
WATERS,CLYDE GORDON
>rben...@gara.une.oz.au (Robert Bennetts) writes:
>> can anybody out there tell me why ECL logic is not used to construct
>>computers (to my knowledge anyway) considering the quite fast speeds it can
>
>wibblefish
Another reason is that ECL seems to be a little (lot?) more noise-prone
than standard TTL logic. Since the transistors never saturate, the voltage
swing is not as great either. This means that the difference between '1'
and '0' is not as great anymore. Flipped bits and other errors caused
by voltage transients on the data lines can cause problems. I believe
that this is one primary reason that ECL is not used very much. The
equipment would have to be shielded better, also raisong the price.
I have heard of ECL being used on high-speed counters, but not for
much else. Unless the speed is ABSOLUTELY necessary, most designers
go for the more fool-proof arrangements.
My $.02
REgards,
Gordon.
--
WATERS,CLYDE GORDON-Georgia Institute of Technology Atlanta Ga 30332
******<LANGUAGE IS A VIRUS! - Laurie Anderson-Home of the Brave>*******
uucp: ...!{decvax,hplabs,ncar,purdue,rutgers}!gatech!prism!gt0869a
Internet: gt0...@prism.gatech.edu
Shailendra Save
> In article <71...@gara.une.oz.au> rben...@gara.une.oz.au (Robert Bennetts) writes:
>> Hi,
>> can anybody out there tell me why ECL logic is not used to construct
>> computers (to my knowledge anyway)
> from Brooktree (a video DAC) that runs at up to 130Mhz or so, and I
> have heard of a 200Mhz CMOS processor (DOD, but this might be an urban
> myth :-)
> So, the reason you don't see too many ECL machines out there is that
> they would be a bigger headache to run, and cost MUCH more, and that
> CMOS machines are catching up anyway! (The new HP snake machines, the
> MIPS R4000 technology, and the RS6000 for example)
I think that the prime reason that people are not designing in
ECL is because of power-dissipation problems. At very high
frequencies, CMOS power dissipation will also be too high.
The other reason why people do not use ECL, is that you need a
translation time to convert the signals from ECL to TTL (or CMOS)
levels. This in itself requires some time, and some interfacing.
At very high freq., this gets quite involved. ECL requires a Vee,
which is a negative voltage. So now you have to worry about three
power lines.
ECL though a very fast technology, suffers from power problems.
The other alternatives, ie. Gallium Arsenide (GaAs) and super het
junction (Si-Ge) provide higher speeds with lower power consumption.
Each has its own disadvantages. GaAs is too brittle, and tend
to crack from thermal stresses. But then it is so rad-hard, that
almost all micro-frequency applications of space are done using
GaAs.
The most common, the Cray supers, run at a clock of 2ns. Of
course, it uses GaAs. Convex also uses GaAs, but has higher levels
of integration than the Cray tech. Which also reminds me, that
technologies like CMOS are layer compatible, while GaAs, ECl etc
are not. This means that it is much harder to have a technology
independent silicon (read semiconductor) compiler for all the GaAs
technologies. Some new semis like InPs show much higher speeds,
but the tech. is still infant.
>
> Also, when I was last designing chips (ages ago now) the design tools
> knew much more about CMOS (and NMOS :-) than about ECL, so it was
> easier to get that chip fabricated.
> --------
> Rex di Bona (r...@cs.su.oz.au)
> Penguin Lust is NOT immoral
Shailendra
ss...@caen.engin.umich.edu
sumax!ole.uucp!ssave
Rob Warnock
(WATERS,CLYDE GORDON) writes:
+---------------
| Another reason is that ECL seems to be a little (lot?) more noise-prone
| than standard TTL logic.
Actually, there are reasons why ECL is *less* noise-prone, as well. Since
the power supply current is almost constant (current is switched between the
two output transistors but the total amount remains approximately constant,
excluding the load) and the voltage swing is *much* less, the power spikes and
"ground bounce" of TTL and high-speed CMOS are almost completely eliminated.
+---------------
| Flipped bits and other errors caused by voltage transients on the data
| lines can cause problems.
+---------------
But ECL runs with lower-impedance wiring, typically 50 ohms instead of 100+,
which makes it *less* succeptible to coupled transients. And ECL tends to
have edge rates that are closer to (or even, in some cases, *less* than)
the switching speeds, so that transition tend to be more like "ramps" than
"edges", which lessens noise.
I'm not saying ECL design is simple: you have to terminate any wire more
than a couple inches long; you have to fabricate your P.C. boards to achieve
a controlled impedance all along each wire (FORGET wire-wrap!); long wires
must use twisted pairs and differential receivers, or coax; controlling clock
skew across the board is a major nightmare. But many of these are true of
*any* high-performance logic, at today's speeds.
It still has its place...
-Rob
-----
Rob Warnock, MS-1L/515 rp...@sgi.com rp...@pei.com
Silicon Graphics, Inc. (415)335-1673 Protocol Engines, Inc.
2011 N. Shoreline Blvd.
Mountain View, CA 94039-7311
Edwards Thomas G S1A x8297
>From article <25...@cluster.cs.su.oz.au>, by r...@cs.su.oz (Rex Di Bona):
> ECL is because of power-dissipation problems. At very high
> frequencies, CMOS power dissipation will also be too high.
I use subthreshold CMOS (i.e. Vds < 1.5V) to avoid power dissipation
problems with analog circuits. Does anyone know of subthreshold
CMOS FET digital logic design? I imagine noise would be an immense
problem, but use of fault-tolerant design may enable this to be
a reasonable high-speed design method. Besides, it doesn't require
any special device technology, just special CMOS design.
-Tom
Phil Ngai
>P. S. I could build a 10 THz+ computer with ECL now - but I'll leave you in charge of the
>cooling system.
Sounds like bullshit to me.
--
"Like a rat deserting a sinking ship..."
Graham Flower
ECL is used in a number of computers. The design tools are there but it
is true that they are behind the CMOS tools. ECL is easy to get to 500Mhz.
It willl easily go much higher. I have personally designed circuits that
clock at over 6 gigaherz and ECL circuits that have clock rates as high as
10 gigaherz have been built. However at about a gigaherz life becomes
more complicated due to bond wire inductances and package parasitics.
To work above 1 gigaherz is no big deal but right noe there are no standardd
cheap packages that will make this stuff affordable for computers. This
will change. Computers will see alot of bipolar and bicmos in the future
as speeds require it. Computer communication will be an area where data
rates will have to be high and is a prime candidate for bipolar or GaAs.
Right now there are a bunch of people from 5 or 6 companies working on
this (hp is one ).
Another issue and probably the biggest reason for less ECL in computers
is the power dissipation of ECL. It is literally orders of magnitude
larger than CMOS. This means that you really cannot build a million
transistor chip in bipolar because the power is too great. Power
has limited bipolar chips to 10000 gates or so until recently. People
are now doing 50000 nor so. CMOS can do 10-100 times the gates with less
power. Bipolar tends to stay with the extreme performance types of
computers. IBM uses it in alot of mainfraimes especially were speed is
an issue. These computers are usually liquid cooled using pretty
interestin and innovative schemes which are far too expensive for a PC.
CMOS is easy to systemize into design libraries and it is easier to
use with automatic layout tools. Fewer mask steps means high yields
and quick turnarounds. Bipolar can do mixed functions and analog better,
but for low cost, quick turn system applications like PCs it cant
touch CMOS. Bipolar is harder to systemize for digital. ECL is notorious
for osillating if you are not careful on chip. Usually it is driving
too large of a capacitive load that hammers you.
graham flower
Hewlett Packard
San Jose
gra...@hpmsdpo.sj.hp.com
Andy Hill
> I use subthreshold CMOS (i.e. Vds < 1.5V) to avoid power dissipation
> problems with analog circuits. Does anyone know of subthreshold
> CMOS FET digital logic design? I imagine noise would be an immense
> problem, but use of fault-tolerant design may enable this to be
> a reasonable high-speed design method. Besides, it doesn't require
> any special device technology, just special CMOS design.
>
Haven't heard of any, but I would assume it would be because it would be dog
slow. To the best of my knowledge, subthreshold opamps / OTAs are used
where you need ridiculously low power consumption and aren't concerned about
bandwidth (correct me if I'm wrong - it's been a couple of years since I've
designed analog at the chip level). At low speeds, normal CMOS logic uses
practically no power. However, the push towards a ~3V (3.3V?) logic
standard promises lower power consumption at high speeds (remember, power
dissipation in CMOS logic is proportional to C*V^2*f).
Unfortunately, the lower Vdd will also make the logic more suceptable to
induced noise. We may be looking at the last gasp of single-ended
(as opposed to differential) electronic logic.
Andy
Kenneth Ng
: (As John Mashey has commented, a desktop ECL box would need no desk space,
: because it could hover above the desk on its cooling fans.)
Unless IBM makes it in which case you have to move your desk into the bathroom
or another source of running water. :-)
--
Kenneth Ng
Please reply to k...@hertz.njit.edu until this machine properly recieves mail.
"No problem, here's how you build it" -- R. Barclay, ST: TNG
Michael S. Pereckas
Cray Computer will be in GaAs. Some of IBM's mainframes are ECL. The
Cyber 205 was ECL.
Why not more ECL? Lower density than CMOS and vastly greater power
consumption. The Cray 1 managed to dissipate over 100 kW, according
to one spec. I saw (Which may or my not be correct). The Cray 2 CPU
is immersed in liquid coolent. So cooling is hard. It was the
hardest part of the design of the Cray 1. And a fast CPU needs a
large fast memory. 2 G-Bytes of static ram is pretty expensive, and
it needs space, power, and cooling.
Because the integration density of ECL is lower than CMOS you probably
need multiple chips for the CPU. Chip crossings are slow, and
interconnection delays can become dominant. Advanced packaging helps,
particularly the multichip modules, but that drives up costs.
GaAs offers the speed of ECL with much less power, which helps a lot.
CCC uses it to get more speed than ECL at the same power, but their
customers have deep pockets. I've seen a report on the possibilities
of a MIPS R3000 in GaAs, packaged in a multi-chip module with
floating-point and a very fast first-level cache. You'd then have a
large (very large) second-level cache implemented more normally.
Advanced packaging and the good integration density of the process (by
Vitesse (sp) I think) they studied prevented interconnect delays from
hiding the fast switching from you. Very intersting.
Another, more common, use for ECL or GaAs is for a few particularly
important chips in a more conventional machine. ECL has found limited
use in video adapters and Convex has used a few GaAs chips in their
newer machines.
--
< Michael Pereckas <> m-per...@uiuc.edu <> Just another student... >
``You can be real patient if you don't have a central nervous system''
---Dr. Ronald Pine
Keith A. Grimm
---Dr. Ronald Pine
It is my understanding that Seymour Cray never received any patents on his computers, just the innovative cooling systems for them.