Building 8086 using descrete TTL, PLDs, & FPGAs ?
Sugianto Kolim
I'm thinking of building a project described below, but I would like
to hear your opinions if this project is possible to be done.
If any of you had tried this before, I'd really like to hear your
experience.
My project is to built an 8086/88 compatible CPU using descrete components,
PLDs and FPGAs.
Or... instead of using only Descrete components, PLDs and FPGAs, I will
include a middle class RISC CPU. So what my circuit has to do is to translate
8086 instruction to the RISC instruction, and make the RISC bus cyle compatible
to that of 8086.
In any case, I do expect this CPU to outperform the 8086.
(So I won't waste my time making something stupid) :)
Let me know what you think.
S. Kolim _____________________________________________________________________
sko...@aludra.usc.edu ________________________________________________________
Charles Cashion
sk> I'm thinking of building a project described below, but I would like
sk> to hear your opinions if this project is possible to be done.
sk> My project is to built an 8086/88 compatible CPU
sk> using descrete components, PLDs and FPGAs.
sk> In any case, I do expect this CPU to outperform the 8086.
sk> (So I won't waste my time making something stupid) :)
....cough!
........choke!
...........sputter!
...............gasp!
I just hate it when somebody hands me a straight line, and I can't
instantly think of a cleaver come back.
Charles
+-------------------------------------------------------------------+
| DSC Communications "...here pigs will fly, |
| Charles Cashion lightning will strike twice, |
| 214-519-2583 hell will freeze over, and eventually, |
| ccas...@spd.dsccc.com things will get really interesting..." |
+-------------------------------------------------------------------+
Mark Zenier
: My project is to built an 8086/88 compatible CPU using descrete components,
: PLDs and FPGAs.
: In any case, I do expect this CPU to outperform the 8086.
: (So I won't waste my time making something stupid) :)
If you want to build your own processor, try cloning the ARM. It was
designed with the idea of minimum logic, as opposed to maximum performance
at a given technical capability. Actually that's maximum profit, not
performance. Intel has always specialized in stuffing as much stuff on
a chip as their current technology permits. This means that their chips
are bloated. If n customers are satisfied, every thing is fine, even if
each one doesn't use all the capabilities of a chip.
You won't be able to match in PLDs and wire what the big guys can do in
silicon. That boundry was crossed 10 to 15 years ago. The number of
pins, the prop. delays and the power needed to drive a wire on a pc board
cause a performance penalty that doesn't occur on chip.
Mark Zenier mze...@eskimo.com mze...@netcom.com
Richard MacDonald
>....cough!
>........choke!
>...........sputter!
>...............gasp!
Try "Beaver"
Rich
John Dekker
>My project is to built an 8086/88 compatible CPU using descrete components,
>PLDs and FPGAs.
>
>S. Kolim
_____________________________________________________________________
>sko...@aludra.usc.edu
________________________________________________________
>
CPU's have been out of FPGA's. Can anyone out there confirm this
and tell us which micros and which FPGA's.
Regards,
John Dekker.
Ian Robert Walker
Sugianto Kolim (sko...@phakt.usc.edu) wrote ( sk> )
> I'm thinking of building a project described below, but I would like
> to hear your opinions if this project is possible to be done.
>
> My project is to built an 8086/88 compatible CPU
>
> using descrete components, PLDs and FPGAs.
> In any case, I do expect this CPU to outperform the 8086.
> (So I won't waste my time making something stupid) :)
Ah, w-e-l-l yes it can be done. It will cost a lot more than buying an
8086, probably more than a Pentium which it wont outperform. But you will
have a very good understanding of how the 8086 works.
--
Ian G8ILZ
I have an IQ of 6 million, | How will it end?
or was it 6? | In fire.
Leon Heller
j...@dekker.manawatu.planet.co.nz "John Dekker" writes:
> >My project is to built an 8086/88 compatible CPU using descrete components,
> >PLDs and FPGAs.
> >
> >S. Kolim
> _____________________________________________________________________
> >sko...@aludra.usc.edu
> ________________________________________________________
> >
> Interesting, I think it can be done as I have heard that other
> CPU's have been out of FPGA's. Can anyone out there confirm this
> and tell us which micros and which FPGA's.
I've seen this sort of thing discussed recently on, I think, comp.fpga.
Most people doing this seem to have used a couple of Altera or Xilinx
devices to produce their own 16-bit RISC processor, or something of that
sort. They don't seem to have been interested in Intel-type
architectures - I can't say I blame them. 8-)
I've been thinking of implementing a simple 4-bit processor - like the
one designed in TTL by the (now sadly defunct) Amateur Computer Club
about 20 years ago - using a Lattice ispLSI 1016.
Leon
--
Leon Heller, G1HSM | "Do not adjust your mind, there is
E-mail le...@lfheller.demon.co.uk | a fault in reality": on a wall
Phone: +44 (0)1734 266679 | many years ago in Oxford.
Onat Ahmet
sko...@phakt.usc.edu writes:
>> My project is to built an 8086/88 compatible CPU using descrete components,
>> PLDs and FPGAs.
>>
Greetings,
Here in
Japan, they have published a book explaining how you can do this
for the Z80 (or was it the 8085?- does not really matter). It made
very good reading to understand what made this processor tick.
They used only TTL and EPROMs(for instruction decode I guess) though.
It was the size of a large service tray.
>> In any case, I do expect this CPU to outperform the 8086.
>> (So I won't waste my time making something stupid) :)
It is difficult to do that, because, even if it does outperform the 8086,
it will be more expensive than the 80286. I do not see how you can
build it cheaper than a 286, but perform better than a 8086...
Implementing a 8086 in discrete comps. is not a stupid thing to do
in my opinion, even if it turns out to be worse than a standard 8086.
You learn lots on the way!
>> S. Kolim
>> sko...@aludra.usc.edu
Ahmet ONAT
wa4...@vnet.ibm.com
>Sugianto Kolim (sko...@phakt.usc.edu) wrote ( sk> )
>
> sk> to hear your opinions if this project is possible to be done.
>
> sk> My project is to built an 8086/88 compatible CPU
> sk> using descrete components, PLDs and FPGAs.
>
> sk> In any case, I do expect this CPU to outperform the 8086.
> sk> (So I won't waste my time making something stupid) :)
>
>.....cough!
>.........choke!
>............sputter!
>................gasp!
>
>I just hate it when somebody hands me a straight line, and I can't
>instantly think of a cleaver come back.
>Charles
>+-------------------------------------------------------------------+
>| DSC Communications "...here pigs will fly, |
>| Charles Cashion lightning will strike twice, |
>| 214-519-2583 hell will freeze over, and eventually, |
>| ccas...@spd.dsccc.com things will get really interesting..." |
>+-------------------------------------------------------------------+
Back when I was in engineering school about 15 years ago, one of the
students there built a simple processor using SSI level TTL. It
implemented 4 op-codes (if I remember correctly) and occupied three lab
benches and used all of the prototyping boards in the lab. By pushing
the clock speed up to the very limit of the propagation delay times,
he was able to get about 100K operations per second. Of course, at
that time, we had 6800s running 1M operations per second, using a couple
of orders of magnitude less space and power, and costing a couple of
orders of magnitude less. I doubt if the situation has improved for
SSI level TTL designs versus VLSI designs.
Dave
Michael Jones
This is a lot easier than discrete,but the design software
is pricey.
You may be able to find an existing VHDL design.
Mike Jones,
Digital Dexterity Ltd.
Mike Collins
says...
>
>In article <2424...@dekker.manawatu.planet.co.nz>
> j...@dekker.manawatu.planet.co.nz "John Dekker" writes:
>
components,
>> >PLDs and FPGAs.
>> >
>> >S. Kolim
>> _____________________________________________________________________
>> >sko...@aludra.usc.edu
>> ________________________________________________________
>> >
>> Interesting, I think it can be done as I have heard that other
>> CPU's have been out of FPGA's. Can anyone out there confirm this
>> and tell us which micros and which FPGA's.
I worked many years ago on a Data General Nova computer with core memory
and a CPU built from TTL on a card that was about 15x15". FPGAs were
not available at the time. It used a very ingenious 16-bit instruction,
though the CPU dealt with only four bits at a time, handling 1Meg 16-bit
instructions per second. One of the semiconductor houses pirated the
design and put the board onto a chip (I think it was Fairchild) and
called it the Micro-Nova, but though the chip was still sold, Data
General took out an injunction to prevent them from using the name.
Nothing to do with anything, really - just thought you may be interested.
Cheers,
Mike.
Steven Murray
>>My project is to built an 8086/88 compatible CPU using descrete components,
>>PLDs and FPGAs.
>>sko...@aludra.usc.edu
>________________________________________________________
>Interesting, I think it can be done as I have heard that other
>CPU's have been out of FPGA's. Can anyone out there confirm this
>and tell us which micros and which FPGA's.
>Regards,
>John Dekker.
A friend of mine built a Z80 out of discrete components. He only built
one - wire wrap, but he did a great job. The final design could execute
Z80 code at 20Mhz, which was a heck of a lot better than the 8Mhz Z80
CPU's you could buy in those days. Ofcourse, its not practical, but
hey?! Who cares. If anyone is really interested in the details, you
could ask him direct: Lawrence, L...@nacjack.gen.nz
I'm sure he wouldn't mind - I might well have some of the facts wrong.
--
Steven Murray ste...@zeta.org.au
PO Box 1491, North Sydney The paper burns, but the words fly away.
NSW 2060, Australia. - Ben Joseph Akiba
Ingo Cyliax
>In <412oiv$o...@sun001.spd.dsccc.com>, ccas...@spd.dsccc.com (Charles Cashion) writes:
>>Sugianto Kolim (sko...@phakt.usc.edu) wrote ( sk> )
>>
>> sk> I'm thinking of building a project described below, but I would like
>> sk> to hear your opinions if this project is possible to be done.
>>
>> sk> My project is to built an 8086/88 compatible CPU
>> sk> using descrete components, PLDs and FPGAs.
>>
>> sk> In any case, I do expect this CPU to outperform the 8086.
>> sk> (So I won't waste my time making something stupid) :)
>
>students there built a simple processor using SSI level TTL. It
>implemented 4 op-codes (if I remember correctly) and occupied three lab
>benches and used all of the prototyping boards in the lab. By pushing
>the clock speed up to the very limit of the propagation delay times,
>he was able to get about 100K operations per second. Of course, at
>that time, we had 6800s running 1M operations per second, using a couple
>of orders of magnitude less space and power, and costing a couple of
>orders of magnitude less. I doubt if the situation has improved for
>SSI level TTL designs versus VLSI designs.
Students in one of our computer architecture labs build working pdp8s out
of PLDs and discrete TTL devices every year. The goal is to run/pass some
DEC diagnostics at the end of the class. I don't know how fast they run,
but since these use static memory instead of core, it should run much
faster than the original pdp8.
Anyway, it's perceived as a very hard lab, but they learn many skills
and concepts that would be hard to teach otherwise. I would encourage
anyone, who has time/chance/interest to do some hardware design/building.
Simulating hardware is one thing, but actually building something is a
whole new experience.
Building a processor from scratch is a pretty hard project, and the
808[86] is probably one of the hardest. However, if you are organized
and have good design methologies (something they are supposed to teach
in school) you can do it. On the other hand, you might want to consider
something tamer, like a 16bit RISC chip or the 6800.
See ya, -ingo
--
/* Ingo Cyliax, cyl...@cs.indiana.edu, +1 812 333 4854, +1 812 855 6984 (day) */
John DeFiore
In <41ecdg$3...@godzilla.zeta.org.au> ste...@zeta.org.au (Steven
Murray) writes:
>
>In <2424...@dekker.manawatu.planet.co.nz>
j...@dekker.manawatu.planet.co.nz (John Dekker) writes:
>
>
components,
>>>PLDs and FPGAs.
>>________________________________________________________
>>Interesting, I think it can be done as I have heard that other
>>CPU's have been out of FPGA's. Can anyone out there confirm this
>>and tell us which micros and which FPGA's.
>>Regards,
>>John Dekker.
>
>A friend of mine built a Z80 out of discrete components. He only
built
>one - wire wrap, but he did a great job. The final design could
execute
>Z80 code at 20Mhz, which was a heck of a lot better than the 8Mhz Z80
>CPU's you could buy in those days. Ofcourse, its not practical, but
>hey?! Who cares. If anyone is really interested in the details, you
>could ask him direct: Lawrence, L...@nacjack.gen.nz
>I'm sure he wouldn't mind - I might well have some of the facts wrong.
>--
>Steven Murray ste...@zeta.org.au
>PO Box 1491, North Sydney The paper burns, but the words fly
away.
>NSW 2060, Australia. - Ben Joseph Akiba
I saw a demo once of a hardware definition language system, where the
sales engineer loaded a disk of code describing an 8051 cpu into a PC,
which interfaced to their box. The box had a socket for a Xilinx FPGA,
which was programmed in minutes. The Xilinx was then substituted (with
an adapter socket) for an 8051 running an actual application, and it
worked just like the 8051! (Without the analog inputs, of course.) So
it is possible, and I don't remember the name of the vendor, but they
were a major company..... (I'm an analog guy so I didn't take notes.)
Good luck, it should be a good learning experience.
John DeFiore
Clark Jones
: ccas...@spd.dsccc.com (Charles Cashion) wrote:
: >Sugianto Kolim (sko...@phakt.usc.edu) wrote ( sk> )
: > sk> I'm thinking of building a project described below, but I would like
: > sk> to hear your opinions if this project is possible to be done.
: > sk> My project is to built an 8086/88 compatible CPU
: > sk> using descrete components, PLDs and FPGAs.
: > sk> In any case, I do expect this CPU to outperform the 8086.
: > sk> (So I won't waste my time making something stupid) :)
I didn't see the post, but just as an FYI, it is (or at least used to be)
fairly standard practice to "breadboard" new chip designs using TTL's,
PLD's, FPGA's, EPROM's, ad nauseum.
These breadboards are rarely as fast as the chips that they are supposed
to be emulating, but they do verify that the architecture will work.
(Except that there are architectural features that you can use on silicon
that you can't when you have seperate chips.) Usually they pull a lot
more power as well. They generally take many man-months to assemble.
So they are really non-trivial. There is a lot of pressure to get away
from them, but they do have their advantages, such as not relying on
the correctness of an underlying software simulator.
Clark
--
Disclaimer: The opinions expressed above are mine and not those of Schlumberger
because they are NOT covered by the patent agreement!
Phone: (602) 345-3638 Internet: jo...@San-Jose.ate.slb.com
Packet:(not currently available) RF: KI7TU ICBM: 33 20' 44"N 111 53' 47"W
Snail: Clark Jones, Schlumberger Technologies, 7855 S. River Pkwy #116, Tempe,
AZ 85284-1825
Federico Galvez-Durand Besnard
: In article <DDnyw...@austin.ibm.com>, <wa4...@vnet.ibm.com> wrote:
: >In <412oiv$o...@sun001.spd.dsccc.com>, ccas...@spd.dsccc.com (Charles Cashion) writes:
: >>
: >> sk> I'm thinking of building a project described below, but I would like
: >> sk> to hear your opinions if this project is possible to be done.
: >>
: >> sk> My project is to built an 8086/88 compatible CPU
: >> sk> using descrete components, PLDs and FPGAs.
: >>
: >> sk> In any case, I do expect this CPU to outperform the 8086.
: >> sk> (So I won't waste my time making something stupid) :)
: >Back when I was in engineering school about 15 years ago, one of the
--
+------------------------------------------------------------+
Federico Galvez-Durand e-mail: fi...@afsmail.cern.ch
CERN, PPE Division, ATLAS office: +41-22-767-3593
CH-1211, Geneva 23. fax : +41-22-767-8350
Switzerland.
+------------------------------------------------------------+
David Jacobow -FT-~
Onat Ahmet <on...@turbine.kuee.kyoto-u.ac.jp> wrote:
>In article <411on3$j...@phakt.usc.edu>
>sko...@phakt.usc.edu writes:
>
>>> PLDs and FPGAs.
>>>
>
>Greetings,
>
>Here in
>Japan, they have published a book explaining how you can do this
>for the Z80 (or was it the 8085?- does not really matter). It made
>very good reading to understand what made this processor tick.
>They used only TTL and EPROMs(for instruction decode I guess) though.
>It was the size of a large service tray.
>
Yes, do it! If you take your time and are careful you will have fun
with the project. Trying to create something with higher performance
should not be your goal.
For my senior thesis, I did an 8 bit uP with 30 or so instrcutions
in 2 Actel FPGAs, 4 EPROMS (it was microcontrolled) and a RAM for the
users program and data. We had access to some pretty good tools,
so that might be a defining factor on how easy this is.
Anyway, the Actel parts we used were crappy, and a good, large Xilinx
part should accomodate a more aggressive machine.
The 8086 is a microprogrammed machine, and you do not want to be
putting data type structures on an FPGA, so at the very least you
will need some EPROMS, too.
dave
**** dave jacobowitz **** djac...@sedona.intel.com
*** 5000 W. Chandler Blvd. C6-210 *** (w) 602 554 9469
** Chandler, AZ 85226 ** Not an Intel spokesperson
--
**** dave jacobowitz **** djac...@sedona.intel.com
*** 5000 W. Chandler Blvd. C6-210 *** (w) 602 554 9469
** Chandler, AZ 85226 ** Not an Intel spokesperson
Philip Freidin
What a neat thread :-)
Your project could be a lot of fun. You need to think about your goals
though. Here are some samples:
1) You need a cpu just like a 8086, only faster and more expensive
2) You need a cpu just like a 8086, only slower and more expensive
3) You want to REALLY learn all the gory details of the 8086
4) You want to learn about building hardware
5) You want to learn about using FPGAs
6) You want to learn about computer architecture
The 8086 has an incredibly horrible instruction set for someone trying
to copy it, as it is infested with an untold number of inconsistencies
and dependancies that will make it very hard to build an accurate emulation.
( The designers of 386/486/586/... are true engineering heroes, given the
foundation upon which they must build their ever faster cpus).
If your goals are like 1, 2, or 3 above, then the x86 emulator is what
you will want to build. If your goal is more like 4, 5, or 6, then I would
recomend that you choose either a more rational instruction set such as
6800, or 6502, or you build a RISC, which could be either an emulation
of an existing design (ARM, 29K, etc), or an instruction set of your own
design.
As to what is possible, I have built (in 1991) a 20 MIPS RISC processor
in 3/4 of a Xilinx 4005. ( this is one of their smaller chips. But like all
the XC4000 chips, it has on-board RAM, which I used to build the register
file in the CPU). Using current silicon, I am sure a faster CPU is
possible. It can also be very instructive if you are designing your own
instruction set, if you also write the cross assembler, and port a C
compiler to your new architecture. I have done all this, and it
was certainly worth it for me.
Good luck
Philip Freidin.
Network Voyager
Michael Jones <msoj...@cix.compulink.co.uk> wrote:
>8086 Should fit in an FPGA OK.
>This is a lot easier than discrete,but the design software
>is pricey.
>You may be able to find an existing VHDL design.
I've wanted to know what those two acronyms stand for the longest
of times FPGA and VHDL. There is a magazine called System Design that
makes use of them all the time and not defined them yet.
>
>Mike Jones,
>Digital Dexterity Ltd.
--
* *---- I'd appreciate a CC: Jes...@uh.edu
/ /--- Looking for online dictionary Comp. Eng. Tech.
----* *---- NOVELL | UNIX | Wildcat BBS | NTAS Dream Boulevard
David Jacobow -FT-~
>In article <DDq2x...@cix.compulink.co.uk>,
>Michael Jones <msoj...@cix.compulink.co.uk> wrote:
>>8086 Should fit in an FPGA OK.
>>This is a lot easier than discrete,but the design software
>>is pricey.
>>You may be able to find an existing VHDL design.
>
> I've wanted to know what those two acronyms stand for the longest
>of times FPGA and VHDL. There is a magazine called System Design that
>makes use of them all the time and not defined them yet.
>
Does that mean you know now?
VHDL stands for VHSICHDL which stands for Very High Speed Integrated
Circuit Hardware Description Language. It is a language used for
modelling, simulation, and synthesis of digital systems. It's a big
language, has an Ada-like feel to it (design by committee), and is
pretty flexible and capable.
An FPGA is a Field Programmable Gate Array. This is a chip made up
of user configurable logic cells. You basically tell the chip what
logic function it is going to implement at power up, or by burning it
in (depending on the type of FPGA). FPGAs are good for prototyping a new
design, but once you ramp up the volume the cost of an FPGA becomes
too much and using a real gate array makes more sense. Up the volume
some more and you might want a real semicustom chip.
dave
c