In this case, the 'river to the ppl' took a wrong turn.
with all due respect, FANUC 3T tells you almost nothing wrt what the OP is trying to do. One needs to open the box and find out what CPU is on the main board e.g. intel iX, ARM X, Atmel, etc. etc.
Knowing the CPU defines the ISA of the machine, and one can begin to figure out how to set up a logic analyzer to look at the machine instructions and execution. Configuring a small, simple ladder logic example or 5 and observing the instruction and address trace will provide some insight into what is being R/W to memory, EPROMS, etc. which can then be used to identify and decode the ladder login mnemonics used by the mfg.
From what I know, the approach taken to codify and execute ladder logic mnemonics is unique to the mfg. There are some general schemes/patterns used to execute the ladder program but again, every mfg has their own way of doing things.
If you really need to do things at this level, it is a LOT of work and a fair amount of guessing.
There have been a number of academic papers looking at various issues wrt Ladder Logic in general and in some cases, manufacturer specific details are sometimes contained in the paper. Perhaps googling may help you.
A JTAG connection and associated diagnostic software may be helpful as well.
Good luck
J