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LV/5V level shifting using 74HC gates
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Bruce Varley
Aug 27, 2012, 9:56:12 AM8/27/12
to
I need to convert LV (3.3v rail) signals to TTL levels (5V rail). My present
arrangement is to feed the LV to 74HC04 inputs, with a 5v supply on the
74HC04. That looks like it should be OK from the device datasheet, but I've
experienced one runaway, the chip got smoking hot. Could this be caused by
the fact that the inputs are not getting close enough to the rail voltage
when they're high? Or should I be looking for some other cause?
Is there another recommended approach for this level conversion? Required
rise/fall times are < 1uS, load is approx 1 LSTTL load. I'd really prefer to
avoid SMD devices if possible.
arrangement is to feed the LV to 74HC04 inputs, with a 5v supply on the
74HC04. That looks like it should be OK from the device datasheet, but I've
experienced one runaway, the chip got smoking hot. Could this be caused by
the fact that the inputs are not getting close enough to the rail voltage
when they're high? Or should I be looking for some other cause?
Is there another recommended approach for this level conversion? Required
rise/fall times are < 1uS, load is approx 1 LSTTL load. I'd really prefer to
avoid SMD devices if possible.
lang...@fonz.dk
Aug 27, 2012, 10:17:29 AM8/27/12
to
you can get voltage trnaslators s with separate supplys for each side
e.g. 74LVX3245
or you can use a 74hct04, Vihmin is 2.0V
-Lasse
Phil Hobbs
Aug 27, 2012, 10:18:57 AM8/27/12
to
is the only reason they still exist in any quantity. Alternatively, you
can put a diode in series with the HC's VDD pin to drop its supply to
4.3V and get a bit more margin.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics
160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058
hobbs at electrooptical dot net
http://electrooptical.net
George Herold
Aug 27, 2012, 10:09:07 AM8/27/12
to
ohms on the collector. Take the output from the collector... this
inverts things. You may need a schottky diode from base to
collector. (Baker clamp)
George H.
John Larkin
Aug 27, 2012, 11:15:14 AM8/27/12
to
On Mon, 27 Aug 2012 10:18:57 -0400, Phil Hobbs
<pcdhSpamM...@electrooptical.net> wrote:
>Bruce Varley wrote:
>>
>> I need to convert LV (3.3v rail) signals to TTL levels (5V rail). My present
>> arrangement is to feed the LV to 74HC04 inputs, with a 5v supply on the
>> 74HC04. That looks like it should be OK from the device datasheet, but I've
>> experienced one runaway, the chip got smoking hot. Could this be caused by
>> the fact that the inputs are not getting close enough to the rail voltage
>> when they're high? Or should I be looking for some other cause?
>>
>> Is there another recommended approach for this level conversion? Required
>> rise/fall times are < 1uS, load is approx 1 LSTTL load. I'd really prefer to
>> avoid SMD devices if possible.
>
>HCT devices are good for that--TTL went away, so 3.3->5V level shifting
>is the only reason they still exist in any quantity. Alternatively, you
>can put a diode in series with the HC's VDD pin to drop its supply to
>4.3V and get a bit more margin.
>
>Cheers
>
>Phil Hobbs
Right. With Vcc=5 and Vin=3.3, expect shoot-through currents in the
<pcdhSpamM...@electrooptical.net> wrote:
>Bruce Varley wrote:
>>
>> I need to convert LV (3.3v rail) signals to TTL levels (5V rail). My present
>> arrangement is to feed the LV to 74HC04 inputs, with a 5v supply on the
>> 74HC04. That looks like it should be OK from the device datasheet, but I've
>> experienced one runaway, the chip got smoking hot. Could this be caused by
>> the fact that the inputs are not getting close enough to the rail voltage
>> when they're high? Or should I be looking for some other cause?
>>
>> Is there another recommended approach for this level conversion? Required
>> rise/fall times are < 1uS, load is approx 1 LSTTL load. I'd really prefer to
>> avoid SMD devices if possible.
>
>HCT devices are good for that--TTL went away, so 3.3->5V level shifting
>is the only reason they still exist in any quantity. Alternatively, you
>can put a diode in series with the HC's VDD pin to drop its supply to
>4.3V and get a bit more margin.
>
>Cheers
>
>Phil Hobbs
sub-mA range for an HCT04.
--
John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Uwe Hercksen
Aug 27, 2012, 11:27:50 AM8/27/12
to
Bruce Varley schrieb:
> I need to convert LV (3.3v rail) signals to TTL levels (5V rail). My present
> arrangement is to feed the LV to 74HC04 inputs, with a 5v supply on the
> 74HC04.
it is not a good idea to feed a 74HC04 with a high signal of 3.3 V or
even less. If the HC04 has a 5 V supply, the high level on input should
be close to 5 V. A 74LS04 should be compatible with the logic levels of
the LV signals, a 74HCT04 should be possible too. Just compare the
output levels of the LV signal with the input specification.
Bye
Jim Thompson
Aug 27, 2012, 12:52:23 PM8/27/12
to
On Mon, 27 Aug 2012 21:56:12 +0800, "Bruce Varley" <b...@NoSpam.com>
wrote:
74LVC4245A
-OR-
Page 2 of this:
http://www.analog-innovations.com/SED/LogicLevelTranslator.pdf
-OR-
http://www.analog-innovations.com/SED/LogicLevelTranslator74HC14-RevA.pdf
-OR Simply-
http://www.analog-innovations.com/SED/MAGIC-BLOCK.pdf
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
wrote:
-OR-
Page 2 of this:
http://www.analog-innovations.com/SED/LogicLevelTranslator.pdf
-OR-
http://www.analog-innovations.com/SED/LogicLevelTranslator74HC14-RevA.pdf
-OR Simply-
http://www.analog-innovations.com/SED/MAGIC-BLOCK.pdf
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
hamilton
Aug 27, 2012, 1:09:43 PM8/27/12
to
On 8/27/2012 9:27 AM, Uwe Hercksen wrote:
> it is not a good idea to feed a 74HC04 with a high signal of 3.3 V or
> even less. If the HC04 has a 5 V supply, the high level on input should
> be close to 5 V. A 74LS04 should be compatible with the logic levels of
> the LV signals, a 74HCT04 should be possible too. Just compare the
> output levels of the LV signal with the input specification.
>
> Bye
>
I follow the opposite levels.
> it is not a good idea to feed a 74HC04 with a high signal of 3.3 V or
> even less. If the HC04 has a 5 V supply, the high level on input should
> be close to 5 V. A 74LS04 should be compatible with the logic levels of
> the LV signals, a 74HCT04 should be possible too. Just compare the
> output levels of the LV signal with the input specification.
>
> Bye
>
Vcc on the 74HCT04 gets 3.3 volts and the outputs go to the lower
voltage side.
The first line of this data sheet states:
http://www.nxp.com/documents/data_sheet/74HC_HCT04.pdf
"The inputs include clamp diodes that enable the
use of current limiting resistors to interface inputs to voltages in
excess of VCC."
A simple series resistor between the +5V output from a microcontroller
is all that's needed.
On the other side 3.3V output into the input of a microcontroller is
more then high enough.
hamilton
Tim Wescott
Aug 27, 2012, 4:28:39 PM8/27/12
to
On Mon, 27 Aug 2012 21:56:12 +0800, Bruce Varley wrote:
> I need to convert LV (3.3v rail) signals to TTL levels (5V rail).
My inner nerd says:
> I need to convert LV (3.3v rail) signals to TTL levels (5V rail).
Actually, TTL output high levels are significantly below 5V -- I can't
remember whether it's 2.7V or 3V or what, but it's a stretch below 5.
So for really-o truly-o _TTL_ levels, you're already fine.
If you want 5V CMOS, of course, you're screwed.
74HCT. Or AHCT. Or just about anything with a "CT" in the name.
--
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?
Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com
whit3rd
Aug 27, 2012, 4:43:44 PM8/27/12
to
On Monday, August 27, 2012 6:56:12 AM UTC-7, Bruce Varley wrote:
> I need to convert LV (3.3v rail) signals to TTL levels (5V rail)....
mentioned yet, since you can tolerate relatively slow rise/fall times,
is a biased transistor. These are one-input/one-output devices,
and will always invert the logic. UNR4211 from DigiKey is typical.
There's still leaded parts available; buy 'em quick, though! Three terminals
is typical (input, output, ground); you just add a pullup resistor on the output.
> I need to convert LV (3.3v rail) signals to TTL levels (5V rail)....
> rise/fall times are < 1uS, load is approx 1 LSTTL load. I'd really prefer to
> avoid SMD devices if possible.
Avoiding SMD isn't always possible, of course; one path that hasn't been
> avoid SMD devices if possible.
mentioned yet, since you can tolerate relatively slow rise/fall times,
is a biased transistor. These are one-input/one-output devices,
and will always invert the logic. UNR4211 from DigiKey is typical.
There's still leaded parts available; buy 'em quick, though! Three terminals
is typical (input, output, ground); you just add a pullup resistor on the output.
Jim Thompson
Aug 27, 2012, 5:23:11 PM8/27/12
to
On Mon, 27 Aug 2012 15:28:39 -0500, Tim Wescott <t...@seemywebsite.com>
wrote:
>On Mon, 27 Aug 2012 21:56:12 +0800, Bruce Varley wrote:
>
>> I need to convert LV (3.3v rail) signals to TTL levels (5V rail).
>
>My inner nerd says:
>
>Actually, TTL output high levels are significantly below 5V -- I can't
>remember whether it's 2.7V or 3V or what, but it's a stretch below 5.
>
>So for really-o truly-o _TTL_ levels, you're already fine.
>
>If you want 5V CMOS, of course, you're screwed.
>
>> My
>> present arrangement is to feed the LV to 74HC04 inputs, with a 5v supply
>> on the 74HC04. That looks like it should be OK from the device
>> datasheet, but I've experienced one runaway, the chip got smoking hot.
>> Could this be caused by the fact that the inputs are not getting close
>> enough to the rail voltage when they're high? Or should I be looking for
>> some other cause?
>>
>> Is there another recommended approach for this level conversion?
>> Required rise/fall times are < 1uS, load is approx 1 LSTTL load. I'd
>> really prefer to avoid SMD devices if possible.
>
>(Jumping on the bandwagon)
>
>74HCT. Or AHCT. Or just about anything with a "CT" in the name.
The OP used mixed metaphors... "1 LSTTL load" and "feed the LV to
74HC04 inputs".
I posted several possible ways to address that.
wrote:
>On Mon, 27 Aug 2012 21:56:12 +0800, Bruce Varley wrote:
>
>> I need to convert LV (3.3v rail) signals to TTL levels (5V rail).
>
>My inner nerd says:
>
>Actually, TTL output high levels are significantly below 5V -- I can't
>remember whether it's 2.7V or 3V or what, but it's a stretch below 5.
>
>So for really-o truly-o _TTL_ levels, you're already fine.
>
>If you want 5V CMOS, of course, you're screwed.
>
>> My
>> present arrangement is to feed the LV to 74HC04 inputs, with a 5v supply
>> on the 74HC04. That looks like it should be OK from the device
>> datasheet, but I've experienced one runaway, the chip got smoking hot.
>> Could this be caused by the fact that the inputs are not getting close
>> enough to the rail voltage when they're high? Or should I be looking for
>> some other cause?
>>
>> Is there another recommended approach for this level conversion?
>> Required rise/fall times are < 1uS, load is approx 1 LSTTL load. I'd
>> really prefer to avoid SMD devices if possible.
>
>(Jumping on the bandwagon)
>
>74HCT. Or AHCT. Or just about anything with a "CT" in the name.
74HC04 inputs".
I posted several possible ways to address that.
Jamie
Aug 27, 2012, 8:17:07 PM8/27/12
to
5 VOLT o-----o|___|-o----------o
Pull Up |
| 5 V logic
| |\
o o-----o-----o-| >O-
Vdd 3.3 | 1200 |/ |/
o--o|___|-o----o--o| NPN
| |>
|-----o----| o
| | |
| o---------------o
| | IO
| |
| uC |
| |
| |
| |
| |
| |
| |
| |
|-----------
-
Something like that?
Jamie
Tim Williams
Aug 27, 2012, 9:22:37 PM8/27/12
to
Cascodes are an excellent way to level shift; they work for signals and
power (extending the voltage range of an already sufficiently high current
switch), and they tend to go fast. If the base is biased inbetween rails,
the logic level also provides turn-off current. PNPs work great for
below-ground work, etc.
Tim
--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
"Jamie" <jamie_ka1lpa_not_v...@charter.net> wrote in
message news:5WT_r.5388$pd4....@newsfe21.iad...
power (extending the voltage range of an already sufficiently high current
switch), and they tend to go fast. If the base is biased inbetween rails,
the logic level also provides turn-off current. PNPs work great for
below-ground work, etc.
Tim
--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
"Jamie" <jamie_ka1lpa_not_v...@charter.net> wrote in
message news:5WT_r.5388$pd4....@newsfe21.iad...
lang...@fonz.dk
Aug 28, 2012, 12:06:37 PM8/28/12
to
On 28 Aug., 02:04, Jamie
It works, but for a simple 3.3-5 translation it would use more power
and
be slower than a HCT gate, NXP spec max 590uA per pin at Vin = Vcc -
2.1V
-Lasse
and
be slower than a HCT gate, NXP spec max 590uA per pin at Vin = Vcc -
2.1V
-Lasse
bloggs.fred...@gmail.com
Aug 28, 2012, 3:05:15 PM8/28/12
to
Jim Thompson
Aug 28, 2012, 3:26:48 PM8/28/12
to
"...arrangement is to feed the LV to 74HC04 inputs, with a 5v supply."
OP has very loose understanding of LSTTL vs HC and HCT.
3.3V, even into HCT, may not be adequate to quench overlap current.
In...
Date: Mon, 27 Aug 2012 09:52:23 -0700
Message-ID: <7i8n38t233l01d2p5...@4ax.com>
I posted multiple ways to attack the problem.
lang...@fonz.dk
Aug 28, 2012, 4:03:37 PM8/28/12
to
On 28 Aug., 21:26, Jim Thompson <To-Email-Use-The-Envelope-I...@On-My-
> In...
>
> Date: Mon, 27 Aug 2012 09:52:23 -0700
> Message-ID: <7i8n38t233l01d2p5...@4ax.com>
>
> I posted multiple ways to attack the problem.
>
first lots of parts
last two will use more current than HCT at wc
-Lasse
Web-Site.com> wrote:
> On Tue, 28 Aug 2012 12:05:15 -0700 (PDT),
>
>
>
>
>
>
>
>
>
> bloggs.fredbloggs.f...@gmail.com wrote:
> >On Monday, August 27, 2012 9:56:12 AM UTC-4, Bruce Varley wrote:
> >> I need to convert LV (3.3v rail) signals to TTL levels (5V rail). My present
>
> >> arrangement is to feed the LV to 74HC04 inputs, with a 5v supply on the
>
> >> 74HC04. That looks like it should be OK from the device datasheet, but I've
>
> >> experienced one runaway, the chip got smoking hot. Could this be caused by
>
> >> the fact that the inputs are not getting close enough to the rail voltage
>
> >> when they're high? Or should I be looking for some other cause?
>
> >> Is there another recommended approach for this level conversion? Required
>
> >> rise/fall times are < 1uS, load is approx 1 LSTTL load. I'd really prefer to
>
> >> avoid SMD devices if possible.
>
> >CMOS 3.3V LVC can drive 1 U.L. LSTTL directly, no translator required. Is that simplified enough for you?
>
> Fred, You missed...
>
> "...arrangement is to feed the LV to 74HC04 inputs, with a 5v supply."
>
> OP has very loose understanding of LSTTL vs HC and HCT.
>
> 3.3V, even into HCT, may not be adequate to quench overlap current.
>
NXP specs HCT, max 590uA per pin @ Vin = Vcc - 2.1V
> On Tue, 28 Aug 2012 12:05:15 -0700 (PDT),
>
>
>
>
>
>
>
>
>
> bloggs.fredbloggs.f...@gmail.com wrote:
> >On Monday, August 27, 2012 9:56:12 AM UTC-4, Bruce Varley wrote:
> >> I need to convert LV (3.3v rail) signals to TTL levels (5V rail). My present
>
> >> arrangement is to feed the LV to 74HC04 inputs, with a 5v supply on the
>
> >> 74HC04. That looks like it should be OK from the device datasheet, but I've
>
> >> experienced one runaway, the chip got smoking hot. Could this be caused by
>
> >> the fact that the inputs are not getting close enough to the rail voltage
>
> >> when they're high? Or should I be looking for some other cause?
>
> >> Is there another recommended approach for this level conversion? Required
>
> >> rise/fall times are < 1uS, load is approx 1 LSTTL load. I'd really prefer to
>
> >> avoid SMD devices if possible.
>
> >CMOS 3.3V LVC can drive 1 U.L. LSTTL directly, no translator required. Is that simplified enough for you?
>
> Fred, You missed...
>
> "...arrangement is to feed the LV to 74HC04 inputs, with a 5v supply."
>
> OP has very loose understanding of LSTTL vs HC and HCT.
>
> 3.3V, even into HCT, may not be adequate to quench overlap current.
>
> In...
>
> Date: Mon, 27 Aug 2012 09:52:23 -0700
> Message-ID: <7i8n38t233l01d2p5...@4ax.com>
>
> I posted multiple ways to attack the problem.
>
last two will use more current than HCT at wc
-Lasse
bloggs.fred...@gmail.com
Aug 28, 2012, 4:15:29 PM8/28/12
to
Jim Thompson
Aug 28, 2012, 4:25:09 PM8/28/12
to
On Tue, 28 Aug 2012 13:15:29 -0700 (PDT),
[snip]
In my ASIC world I've been doing the device-level equivalent of...
Page 1 of this:
http://www.analog-innovations.com/SED/LogicLevelTranslator.pdf
Dating back to my (patented) USB work with Intel... ~18 years ago.
>>
>>
>> I love to cook with wine. Sometimes I even put it in the food.
>
>Sounded to me like the 74HC04 was his cut at level translating to drive an ultimate load of LSTTL. There's no way a HC anything looks like LSTTL loading.
I'm not sure _what_ the OP really has ;-)
>>
>> I love to cook with wine. Sometimes I even put it in the food.
>
>Sounded to me like the 74HC04 was his cut at level translating to drive an ultimate load of LSTTL. There's no way a HC anything looks like LSTTL loading.
In my ASIC world I've been doing the device-level equivalent of...
Page 1 of this:
http://www.analog-innovations.com/SED/LogicLevelTranslator.pdf
Dating back to my (patented) USB work with Intel... ~18 years ago.
Joe Chisolm
Aug 28, 2012, 5:41:44 PM8/28/12
to
times in the <500ns or so range. I have used the HCT before for this
but driven from a micro with a fast rise/fall time.
And the PDIP part is still around.
> In...
>
> Date: Mon, 27 Aug 2012 09:52:23 -0700 Message-ID:
> <7i8n38t233l01d2p5...@4ax.com>
>
> I posted multiple ways to attack the problem.
>
> ...Jim Thompson
--
Republic of Texas
bloggs.fred...@gmail.com
Aug 28, 2012, 6:00:13 PM8/28/12
to
Jim Thompson
Aug 28, 2012, 6:26:40 PM8/28/12
to
On Tue, 28 Aug 2012 15:00:13 -0700 (PDT),
[snip]
>
>Clever.
Thanks!
>
>Clever.
Thanks!
Jamie
Aug 28, 2012, 6:50:29 PM8/28/12
to
IO pins for higher voltages at high speed, normally up around 12volts.
1 us is nothing for the above when layed out properly using smt.
Jamie
Jamie
Aug 28, 2012, 7:03:05 PM8/28/12
to
Tim Williams wrote:
> Cascodes are an excellent way to level shift; they work for signals and
> power (extending the voltage range of an already sufficiently high current
> switch), and they tend to go fast. If the base is biased inbetween rails,
> the logic level also provides turn-off current. PNPs work great for
> below-ground work, etc.
>
> Tim
>
I some times use a pnp as a cheap constant current source as the pull
> Cascodes are an excellent way to level shift; they work for signals and
> power (extending the voltage range of an already sufficiently high current
> switch), and they tend to go fast. If the base is biased inbetween rails,
> the logic level also provides turn-off current. PNPs work great for
> below-ground work, etc.
>
> Tim
>
up instead of an (R). This greatly improves the raise time problem and
reduces timing issues if this was to be a critical timing application.
Also I find that some family of logic requires a nice snappy raise
and fall for proper operation.
The only hitch I have against using PNP's is their famous failures
in the base-emitter junction. They may have corrected this by now but
I keep this little note in the back of my head at all times when I have
my pencil scribbling away.
Jamie
lang...@fonz.dk
Aug 28, 2012, 7:25:14 PM8/28/12
to
On 29 Aug., 00:37, Jamie
<jamie_ka1lpa_not_valid_after_ka1l...@charter.net> wrote:
sure for higher voltages, but for 3.3 to 5 HCT is simple an you
schematic
will use more in base current alone
>
> 1 us is nothing for the above when layed out properly using smt.
sure but limited by how much you want to spend on pull up current
HCT is ~20ns
-Lasse
<jamie_ka1lpa_not_valid_after_ka1l...@charter.net> wrote:
schematic
will use more in base current alone
>
> 1 us is nothing for the above when layed out properly using smt.
HCT is ~20ns
-Lasse
Fred Bartoli
Aug 29, 2012, 5:00:03 AM8/29/12
to
lang...@fonz.dk a écrit :
I use that a lot :
>>>> ___
>>>> 5 VOLT o-----o|___|-o-----------o
>>>> 20K |
>>>> | 5 V logic
>>>> | |\
>>>> o ,-----+-----o-| >O-
>>>> Vdd 3.3 | |--' | |/
>>>> o-----------------o|<-+ |
>>>> | |--+ ===
>>>> |-----o----| + |
>>>> | | | |
>>>> | o----------------+-----'
>>>> | | IO
>>>> | |
>>>> | uC |
>>>> | |
>>>> | |
>>>> |-----------
On rising edge the cap gets you through the threshold AFAP and the pull
finishes the swing (when it has time)...
On falling edge all is reseted.
--
Thanks,
Fred.
>>>> ___
>>>> 5 VOLT o-----o|___|-o-----------o
>>>> 20K |
>>>> | 5 V logic
>>>> | |\
>>>> o ,-----+-----o-| >O-
>>>> Vdd 3.3 | |--' | |/
>>>> o-----------------o|<-+ |
>>>> | |--+ ===
>>>> |-----o----| + |
>>>> | | | |
>>>> | o----------------+-----'
>>>> | | IO
>>>> | |
>>>> | uC |
>>>> | |
>>>> | |
>>>> |-----------
On rising edge the cap gets you through the threshold AFAP and the pull
finishes the swing (when it has time)...
On falling edge all is reseted.
--
Thanks,
Fred.
Jim Thompson
Aug 29, 2012, 11:58:52 AM8/29/12
to
in...
Originally posted here by me on 9/18/2006 :-)
whit3rd
Aug 29, 2012, 1:12:21 PM8/29/12
to
On Tuesday, August 28, 2012 1:25:10 PM UTC-7, Jim Thompson wrote:
> >> >On Monday, August 27, 2012 9:56:12 AM UTC-4, Bruce Varley wrote:
> >> >> I need to convert LV (3.3v rail) signals to TTL levels (5V rail).
> >> >On Monday, August 27, 2012 9:56:12 AM UTC-4, Bruce Varley wrote:
> >> >> I need to convert LV (3.3v rail) signals to TTL levels (5V rail).
> In my ASIC world I've been doing the device-level equivalent of...
> http://www.analog-innovations.com/SED/LogicLevelTranslator.pdf
OOOH! Sneaky! And right about when I was wondering if I could
breadboard it up with a 4007, I paged down to the second panel...
The only weakness, is that it requires two power supplies (but that's
part of the problem statement). It's easy to generalize to
(for instance) +5 logic to +/-5V.
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