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Good Cheese - Student Edition
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Jim Thompson
May 20, 2012, 5:01:15 PM5/20/12
to
Good Cheese - Student Edition:
Per expectations, the LDO made from an MC33072 driving a ZXMN6A25G is
barely stable, even when heavily pre-loaded...
http://www.analog-innovations.com/SED/MC33072_ZXMN6A25G_LDO_Evaluation.pdf
I evaluated Loop Gain and Phase for a variety of pre-load currents
from 10mA to 200mA, using a pure current source load.
I then went back and evaluated Loop Gain and Phase at the same
currents, but produced using a load resistance, knowing from
experience that resistive loads improve phase margin because they kill
loop gain (11.5° resistive, versus 10.3° with pure current load).
(ASIC's generally _do_not_ behave as resistive loads... so beware.)
Wowee! Ain't that super?
The last two pages are "curve trace" of the ZXMN6A25G device. At such
a low drop it's essentially a voltage-controlled resistor, which
helps... pre-loading increases the GBW... observe the gain/phase
plots.
Those that care can read thru the thread... I never claimed that
designing LDO's was easy. I just responded to Spehro's comment...
From: Spehro Pefhany <spef...@interlogDOTyou.knowwhat>
Newsgroups: sci.electronics.design
Subject: Re: Why no depletion mode LDOs?
Organization: Rather
Message-ID: <2f5iq75b66170gve1...@4ax.com>
"Thanks for posting this.
Why the 10 ohm dummy loads? You're throwing away 230mA. Does it
overshoot a bit with a light load?
Best regards,
Spehro Pefhany"
with...
From: Jim Thompson <To-Email-Use-Th...@On-My-Web-Site.com>
Newsgroups: sci.electronics.design
Subject: Re: Why no depletion mode LDOs?
Date: Wed, 09 May 2012 10:00:42 -0700
Message-ID: <ik8lq7t2b9km83upq...@4ax.com>
"Otherwise it's unstable. So much for "designing LDO's".
...Jim Thompson"
Thinking over the issue of having a resistive pass device, I suspect
the ultimate solution to workable LDO's may be a lot like Tektronix'
approach to DC-to-video amplifiers in the far past...
A low bandwidth, high DC-gain amplifier, but AC-feed-forward to get
the transient response and stability.
The "Great Obnoxious One" has tweaked my curiosity into this
interesting problem area :-)
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
Per expectations, the LDO made from an MC33072 driving a ZXMN6A25G is
barely stable, even when heavily pre-loaded...
http://www.analog-innovations.com/SED/MC33072_ZXMN6A25G_LDO_Evaluation.pdf
I evaluated Loop Gain and Phase for a variety of pre-load currents
from 10mA to 200mA, using a pure current source load.
I then went back and evaluated Loop Gain and Phase at the same
currents, but produced using a load resistance, knowing from
experience that resistive loads improve phase margin because they kill
loop gain (11.5° resistive, versus 10.3° with pure current load).
(ASIC's generally _do_not_ behave as resistive loads... so beware.)
Wowee! Ain't that super?
The last two pages are "curve trace" of the ZXMN6A25G device. At such
a low drop it's essentially a voltage-controlled resistor, which
helps... pre-loading increases the GBW... observe the gain/phase
plots.
Those that care can read thru the thread... I never claimed that
designing LDO's was easy. I just responded to Spehro's comment...
From: Spehro Pefhany <spef...@interlogDOTyou.knowwhat>
Newsgroups: sci.electronics.design
Subject: Re: Why no depletion mode LDOs?
Organization: Rather
Message-ID: <2f5iq75b66170gve1...@4ax.com>
"Thanks for posting this.
Why the 10 ohm dummy loads? You're throwing away 230mA. Does it
overshoot a bit with a light load?
Best regards,
Spehro Pefhany"
with...
From: Jim Thompson <To-Email-Use-Th...@On-My-Web-Site.com>
Newsgroups: sci.electronics.design
Subject: Re: Why no depletion mode LDOs?
Date: Wed, 09 May 2012 10:00:42 -0700
Message-ID: <ik8lq7t2b9km83upq...@4ax.com>
"Otherwise it's unstable. So much for "designing LDO's".
...Jim Thompson"
Thinking over the issue of having a resistive pass device, I suspect
the ultimate solution to workable LDO's may be a lot like Tektronix'
approach to DC-to-video amplifiers in the far past...
A low bandwidth, high DC-gain amplifier, but AC-feed-forward to get
the transient response and stability.
The "Great Obnoxious One" has tweaked my curiosity into this
interesting problem area :-)
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
kevin93
May 20, 2012, 5:53:43 PM5/20/12
to
On May 20, 2:01 pm, Jim Thompson <To-Email-Use-The-Envelope-I...@On-My-
Nice plots
What was the ESR of the two output caps?
I expect that a few 10's of mOhms of resistance in series with the
output caps would improve the stability.
kevin
Web-Site.com> wrote:
> Good Cheese - Student Edition:
>
> Per expectations, the LDO made from an MC33072 driving a ZXMN6A25G is
> barely stable, even when heavily pre-loaded...
...
> Good Cheese - Student Edition:
>
> Per expectations, the LDO made from an MC33072 driving a ZXMN6A25G is
> barely stable, even when heavily pre-loaded...
Nice plots
What was the ESR of the two output caps?
I expect that a few 10's of mOhms of resistance in series with the
output caps would improve the stability.
kevin
John Larkin
May 20, 2012, 6:01:55 PM5/20/12
to
>
> ...Jim Thompson
That's a lot of work to do for no pay.
Here's the sim I used. The wide pulse is a step of Vref, and the
little one inside is a 100 mA load step. Nothing rings much, and the
load step bumps are just about 5 millivolts. It's not as good at light
loads, but I don't have light loads.
http://dl.dropbox.com/u/53724080/Circuits/TEM2_LDO_SIM.jpg
If I were selling LDOs as general-purpose products, I'd work on it
more. But all this has to do is power three chips (FPGA and two
Pericom PCIe equalizers) and it works fine for that.
As I've mentioned before, putting a resistor in series with R3 damps
it nicely and increases the HF gain around the loop. 2K is pretty
good. I didn't do that because I didn't need to, and I didn't have
time to make a project out of this... there are lots of other things
going on in this box. We try to keep our BOM down, both number of
parts and number of different parts. If I ever do a rev B board, maybe
I'll add some 2K resistors; they are line-items on the BOM already.
But show us your feed-forward circuit.
--
John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Jim Thompson
May 20, 2012, 6:28:08 PM5/20/12
to
caps (on-chip) to produce the zero. But some recent chips are such
"honkers" that external caps are needed (and customers in my world
resist external components whenever possible). You've provoked me
into thinking my way thru this problem. I'll probably be able to
thank you later for pushing me toward yet another patent :-)
>
>Here's the sim I used. The wide pulse is a step of Vref, and the
>little one inside is a 100 mA load step. Nothing rings much, and the
>load step bumps are just about 5 millivolts. It's not as good at light
>loads, but I don't have light loads.
>
>http://dl.dropbox.com/u/53724080/Circuits/TEM2_LDO_SIM.jpg
>
>If I were selling LDOs as general-purpose products, I'd work on it
>more. But all this has to do is power three chips (FPGA and two
>Pericom PCIe equalizers) and it works fine for that.
>
>As I've mentioned before, putting a resistor in series with R3 damps
>it nicely and increases the HF gain around the loop. 2K is pretty
>good. I didn't do that because I didn't need to, and I didn't have
>time to make a project out of this... there are lots of other things
>going on in this box. We try to keep our BOM down, both number of
>parts and number of different parts. If I ever do a rev B board, maybe
>I'll add some 2K resistors; they are line-items on the BOM already.
pretty much standard for compensating LDO's... add dissipation... AND
you changed all the parts...
Where are the originally specified MC33072 and ZXMN6A25G? I have the
models, why don't you?
And you now have a transient load that's only 16% of steady-state, and
it looks like you tweaked the TR/TF, PW and PER for "prettiest
picture".
I think you're lying. Makes one wonder how many other things you've
lied about... I suspect MOST of your claims.
I didn't lie about killfiling you. The filter works perfectly.
However I do admit to peeking periodically to see what QUACK claims
you had been making :-)
Then I decided to rejoin the fray and systematically kick your ass
ever time you go QUACK, QUACK!
>
>But show us your feed-forward circuit.
after I patent it ;-)
John Larkin
May 20, 2012, 7:23:07 PM5/20/12
to
On Sun, 20 May 2012 15:28:08 -0700, Jim Thompson
Of course I changed parts in the sim, lots of times. One has to
explore the load range and margins and stuff. The 2 ohms isn't the
pre-load, it's the load, or rather a possible load.
I suppose you have to have sims that are exactly what will go into
your chips. I don't have to do that. I can play with a simulation
enough to be confident that my board will work, but I don't have to
match them exactly. And if that regulator did have stability problems,
which it didn't, I could change parts on the board, which you can't.
This board has three fiber-input timestampers with 62 ps LSB; about 50
digital delay generators, 16 of which are 1 ns resolution with fiber
laser outputs. It interfaces to a PLC, a wafer scanner, and 16 energy
digitizers. It has an ARM cpu and a big FPGA and PCI Express and
RS232. There's a high-power arbitrary waveform generator. There are
currently about six guys writing VHDL and C and PowerBasic code for
the application, which may continue approximately forever. All these
things are stuff that you don't do. The LDO was well under 0.1% of the
design effort and it's good enough.
>
>Where are the originally specified MC33072 and ZXMN6A25G? I have the
>models, why don't you?
I don't have those models, so I just picked similar parts from the LT
Spice library. It works.
>
>And you now have a transient load that's only 16% of steady-state, and
>it looks like you tweaked the TR/TF, PW and PER for "prettiest
>picture".
No, I hacked some reasonable values and didn't change them. I did
tweak the times of the load steps for pretty graphing, but all the
transients are settled so that doesn't matter.
>
>I think you're lying. Makes one wonder how many other things you've
>lied about... I suspect MOST of your claims.
Lying about what? The PDF schematic is a sheet from the actual
product, and the pictures of the PCB are real, and it works. We've
shipped about 8 so far, and the customer is happy. This is one box of
six that we furnish for this project. They all worked with rev A PCBs.
What fraction of your chip designs work first pass?
>
>I didn't lie about killfiling you. The filter works perfectly.
>However I do admit to peeking periodically to see what QUACK claims
>you had been making :-)
No self control. You even cheat on yourself.
explore the load range and margins and stuff. The 2 ohms isn't the
pre-load, it's the load, or rather a possible load.
I suppose you have to have sims that are exactly what will go into
your chips. I don't have to do that. I can play with a simulation
enough to be confident that my board will work, but I don't have to
match them exactly. And if that regulator did have stability problems,
which it didn't, I could change parts on the board, which you can't.
This board has three fiber-input timestampers with 62 ps LSB; about 50
digital delay generators, 16 of which are 1 ns resolution with fiber
laser outputs. It interfaces to a PLC, a wafer scanner, and 16 energy
digitizers. It has an ARM cpu and a big FPGA and PCI Express and
RS232. There's a high-power arbitrary waveform generator. There are
currently about six guys writing VHDL and C and PowerBasic code for
the application, which may continue approximately forever. All these
things are stuff that you don't do. The LDO was well under 0.1% of the
design effort and it's good enough.
>
>Where are the originally specified MC33072 and ZXMN6A25G? I have the
>models, why don't you?
Spice library. It works.
>
>And you now have a transient load that's only 16% of steady-state, and
>it looks like you tweaked the TR/TF, PW and PER for "prettiest
>picture".
tweak the times of the load steps for pretty graphing, but all the
transients are settled so that doesn't matter.
>
>I think you're lying. Makes one wonder how many other things you've
>lied about... I suspect MOST of your claims.
product, and the pictures of the PCB are real, and it works. We've
shipped about 8 so far, and the customer is happy. This is one box of
six that we furnish for this project. They all worked with rev A PCBs.
What fraction of your chip designs work first pass?
>
>I didn't lie about killfiling you. The filter works perfectly.
>However I do admit to peeking periodically to see what QUACK claims
>you had been making :-)
Jim Thompson
May 20, 2012, 7:34:09 PM5/20/12
to
On Sun, 20 May 2012 16:23:07 -0700, John Larkin
<jjSNIP...@highTHISlandtechnology.com> wrote:
>On Sun, 20 May 2012 15:28:08 -0700, Jim Thompson
><To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>
[snip]
<jjSNIP...@highTHISlandtechnology.com> wrote:
>On Sun, 20 May 2012 15:28:08 -0700, Jim Thompson
><To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>
>
>>
>>And you now have a transient load that's only 16% of steady-state, and
>>it looks like you tweaked the TR/TF, PW and PER for "prettiest
>>picture".
>
>No, I hacked some reasonable values and didn't change them. I did
>tweak the times of the load steps for pretty graphing, but all the
>transients are settled so that doesn't matter.
>
>>
>>I think you're lying. Makes one wonder how many other things you've
>>lied about... I suspect MOST of your claims.
>
>Lying about what? The PDF schematic is a sheet from the actual
>product, and the pictures of the PCB are real, and it works. We've
>shipped about 8 so far, and the customer is happy. This is one box of
>six that we furnish for this project. They all worked with rev A PCBs.
I know you are lying... but that's SOP for you. The drawing you
>>
>>And you now have a transient load that's only 16% of steady-state, and
>>it looks like you tweaked the TR/TF, PW and PER for "prettiest
>>picture".
>
>No, I hacked some reasonable values and didn't change them. I did
>tweak the times of the load steps for pretty graphing, but all the
>transients are settled so that doesn't matter.
>
>>
>>I think you're lying. Makes one wonder how many other things you've
>>lied about... I suspect MOST of your claims.
>
>Lying about what? The PDF schematic is a sheet from the actual
>product, and the pictures of the PCB are real, and it works. We've
>shipped about 8 so far, and the customer is happy. This is one box of
>six that we furnish for this project. They all worked with rev A PCBs.
posted may well be what you postulated... but it's been tweaked on the
board... as drawn, it sings like a sonnuva-bitch... just like you ;-)
I'll post my simulation later. Why did you need to add a zero in your
compensation? Liar! Liar! Pants on fire :-)
>
>What fraction of your chip designs work first pass?
which they make good on. But I'm proud of my 99.75% record of meeting
specification, first pass.
What fraction of your PCB's don't need a tweak?
>
>>
>>I didn't lie about killfiling you. The filter works perfectly.
>>However I do admit to peeking periodically to see what QUACK claims
>>you had been making :-)
>
>No self control. You even cheat on yourself.
>
keep track of truth than obfuscation.
You ought to be ashamed of yourself. You are indeed NOLA trailer
trash.
Jim Thompson
May 20, 2012, 9:00:14 PM5/20/12
to
On Sun, 20 May 2012 16:34:09 -0700, Jim Thompson
I just noticed that "quack-quack slippery bastard" slipped us some old
drawings and simulations... he didn't attempt to simulate what he
claimed worked. Wonder if "quack-quack slippery bastard" would allow
some independent party, say Spehro, trace the board "quack-quack
slippery bastard" claims works and verify (and post) what _exactly_ is
on the PCB?
I doubt it will ever happen.
drawings and simulations... he didn't attempt to simulate what he
claimed worked. Wonder if "quack-quack slippery bastard" would allow
some independent party, say Spehro, trace the board "quack-quack
slippery bastard" claims works and verify (and post) what _exactly_ is
on the PCB?
I doubt it will ever happen.
John Larkin
May 20, 2012, 9:08:45 PM5/20/12
to
On Sun, 20 May 2012 16:34:09 -0700, Jim Thompson
config, all the way through PCI Express activity. It's fine. I changed
no values from the original BOM. I did of course sim it with a range
of parts values and loads, to get a feel for how it behaved.
It doesn't oscillate, and you are wrong. It's a little bit
underdamped, but not enough to matter, not enough to affect the
transient load bump.
>
>I'll post my simulation later. Why did you need to add a zero in your
>compensation? Liar! Liar! Pants on fire :-)
Do you mean the capacitive ESR? Because caps have ESR. The caps in the
sim are a pretty good approximation of what's on the board, including
bypasses on the power pours near the loads, the 3 uF thing. You can't
neglect them just because they aren't on the "power supply" page of
the schematic.
>
>>
>>What fraction of your chip designs work first pass?
>
>100% "work", I never had any DOA except for process house bungles,
>which they make good on. But I'm proud of my 99.75% record of meeting
>specification, first pass.
>
>What fraction of your PCB's don't need a tweak?
>
>>
>>>
>>>I didn't lie about killfiling you. The filter works perfectly.
>>>However I do admit to peeking periodically to see what QUACK claims
>>>you had been making :-)
>>
>>No self control. You even cheat on yourself.
>>
>
>Always some smug ass remark. But I never lie... it's much easier to
>keep track of truth than obfuscation.
You once said "I don't cook." Then when you later posted about
cooking, and I asked, you said "I lied." I thought that was very
strange at the time. What engineer doesn't cook?
<To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>On Sun, 20 May 2012 16:23:07 -0700, John Larkin
><jjSNIP...@highTHISlandtechnology.com> wrote:
>
>>On Sun, 20 May 2012 15:28:08 -0700, Jim Thompson
>><To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>>
>[snip]
>>
>>>
>>>And you now have a transient load that's only 16% of steady-state, and
>>>it looks like you tweaked the TR/TF, PW and PER for "prettiest
>>>picture".
>>
>>No, I hacked some reasonable values and didn't change them. I did
>>tweak the times of the load steps for pretty graphing, but all the
>>transients are settled so that doesn't matter.
>>
>>>
>>>I think you're lying. Makes one wonder how many other things you've
>>>lied about... I suspect MOST of your claims.
>>
>>Lying about what? The PDF schematic is a sheet from the actual
>>product, and the pictures of the PCB are real, and it works. We've
>>shipped about 8 so far, and the customer is happy. This is one box of
>>six that we furnish for this project. They all worked with rev A PCBs.
>
>I know you are lying... but that's SOP for you. The drawing you
>posted may well be what you postulated... but it's been tweaked on the
>board... as drawn, it sings like a sonnuva-bitch... just like you ;-)
It does not. I scoped it, under load, from powerup, through FPGA
>On Sun, 20 May 2012 16:23:07 -0700, John Larkin
><jjSNIP...@highTHISlandtechnology.com> wrote:
>
>>On Sun, 20 May 2012 15:28:08 -0700, Jim Thompson
>><To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>>
>[snip]
>>
>>>
>>>And you now have a transient load that's only 16% of steady-state, and
>>>it looks like you tweaked the TR/TF, PW and PER for "prettiest
>>>picture".
>>
>>No, I hacked some reasonable values and didn't change them. I did
>>tweak the times of the load steps for pretty graphing, but all the
>>transients are settled so that doesn't matter.
>>
>>>
>>>I think you're lying. Makes one wonder how many other things you've
>>>lied about... I suspect MOST of your claims.
>>
>>Lying about what? The PDF schematic is a sheet from the actual
>>product, and the pictures of the PCB are real, and it works. We've
>>shipped about 8 so far, and the customer is happy. This is one box of
>>six that we furnish for this project. They all worked with rev A PCBs.
>
>I know you are lying... but that's SOP for you. The drawing you
>posted may well be what you postulated... but it's been tweaked on the
>board... as drawn, it sings like a sonnuva-bitch... just like you ;-)
config, all the way through PCI Express activity. It's fine. I changed
no values from the original BOM. I did of course sim it with a range
of parts values and loads, to get a feel for how it behaved.
It doesn't oscillate, and you are wrong. It's a little bit
underdamped, but not enough to matter, not enough to affect the
transient load bump.
>
>I'll post my simulation later. Why did you need to add a zero in your
>compensation? Liar! Liar! Pants on fire :-)
sim are a pretty good approximation of what's on the board, including
bypasses on the power pours near the loads, the 3 uF thing. You can't
neglect them just because they aren't on the "power supply" page of
the schematic.
>
>>
>>What fraction of your chip designs work first pass?
>
>100% "work", I never had any DOA except for process house bungles,
>which they make good on. But I'm proud of my 99.75% record of meeting
>specification, first pass.
>
>What fraction of your PCB's don't need a tweak?
>
>>
>>>
>>>I didn't lie about killfiling you. The filter works perfectly.
>>>However I do admit to peeking periodically to see what QUACK claims
>>>you had been making :-)
>>
>>No self control. You even cheat on yourself.
>>
>
>Always some smug ass remark. But I never lie... it's much easier to
>keep track of truth than obfuscation.
cooking, and I asked, you said "I lied." I thought that was very
strange at the time. What engineer doesn't cook?
John Larkin
May 20, 2012, 9:13:19 PM5/20/12
to
On Sun, 20 May 2012 18:00:14 -0700, Jim Thompson
What's on the PCB is what's on the PDF schematic that I posted. I
didn't change the BOM from the original layout, at least not this
part.
Sure, buy Sphero a plane ticket, and put him up at W or the Four
Seasons, and let him check the boards. Include dinner at Boulevard,
recently rated the best restaurant in the USA.
didn't change the BOM from the original layout, at least not this
part.
Sure, buy Sphero a plane ticket, and put him up at W or the Four
Seasons, and let him check the boards. Include dinner at Boulevard,
recently rated the best restaurant in the USA.
Jamie
May 20, 2012, 9:25:37 PM5/20/12
to
Sim that, I think you'll like the improvement.
I maybe late on the scene, you may have already discovered this.
But this will play with the loop gain..
I get no more than 5 mv ripple with the current source on the load and
no ripple with input transient.
This is based from the print you showed. Of course, simulations lie
like hell, so what ever. :)
Jamie
Jim Thompson
May 20, 2012, 9:32:07 PM5/20/12
to
On Sun, 20 May 2012 18:13:19 -0700, John Larkin
Pomposity at its finest :-)
Would you agree to Spehro stopping by the next time he's in the bay
area?
And that Spehro can verify all components
_are_as_you_posted_originally? ... not with the added zero and load
change as you posted today?
Would you agree to Spehro stopping by the next time he's in the bay
area?
And that Spehro can verify all components
_are_as_you_posted_originally? ... not with the added zero and load
change as you posted today?
Phil Hobbs
May 20, 2012, 10:08:27 PM5/20/12
to
Jim Thompson wrote, in response to other junk,
<snip>
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music swirled and dived for a moment. Another voice broke in, presumably
Halfrunt. He said: "Vell, Zaphod's jist zis guy you know?" but got no
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- she had thrown the pencil.
"Hey," he said, what do you do that for?"
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"I've just thought of something," she said.
"Yeah? Worth interrupting a news bulletin about me for?" "You hear
enough about yourself as it is."
"I'm very insecure. We know that."
"Can we drop your ego for a moment? This is important."
"If there's anything more important than my ego around, I want it caught
and shot now."
-- The Hitchhiker's Guide to the Galaxy, by Douglas Adams: Excerpt from
Chapter 12
Not that better LDOs aren't good things to post about--they're better
than a lot of the other stuff round here--but the Godzilla vs Rodan bit
gets a bit old, you know?
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics
160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058
hobbs at electrooptical dot net
http://electrooptical.net
<snip>
"... and news brought to you here on the sub-etha wave band,
broadcasting around the galaxy around the clock," squawked a voice, "and
we'll be saying a big hello to all intelligent life forms everywhere ...
and to everyone else out there, the secret is to bang the rocks
together, guys. And of course, the big news story tonight is the
sensational theft of the new Improbability Drive prototype ship by none
other than Galactic President Zaphod Beeblebrox. And the question
everyone's asking is ... has the big Z finally flipped? Beeblebrox, the
man who invented the Pan Galactic Gargle Blaster, ex-confidence
trickster, once described by Eccentrica Gallumbits as the Best Bang
since the Big One, and recently voted the Wort Dressed Sentinent Being
in the Known Universe for the seventh time ... has he got an answer this
time? We asked his private brain care specialist Gag Halfrunt ..." The
music swirled and dived for a moment. Another voice broke in, presumably
Halfrunt. He said: "Vell, Zaphod's jist zis guy you know?" but got no
further because an electric pencil flew across the cabin and through the
radio's on/off sensitive airspace. Zaphod turned and glared at Trillian
- she had thrown the pencil.
"Hey," he said, what do you do that for?"
Trillian was tapping her fingers on a screenful of figures.
"I've just thought of something," she said.
"Yeah? Worth interrupting a news bulletin about me for?" "You hear
enough about yourself as it is."
"I'm very insecure. We know that."
"Can we drop your ego for a moment? This is important."
"If there's anything more important than my ego around, I want it caught
and shot now."
-- The Hitchhiker's Guide to the Galaxy, by Douglas Adams: Excerpt from
Chapter 12
Not that better LDOs aren't good things to post about--they're better
than a lot of the other stuff round here--but the Godzilla vs Rodan bit
gets a bit old, you know?
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics
160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058
hobbs at electrooptical dot net
http://electrooptical.net
Jim Thompson
May 20, 2012, 10:10:47 PM5/20/12
to
On Sun, 20 May 2012 18:08:45 -0700, John Larkin
<jjSNIP...@highTHISlandtechnology.com> wrote:
[snip]
poach them. I can also make myself a package of Ramen soup. Why does
that cause you such heartburn? Or is your "concern" all just
diversionary subterfuge, as I suspect?
<jjSNIP...@highTHISlandtechnology.com> wrote:
[snip]
>
>You once said "I don't cook." Then when you later posted about
>cooking, and I asked, you said "I lied." I thought that was very
>strange at the time. What engineer doesn't cook?
>
>
I grill steak, boil eggs, and, with my wife's new gadgetry, I can even
>You once said "I don't cook." Then when you later posted about
>cooking, and I asked, you said "I lied." I thought that was very
>strange at the time. What engineer doesn't cook?
>
>
poach them. I can also make myself a package of Ramen soup. Why does
that cause you such heartburn? Or is your "concern" all just
diversionary subterfuge, as I suspect?
Jim Thompson
May 20, 2012, 10:12:10 PM5/20/12
to
John Larkin
May 20, 2012, 10:33:31 PM5/20/12
to
On Sun, 20 May 2012 18:32:07 -0700, Jim Thompson
Well, we've eaten there, and it's pretty good. My attorney occupies
the penthouse above the restaurant, and shares the space with Willy
Brown. Or, actually, lets Willy have an office for occasional use. The
view from the conference room is impressive.
>
>Would you agree to Spehro stopping by the next time he's in the bay
>area?
Sure. He's stayed with us before, and he's always welcome. But you are
being silly.
>
>And that Spehro can verify all components
>_are_as_you_posted_originally? ... not with the added zero and load
>change as you posted today?
The caps on the board have ESR, and I guessed at their value when I
did the sim. Of course I didn't show the ESR on the PCB schematic. And
the chips *are* loads. Why would I build a semi-monstrous LDO if it
didn't have loads?
If I change the ESR in the sim to 1u ohm, or to 0.1 ohms, the
transient response doesn't change enough to notice. I did guard-band
that in simulation, to make sure it didn't matter much. It's slightly
underdamped at zero ESR. It is critically damped at just a tad over
0.1 ohms.
You seem confused by the fact that the PCB schematic is not identical
to the simulation schematic. In your business, I suppose it has to be.
the penthouse above the restaurant, and shares the space with Willy
Brown. Or, actually, lets Willy have an office for occasional use. The
view from the conference room is impressive.
>
>Would you agree to Spehro stopping by the next time he's in the bay
>area?
being silly.
>
>And that Spehro can verify all components
>_are_as_you_posted_originally? ... not with the added zero and load
>change as you posted today?
did the sim. Of course I didn't show the ESR on the PCB schematic. And
the chips *are* loads. Why would I build a semi-monstrous LDO if it
didn't have loads?
If I change the ESR in the sim to 1u ohm, or to 0.1 ohms, the
transient response doesn't change enough to notice. I did guard-band
that in simulation, to make sure it didn't matter much. It's slightly
underdamped at zero ESR. It is critically damped at just a tad over
0.1 ohms.
You seem confused by the fact that the PCB schematic is not identical
to the simulation schematic. In your business, I suppose it has to be.
John Larkin
May 20, 2012, 10:40:42 PM5/20/12
to
5n + 5K rings badly in my simulation.
>
> I maybe late on the scene, you may have already discovered this.
>
> But this will play with the loop gain..
>
> I get no more than 5 mv ripple with the current source on the load and
>no ripple with input transient.
>
> This is based from the print you showed. Of course, simulations lie
>like hell, so what ever. :)
>
>
>Jamie
>
Version 4
SHEET 1 1256 680
WIRE 144 -176 32 -176
WIRE 608 -176 416 -176
WIRE 144 -144 144 -176
WIRE 608 -112 608 -176
WIRE 416 -48 416 -176
WIRE 144 -32 144 -64
WIRE 32 0 32 -176
WIRE 608 0 608 -32
WIRE 0 16 -32 16
WIRE 144 32 64 32
WIRE 192 32 144 32
WIRE 224 32 192 32
WIRE 368 32 304 32
WIRE -144 48 -208 48
WIRE 0 48 -144 48
WIRE 32 80 32 64
WIRE -208 96 -208 48
WIRE 144 128 144 96
WIRE 288 144 240 144
WIRE 416 144 416 48
WIRE 416 144 368 144
WIRE 512 144 416 144
WIRE 608 144 512 144
WIRE 768 144 608 144
WIRE 416 176 416 144
WIRE 512 176 512 144
WIRE 608 176 608 144
WIRE 768 192 768 144
WIRE -208 208 -208 176
WIRE -32 240 -32 16
WIRE 48 240 -32 240
WIRE 144 240 144 208
WIRE 144 240 48 240
WIRE 240 240 240 144
WIRE 240 240 144 240
WIRE 512 272 512 240
WIRE 416 288 416 240
WIRE 608 288 608 256
WIRE 768 320 768 272
WIRE 512 384 512 352
FLAG 144 -32 0
FLAG 32 80 0
FLAG -208 208 0
FLAG 416 288 0
FLAG 608 0 0
FLAG 512 384 0
FLAG 608 288 0
FLAG 608 144 OUT
FLAG -144 48 IN
FLAG 192 32 AMP
FLAG 48 240 FB
FLAG 768 320 0
SYMBOL cap 400 176 R0
SYMATTR InstName C1
SYMATTR Value 3µ
SYMBOL cap 496 176 R0
SYMATTR InstName C2
SYMATTR Value 20µ
SYMBOL cap 128 32 R0
WINDOW 0 49 42 Left 2
WINDOW 3 50 73 Left 2
SYMATTR InstName C3
SYMATTR Value 1n
SYMBOL Opamps\\LT1492 32 -32 R0
WINDOW 0 -76 -33 Left 2
WINDOW 3 -104 3 Left 2
SYMATTR InstName U1
SYMBOL res 320 16 R90
WINDOW 0 -45 59 VBottom 2
WINDOW 3 -36 60 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 384 128 R90
WINDOW 0 72 52 VBottom 2
WINDOW 3 78 52 VTop 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL nmos 368 -48 R0
SYMATTR InstName M1
SYMATTR Value FDC637AN
SYMBOL voltage 608 -128 R0
WINDOW 0 55 39 Left 2
WINDOW 3 53 82 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL voltage -208 80 R0
WINDOW 3 -161 182 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(1.1 1.15 100u 1u 1u 200u)
SYMATTR InstName V2
SYMBOL voltage 144 -160 R0
WINDOW 0 61 23 Left 2
WINDOW 3 60 60 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL res 592 160 R0
WINDOW 0 58 43 Left 2
WINDOW 3 64 76 Left 2
SYMATTR InstName R3
SYMATTR Value 2
SYMBOL res 496 256 R0
WINDOW 0 47 62 Left 2
WINDOW 3 41 98 Left 2
SYMATTR InstName R4
SYMATTR Value 0.025
SYMBOL current 768 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(0 0.1 175u 200n 100n 50u)
SYMBOL res 128 112 R0
SYMATTR InstName R5
SYMATTR Value 2K
TEXT 88 288 Left 2 !.tran 0.001
TEXT -456 -136 Left 2 ;TEM2 LDO REGULATORS
TEXT -416 -88 Left 2 ;JL Sep 12 2011
TEXT -392 -48 Left 2 ;+ May 20, 2012
John Larkin
May 20, 2012, 10:42:27 PM5/20/12
to
On Sun, 20 May 2012 19:10:47 -0700, Jim Thompson
<To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>On Sun, 20 May 2012 18:08:45 -0700, John Larkin
><jjSNIP...@highTHISlandtechnology.com> wrote:
>
>[snip]
You snipped the claim that you never lie.
<To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>On Sun, 20 May 2012 18:08:45 -0700, John Larkin
><jjSNIP...@highTHISlandtechnology.com> wrote:
>
>[snip]
>>
>>You once said "I don't cook." Then when you later posted about
>>cooking, and I asked, you said "I lied." I thought that was very
>>strange at the time. What engineer doesn't cook?
>>
>>
>
>I grill steak, boil eggs, and, with my wife's new gadgetry, I can even
>poach them. I can also make myself a package of Ramen soup. Why does
>that cause you such heartburn? Or is your "concern" all just
>diversionary subterfuge, as I suspect?
>
> ...Jim Thompson
--
Jim Thompson
May 21, 2012, 12:13:35 PM5/21/12
to
[snip]
(It helps to just Bode the NMOS follower by itself to get a clue about
what poles it adds :-)
I can get > 57° Phase margin from 100mA to 1Amp that way.
Still doesn't solve all the issues. But, in my IC world, I think I
can build a "tracking compensator" for the NMOS pass device (since
it's on my chip) and eliminate the effects of the moving output pole.
>>
>>
>Change C3 to 5n and place a 5k in series with C3
>
> Sim that, I think you'll like the improvement.
>
> I maybe late on the scene, you may have already discovered this.
>
> But this will play with the loop gain..
>
> I get no more than 5 mv ripple with the current source on the load and
>no ripple with input transient.
>
> This is based from the print you showed. Of course, simulations lie
>like hell, so what ever. :)
>
>
>Jamie
>
You're on the right track, Jamie. Just play around with the values.
>>
>Change C3 to 5n and place a 5k in series with C3
>
> Sim that, I think you'll like the improvement.
>
> I maybe late on the scene, you may have already discovered this.
>
> But this will play with the loop gain..
>
> I get no more than 5 mv ripple with the current source on the load and
>no ripple with input transient.
>
> This is based from the print you showed. Of course, simulations lie
>like hell, so what ever. :)
>
>
>Jamie
>
(It helps to just Bode the NMOS follower by itself to get a clue about
what poles it adds :-)
I can get > 57° Phase margin from 100mA to 1Amp that way.
Still doesn't solve all the issues. But, in my IC world, I think I
can build a "tracking compensator" for the NMOS pass device (since
it's on my chip) and eliminate the effects of the moving output pole.
John Larkin
May 21, 2012, 12:37:19 PM5/21/12
to
On Mon, 21 May 2012 09:13:35 -0700, Jim Thompson
<To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>[snip]
>>>
>>>
>>Change C3 to 5n and place a 5k in series with C3
>>
>> Sim that, I think you'll like the improvement.
>>
>> I maybe late on the scene, you may have already discovered this.
>>
>> But this will play with the loop gain..
>>
>> I get no more than 5 mv ripple with the current source on the load and
>>no ripple with input transient.
>>
>> This is based from the print you showed. Of course, simulations lie
>>like hell, so what ever. :)
>>
>>
>>Jamie
>>
>
>You're on the right track, Jamie. Just play around with the values.
>(It helps to just Bode the NMOS follower by itself to get a clue about
>what poles it adds :-)
>
>I can get > 57° Phase margin from 100mA to 1Amp that way.
>
>Still doesn't solve all the issues. But, in my IC world, I think I
>can build a "tracking compensator" for the NMOS pass device (since
>it's on my chip) and eliminate the effects of the moving output pole.
>
> ...Jim Thompson
The LDO dilemma is that, for merchant ICs, the load capacitance and
<To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>[snip]
>>>
>>>
>>Change C3 to 5n and place a 5k in series with C3
>>
>> Sim that, I think you'll like the improvement.
>>
>> I maybe late on the scene, you may have already discovered this.
>>
>> But this will play with the loop gain..
>>
>> I get no more than 5 mv ripple with the current source on the load and
>>no ripple with input transient.
>>
>> This is based from the print you showed. Of course, simulations lie
>>like hell, so what ever. :)
>>
>>
>>Jamie
>>
>
>You're on the right track, Jamie. Just play around with the values.
>(It helps to just Bode the NMOS follower by itself to get a clue about
>what poles it adds :-)
>
>I can get > 57° Phase margin from 100mA to 1Amp that way.
>
>Still doesn't solve all the issues. But, in my IC world, I think I
>can build a "tracking compensator" for the NMOS pass device (since
>it's on my chip) and eliminate the effects of the moving output pole.
>
> ...Jim Thompson
ESR can be all over the place. In my case, I know pretty much what the
load will be, so I can compensate for that.
But the LM8261 drives any c-load. The idea is simple: only have one
pole.
Jim Thompson
May 21, 2012, 12:53:05 PM5/21/12
to
doesn't scale well into the ampere range (at least efficiently) when
you need an RRIO amplifier or an LDO.
We have a problematic world that wants to make everything (CHEAP) in
CMOS. It's been quite a few years now since any of my customers would
opt for BiCMOS, which is the best of both worlds.
Tim Wescott
May 21, 2012, 1:25:18 PM5/21/12
to
I assume that the problems come about because the high capacitance that
you're driving, plus the high resistance of the FET, make a fairly low-
frequency pole.
Given the amount of overhead that you have out of the opamp, following
R231 with a lead-lag network with a zero to match (as well as you can)
the FET/load capacitance pole and a pole as high as you can get while
retaining sufficient gate drive, might calm things down. Of course,
it'll have to work for all possible source impedances of the FET, and
that is a moving target - but hey, that's why you get the big bucks:
lead/lag |
R231 ||-+
___ ___ ||<- MQ1A
o----|___|---o---|___|---o-----||-+
| | |
| |
| || |
'----||-----o
|| |
|
|
|
.-.
| |
| |
'-'
|
|
|
|
===
GND
(created by AACircuit v1.28.6 beta 04/19/05 www.tech-chat.de)
Alternately (and probably not practical), would be to monitor the current
through the FET and control it, which would give you the traditional LDO
single-pole-from-output-caps, which you could then stabilize with simple
gain feedback. It just seems wrong to start with an N-channel part, make
it look like a P-channel, then try to make it all work...
If either idea works, I want my name on the patent.
--
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?
Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com
John Larkin
May 21, 2012, 1:31:11 PM5/21/12
to
On Mon, 21 May 2012 09:53:05 -0700, Jim Thompson
Why can't you do the same thing in CMOS? Have one pole, equivalent to
Miller capacitance off the output pin. [1] Then, added load
capacitance just slows down that pole. The trick is to not bury the
loop compensation on an inaccessable node, which makes the loop go 2nd
order, but make it part of the load.
It's an easy way to sense the load impedance and adjust the loop
dynamics. I'll simulate it, as an LDO, if I have time. Of course, the
error amp has to be wideband and uncompensated, which in my case means
using a fast enough opamp that its internal rolloff doesn't affect the
loop. Actually, maybe I can get a similar effect by just changing some
parts values in my circuit, using the fet's Cdg as the dominant pole.
On a board spin, I'd probably add a cap. Then adding load C just slows
the 1st-order loop down, but the C also stiffens the transient load
response, so it all works out.
All released to the public domain, just in case.
[1] in an IC, "equivalent" would probably have to be synthesized,
since you probably don't want any huge caps on-chip.
--
John Larkin Highland Technology, Inc
jlarkin at highlandtechnology dot com
http://www.highlandtechnology.com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom laser drivers and controllers
Miller capacitance off the output pin. [1] Then, added load
capacitance just slows down that pole. The trick is to not bury the
loop compensation on an inaccessable node, which makes the loop go 2nd
order, but make it part of the load.
It's an easy way to sense the load impedance and adjust the loop
dynamics. I'll simulate it, as an LDO, if I have time. Of course, the
error amp has to be wideband and uncompensated, which in my case means
using a fast enough opamp that its internal rolloff doesn't affect the
loop. Actually, maybe I can get a similar effect by just changing some
parts values in my circuit, using the fet's Cdg as the dominant pole.
On a board spin, I'd probably add a cap. Then adding load C just slows
the 1st-order loop down, but the C also stiffens the transient load
response, so it all works out.
All released to the public domain, just in case.
[1] in an IC, "equivalent" would probably have to be synthesized,
since you probably don't want any huge caps on-chip.
--
John Larkin Highland Technology, Inc
jlarkin at highlandtechnology dot com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Photonics and fiberoptic TTL data links
VME thermocouple, LVDT, synchro acquisition and simulation
Jim Thompson
May 21, 2012, 2:03:38 PM5/21/12
to
Jim Thompson
May 21, 2012, 2:17:33 PM5/21/12
to
potentials move a lot, base voltages are, for all intents and
purposes, "constant". So you have to play cascode games in CMOS to
get good behavior. Either way it costs a pin, which customers
complain more about than the external cap :-(
>Then, added load
>capacitance just slows down that pole. The trick is to not bury the
>loop compensation on an inaccessable node, which makes the loop go 2nd
>order, but make it part of the load.
>
>It's an easy way to sense the load impedance and adjust the loop
>dynamics. I'll simulate it, as an LDO, if I have time. Of course, the
>error amp has to be wideband and uncompensated, which in my case means
>using a fast enough opamp that its internal rolloff doesn't affect the
>loop. Actually, maybe I can get a similar effect by just changing some
>parts values in my circuit, using the fet's Cdg as the dominant pole.
>On a board spin, I'd probably add a cap. Then adding load C just slows
>the 1st-order loop down, but the C also stiffens the transient load
>response, so it all works out.
>
>All released to the public domain, just in case.
>
>[1] in an IC, "equivalent" would probably have to be synthesized,
>since you probably don't want any huge caps on-chip.
Here's an interesting article about Bode Plots versus measuring output
impedance (real and imaginary parts)....
http://tinyurl.com/738dqxt
John Larkin
May 21, 2012, 3:32:31 PM5/21/12
to
On Mon, 21 May 2012 10:31:11 -0700, John Larkin
over to do the Miller thing.
Jim Thompson
May 21, 2012, 3:42:17 PM5/21/12
to
On Mon, 21 May 2012 12:32:31 -0700, John Larkin
I knew what you meant ;-)
Tim Wescott
May 21, 2012, 4:55:10 PM5/21/12
to
On Mon, 21 May 2012 11:03:38 -0700, Jim Thompson wrote:
> Interesting article...
>
> "When Bode Plots Fail Us"
>
> http://tinyurl.com/738dqxt
>
> ...Jim Thompson
Interesting article. That's not what I thought it would be about -- but
> Interesting article...
>
> "When Bode Plots Fail Us"
>
> http://tinyurl.com/738dqxt
>
> ...Jim Thompson
they make good points.
They mention the Nyquist plot in passing -- when I do close-loop design
using frequency-domain measurements, I always make both a Bode plot and a
Nyquist plot: the Bode plot to tell me about performance and to let me
quote gain and phase margins, but the Nyquist plot to make sure that the
absolute stability margin is good all around.
I thought, after reading the title, that the article would be about the
shortcomings of frequency-domain design in time-varying nonlinear systems
(like, say, switching power supplies), or maybe about looking at
impedance plots to see if it goes negative anywhere (which tells you that
somehow, somewhere, there's a passive load that will make your power
supply oscillate).
But even if it didn't talk about what I expected, and even if I only
skimmed it, it looks informative.
John Larkin
May 21, 2012, 6:58:48 PM5/21/12
to
On Mon, 21 May 2012 15:55:10 -0500, Tim Wescott <t...@seemywebsite.com>
wrote:
>On Mon, 21 May 2012 11:03:38 -0700, Jim Thompson wrote:
>
>> Interesting article...
>>
>> "When Bode Plots Fail Us"
>>
>> http://tinyurl.com/738dqxt
>>
>> ...Jim Thompson
>
>Interesting article. That's not what I thought it would be about -- but
>they make good points.
>
>They mention the Nyquist plot in passing -- when I do close-loop design
>using frequency-domain measurements, I always make both a Bode plot and a
>Nyquist plot: the Bode plot to tell me about performance and to let me
>quote gain and phase margins, but the Nyquist plot to make sure that the
>absolute stability margin is good all around.
>
>I thought, after reading the title, that the article would be about the
>shortcomings of frequency-domain design in time-varying nonlinear systems
>(like, say, switching power supplies), or maybe about looking at
>impedance plots to see if it goes negative anywhere (which tells you that
>somehow, somewhere, there's a passive load that will make your power
>supply oscillate).
>
>But even if it didn't talk about what I expected, and even if I only
>skimmed it, it looks informative.
I usually stay in the time domain, and shock circuits with steps and
see if they ring or flail around. Frequency response is small-signal
linear, but the interesting cases involve slew rates and other
nonlinearities.
wrote:
>On Mon, 21 May 2012 11:03:38 -0700, Jim Thompson wrote:
>
>> Interesting article...
>>
>> "When Bode Plots Fail Us"
>>
>> http://tinyurl.com/738dqxt
>>
>> ...Jim Thompson
>
>Interesting article. That's not what I thought it would be about -- but
>they make good points.
>
>They mention the Nyquist plot in passing -- when I do close-loop design
>using frequency-domain measurements, I always make both a Bode plot and a
>Nyquist plot: the Bode plot to tell me about performance and to let me
>quote gain and phase margins, but the Nyquist plot to make sure that the
>absolute stability margin is good all around.
>
>I thought, after reading the title, that the article would be about the
>shortcomings of frequency-domain design in time-varying nonlinear systems
>(like, say, switching power supplies), or maybe about looking at
>impedance plots to see if it goes negative anywhere (which tells you that
>somehow, somewhere, there's a passive load that will make your power
>supply oscillate).
>
>But even if it didn't talk about what I expected, and even if I only
>skimmed it, it looks informative.
see if they ring or flail around. Frequency response is small-signal
linear, but the interesting cases involve slew rates and other
nonlinearities.
Jim Thompson
May 21, 2012, 7:28:25 PM5/21/12
to
is to examine stability of loops during power-up... ramp the supply up
and watch for gotchas... stable loops often are _not_ stable somewhere
along the power-up sequence.
Tim Wescott
May 21, 2012, 11:22:30 PM5/21/12
to
system that's dead stable for small signals, but completely falls apart
for large excursions.
Which doesn't mean that you should toss the frequency-domain stuff out
the window: it just means that you should take the small-signal stuff
with a grain of salt, and either back it up with time-domain stuff, take
large-swing frequency response data, or both.
Jim Thompson
May 22, 2012, 7:24:23 PM5/22/12
to
>The "Great Obnoxious One" has tweaked my curiosity into this
>interesting problem area :-)
>
> ...Jim Thompson
>interesting problem area :-)
>
Data has been added to...
http://www.analog-innovations.com/SED/MC33072_ZXMN6A25G_LDO_Evaluation.pdf
It now includes transient simulations of Larkin's claimed
"in-production" schematic, before and after... original compensation,
then compensated as shown in his later "equivalent" LTspice schematic.
The original flavor, no matter what, is unstable.
The LTspice version is stable... PSpice matches perfectly with the
LTspice simulation. It always will match, choose versus HSpice,
Synopsis, Mentor, whatever... perfect matches.
Of course the great and glorious question is why does Larkin have this
need to fudge the data all the time.
Maybe some of you Larkin boot-lickers can say?
BTW, Larkin boot-lickers in particular are invited to drop by... might
even provide beer if you want to hang your hat on something else
that's non-physical... maybe Jamie could be sure to bring along his
magical hub dynamo ?:-)
WARNING: All visitors are subject to video-recording, and later
posting to You Tube.
Jim Thompson
May 22, 2012, 8:38:04 PM5/22/12
to
On Tue, 22 May 2012 16:24:23 -0700, Jim Thompson
I located the original post that uses what Larkin "claims" as his LDO
architecture...
From: Bob Engelhardt <bobeng...@comcast.net>
Newsgroups: sci.electronics.basics
Subject: A couple of simple questions about a simple op amp circuit
Date: Sun, 01 Apr 2012 11:34:26 -0400
Message-ID: <jl9sh...@news6.newsguy.com>
http://home.comcast.net/~bobengelhardt/eLoad.jpg
This is certainly stable when configured as a current sink (resistance
in the source path).
36 days later Larkin claims it as his own...
From: John Larkin <jjla...@highNOTlandTHIStechnologyPART.com>
Newsgroups: sci.electronics.design
Subject: Re: Why no depletion mode LDOs?
Date: Mon, 07 May 2012 20:42:14 -0700
Message-ID: <i25hq7dgbtiv9ohcd...@4ax.com>
http://dl.dropbox.com/u/53724080/Circuits/28S923A_LDOs.pdf
architecture...
From: Bob Engelhardt <bobeng...@comcast.net>
Newsgroups: sci.electronics.basics
Subject: A couple of simple questions about a simple op amp circuit
Date: Sun, 01 Apr 2012 11:34:26 -0400
Message-ID: <jl9sh...@news6.newsguy.com>
http://home.comcast.net/~bobengelhardt/eLoad.jpg
This is certainly stable when configured as a current sink (resistance
in the source path).
36 days later Larkin claims it as his own...
From: John Larkin <jjla...@highNOTlandTHIStechnologyPART.com>
Newsgroups: sci.electronics.design
Subject: Re: Why no depletion mode LDOs?
Message-ID: <i25hq7dgbtiv9ohcd...@4ax.com>
http://dl.dropbox.com/u/53724080/Circuits/28S923A_LDOs.pdf
John S
May 22, 2012, 8:56:15 PM5/22/12
to
John S
Jamie
May 22, 2012, 9:25:27 PM5/22/12
to
willing to bring my propeller hat. I've been told it is a real party popper.
And besides, maybe you're a little confused here? I work with
Dynatrons, that would be the equivalent to the toy you speak of. I
wouldn't mind bringing that along however, the cost of transportation,
re-assembly and power lines to operated it, would be just out side my
budget, not to speak of the possible incineration to your estate that
would most likely occur from the multi-Million volt output at just under
100ma.
> WARNING: All visitors are subject to video-recording, and later
> posting to You Tube.
>
> ...Jim Thompson
Jamie
John S
May 22, 2012, 9:32:25 PM5/22/12
to
Jim Thompson
May 22, 2012, 9:39:07 PM5/22/12
to
On Tue, 22 May 2012 21:25:27 -0400, Jamie
<jamie_ka1lpa_not_v...@charter.net> wrote:
[snip]
that anyway?
<jamie_ka1lpa_not_v...@charter.net> wrote:
[snip]
> Don't think the camera equipment would survive my presents.
>
>Jamie
My apologies! I got the wrong name on the Hub Dynamo fiasco. Who was
>
>Jamie
that anyway?
John S
May 22, 2012, 9:46:18 PM5/22/12
to
On 5/22/2012 8:25 PM, Jamie wrote:
> And besides, maybe you're a little confused here? I work with Dynatrons,
> that would be the equivalent to the toy you speak of.
I wouldn't mind
> bringing that along however, the cost of transportation, re-assembly and
> power lines to operated it, would be just out side my budget, not to
> speak of the possible incineration to your estate that would most likely
> occur from the multi-Million volt output at just under 100ma.
>
>> WARNING: All visitors are subject to video-recording, and later
>> posting to You Tube.
>>
>> ...Jim Thompson
>
> Don't think the camera equipment would survive my presents.
>
> Jamie
>
http://webpages.charter.net/jamie_5/
and does quite well with the wide angle stuff.
Jamie
May 22, 2012, 10:09:22 PM5/22/12
to
I even carry a membership card in my wallet...
The fun starts when things get hot and sweaty.
Jamie.
Tim Williams
May 22, 2012, 10:48:58 PM5/22/12
to
"Jamie" <jamie_ka1lpa_not_v...@charter.net> wrote in message
news:dwXur.16999$3y3....@newsfe20.iad...
accept, though he would willingly accuse numerous people of being of that,
inclincation...
Tim
--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
news:dwXur.16999$3y3....@newsfe20.iad...
> Yes I do, and I invite any one to my club that wishes to join.
>
> I even carry a membership card in my wallet...
>
> The fun starts when things get hot and sweaty.
Ohhh, one of *those* kinds of parties? ;-) I somehow doubt Jim would
>
> I even carry a membership card in my wallet...
>
> The fun starts when things get hot and sweaty.
accept, though he would willingly accuse numerous people of being of that,
inclincation...
Tim
--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Jamie
May 22, 2012, 11:07:11 PM5/22/12
to
Tim Williams wrote:
> "Jamie" <jamie_ka1lpa_not_v...@charter.net> wrote in
> message news:dwXur.16999$3y3....@newsfe20.iad...
>
>> Yes I do, and I invite any one to my club that wishes to join.
>>
>> I even carry a membership card in my wallet...
>>
>> The fun starts when things get hot and sweaty.
>
>
> Ohhh, one of *those* kinds of parties? ;-) I somehow doubt Jim would
> accept, though he would willingly accuse numerous people of being of
> that, inclincation...
>
> Tim
>
:)
> "Jamie" <jamie_ka1lpa_not_v...@charter.net> wrote in
> message news:dwXur.16999$3y3....@newsfe20.iad...
>
>> Yes I do, and I invite any one to my club that wishes to join.
>>
>> I even carry a membership card in my wallet...
>>
>> The fun starts when things get hot and sweaty.
>
>
> Ohhh, one of *those* kinds of parties? ;-) I somehow doubt Jim would
> accept, though he would willingly accuse numerous people of being of
> that, inclincation...
>
> Tim
>
Michael A. Terrell
May 23, 2012, 11:00:03 AM5/23/12
to
Jamie wrote:
>
> No, I save that for very entertaining, special events. For you, I am
> willing to bring my propeller hat. I've been told it is a real party popper.
--
You can't have a sense of humor, if you have no sense.
Michael A. Terrell
May 23, 2012, 11:01:28 AM5/23/12
to
Jim Thompson wrote:
>
> On Tue, 22 May 2012 21:25:27 -0400, Jamie
> <jamie_ka1lpa_not_v...@charter.net> wrote:
>
> [snip]
> > Don't think the camera equipment would survive my presents.
> >
> >Jamie
>
> My apologies! I got the wrong name on the Hub Dynamo fiasco. Who was
> that anyway?
Jim Thompson
May 23, 2012, 11:33:52 AM5/23/12
to
On Wed, 23 May 2012 11:01:28 -0400, "Michael A. Terrell"
<mike.t...@earthlink.net> wrote:
>
>Jim Thompson wrote:
>>
>> On Tue, 22 May 2012 21:25:27 -0400, Jamie
>> <jamie_ka1lpa_not_v...@charter.net> wrote:
>>
>> [snip]
>> > Don't think the camera equipment would survive my presents.
>> >
>> >Jamie
>>
>> My apologies! I got the wrong name on the Hub Dynamo fiasco. Who was
>> that anyway?
>
>
> Ian Field?
That's the one. Ignorant as a rock _and_ a boot-licker.
<mike.t...@earthlink.net> wrote:
>
>Jim Thompson wrote:
>>
>> On Tue, 22 May 2012 21:25:27 -0400, Jamie
>> <jamie_ka1lpa_not_v...@charter.net> wrote:
>>
>> [snip]
>> > Don't think the camera equipment would survive my presents.
>> >
>> >Jamie
>>
>> My apologies! I got the wrong name on the Hub Dynamo fiasco. Who was
>> that anyway?
>
>
> Ian Field?
Michael A. Terrell
May 23, 2012, 12:21:16 PM5/23/12
to
Jim Thompson wrote:
>
> On Wed, 23 May 2012 11:01:28 -0400, "Michael A. Terrell"
> <mike.t...@earthlink.net> wrote:
>
> >
> >Jim Thompson wrote:
> >>
> >> On Tue, 22 May 2012 21:25:27 -0400, Jamie
> >> <jamie_ka1lpa_not_v...@charter.net> wrote:
> >>
> >> [snip]
> >> > Don't think the camera equipment would survive my presents.
> >> >
> >> >Jamie
> >>
> >> My apologies! I got the wrong name on the Hub Dynamo fiasco. Who was
> >> that anyway?
> >
> >
> > Ian Field?
>
> That's the one. Ignorant as a rock _and_ a boot-licker.
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