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Simple pulse generator circuit
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iCod
Sep 25, 2012, 9:24:33 AM9/25/12
to
I need to generate a clean pulse variable from10nS to 250nS twice
a second 2Hz. I'm sure there is a chip out there that will do this?
I have tried a 555 for the 'long' time but the rising edge is too
dirty to derive a clean narrow pulse. Any ideas or pointers greatly
appreciated.
a second 2Hz. I'm sure there is a chip out there that will do this?
I have tried a 555 for the 'long' time but the rising edge is too
dirty to derive a clean narrow pulse. Any ideas or pointers greatly
appreciated.
Phil Hobbs
Sep 25, 2012, 9:33:19 AM9/25/12
to
on. (Since you were starting with a 555, I gather that this is probably
5V logic, but can't be sure.)
How is the pulse width set? A resistor? A voltage?
How is the pulse triggered?
What's the tolerance on pulse width, rep rate, and jitter?
What output voltage and current do you need?
What's the load?
What are the limits on rise and fall time?
How much overshoot can you stand?
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics
160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058
hobbs at electrooptical dot net
http://electrooptical.net
Neon John
Sep 25, 2012, 9:56:05 AM9/25/12
to
same signal through a buffer or two inverters in series to the other
input of the XOR.
When the incoming signal goes high, so does the output of the XOR -
until the incoming signal propagates through the buffer(s), whereupon
the XOR output goes low again.
Choose your logic family and the number of buffers to set the width
ouf your output pulse.
IF you pass your incoming signal through a Schmitt trigger first, you
can clean up the 555 output and use it to generate the twice per
second trigger pulse.
John
John DeArmond
http://www.neon-john.com
http://www.fluxeon.com
Tellico Plains, Occupied TN
See website for email address
George Herold
Sep 25, 2012, 10:26:29 AM9/25/12
to
74HC123? But maybe something else is faster?
George H.
George Herold
Sep 25, 2012, 10:37:32 AM9/25/12
to
faster. (to meet the 10ns spec.)
I should order some, Say is there a good site that discusses the
differences between the various logic families? HC, HCT, AHCT.
George H.
hamilton
Sep 25, 2012, 10:56:06 AM9/25/12
to
On 9/25/2012 7:24 AM, iCod wrote:
> I need to generate a clean pulse variable from 10nS to 250nS twice
How did you get a 555 to pulse at 10 Nano-Sec ??!!
> I need to generate a clean pulse variable from 10nS to 250nS twice
10 nS is 10 Mhz !
Ok, do you require 10 -> 250 nS in one nS steps ?
That would require a CPLD or FPGA to do that.
A CPLD with a 200 Mhz clock would be able to give you a 1nS step.
You can still use the 555 for the 2Hz part. ;-)
Phil Hobbs
Sep 25, 2012, 11:18:30 AM9/25/12
to
as molasses.
hamilton
Sep 25, 2012, 11:21:30 AM9/25/12
to
On 9/25/2012 8:56 AM, hamilton wrote:
> On 9/25/2012 7:24 AM, iCod wrote:
>> I need to generate a clean pulse variable from 10nS to 250nS twice
>
> How did you get a 555 to pulse at 10 Nano-Sec ??!!
>
> 10 nS is 10 Mhz !
Boy, I must not be awake yet.
> On 9/25/2012 7:24 AM, iCod wrote:
>> I need to generate a clean pulse variable from 10nS to 250nS twice
>
> How did you get a 555 to pulse at 10 Nano-Sec ??!!
>
> 10 nS is 10 Mhz !
10 nS is 100 Mhz !!!
So two clock edges of 200 Mhz = 10 nS
Two clock edges of 2,000 Mhz = 1 nS !!!
Are you sure you want 1 nS resolution ?
If so, you will need some FAST FPGAs !!
Vladimir Vassilevsky
Sep 25, 2012, 11:26:37 AM9/25/12
to
"Neon John" <n...@never.com> wrote in message
news:snd3689evfe59tu59...@4ax.com...
> On Tue, 25 Sep 2012 14:24:33 +0100, iCod <sir...@lineone.net> wrote:
>
>>I need to generate a clean pulse variable from10nS to 250nS twice
>>a second 2Hz. I'm sure there is a chip out there that will do this?
>>I have tried a 555 for the 'long' time but the rising edge is too
>>dirty to derive a clean narrow pulse. Any ideas or pointers greatly
>>appreciated.
>
> Bring your incoming signal into one terminal of an XOR gate. Pass the
> same signal through a buffer or two inverters in series to the other
> input of the XOR.
You betcha.
>
>>I need to generate a clean pulse variable from10nS to 250nS twice
>>a second 2Hz. I'm sure there is a chip out there that will do this?
>>I have tried a 555 for the 'long' time but the rising edge is too
>>dirty to derive a clean narrow pulse. Any ideas or pointers greatly
>>appreciated.
>
> Bring your incoming signal into one terminal of an XOR gate. Pass the
> same signal through a buffer or two inverters in series to the other
> input of the XOR.
Now regulate the supply of one of the inverters for variable pulse length.
For better results, regulate on both Vcc and GND sides.
Vladimir Vassilevsky
DSP and Mixed Signal Consultant
www.abvolt.com
Phil Hobbs
Sep 25, 2012, 11:26:49 AM9/25/12
to
shrinker ( one-shot connected to one input directly and to the other via
an RC lowpass), a pot, and a trigger pulse. The OP can adjust the
minimum pulse width by tweaking the pulse shrinker.
One wouldn't suggest that level of crappiness except that the OP was
talking about a 555, so it's probably a one-off. (I've done worse
things than that in one-offs!)
John Larkin
Sep 25, 2012, 11:48:02 AM9/25/12
to
One easy trick is to use a dual 123, and use one section to subtract
out the minimum pulse width of the other. A couple of AND gates will
do that. Make a narrow pulse from the difference between two wide
ones.
I recently did a pulse generator that goes down to 100 ps. One delayed
signal clocks a flipflop to set it, and another delayed signal clears
it. Tease the relative timings to get a very narrow pulse. The gotcha
was that, to get a 100 ps output, I have to clear the flop about 250
ps before I clock it!
--
John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Tim Wescott
Sep 25, 2012, 12:18:21 PM9/25/12
to
On Tue, 25 Sep 2012 09:33:19 -0400, Phil Hobbs wrote:
> iCod wrote:
>>
>> I need to generate a clean pulse variable from10nS to 250nS twice a
>> second 2Hz. I'm sure there is a chip out there that will do this? I
>> have tried a 555 for the 'long' time but the rising edge is too dirty
>> to derive a clean narrow pulse. Any ideas or pointers greatly
>> appreciated.
>
> There are lots of ways to do this, but you need to give us more to go
> on. (Since you were starting with a 555, I gather that this is probably
> 5V logic, but can't be sure.)
>
> How is the pulse width set? A resistor? A voltage?
>
> How is the pulse triggered?
>
> What's the tolerance on pulse width, rep rate, and jitter?
>
> What output voltage and current do you need?
>
> What's the load?
>
> What are the limits on rise and fall time?
>
> How much overshoot can you stand?
In other words, Phil wants you to define "clean".
> iCod wrote:
>>
>> I need to generate a clean pulse variable from10nS to 250nS twice a
>> second 2Hz. I'm sure there is a chip out there that will do this? I
>> have tried a 555 for the 'long' time but the rising edge is too dirty
>> to derive a clean narrow pulse. Any ideas or pointers greatly
>> appreciated.
>
> There are lots of ways to do this, but you need to give us more to go
> on. (Since you were starting with a 555, I gather that this is probably
> 5V logic, but can't be sure.)
>
> How is the pulse width set? A resistor? A voltage?
>
> How is the pulse triggered?
>
> What's the tolerance on pulse width, rep rate, and jitter?
>
> What output voltage and current do you need?
>
> What's the load?
>
> What are the limits on rise and fall time?
>
> How much overshoot can you stand?
With that much disparity between the pulse width and the interval, you're
almost certainly going to need two timers -- one for the 2Hz, and one for
the pulse.
For that matter, just a 10ns pulse is pretty damn fast, with significant
content up to 200MHz, and plenty more past that if you want sharp edges
and no ringing. I'm not sure that you're going to find many chips that
not only generate a pulse, but that give you edges that will look very
square on an oscilloscope.
--
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?
Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com
George Herold
Sep 25, 2012, 12:27:21 PM9/25/12
to
On Sep 25, 11:18 am, Phil Hobbs
The AHCT series?
http://www.ti.com/lit/ds/symlink/sn74ahct123a.pdf,
lists a minumum tsubw of 5ns. That sounds promising.
But the graphs don't look so good.
George H.
<pcdhSpamMeSensel...@electrooptical.net> wrote:
> George Herold wrote:
>
> > On Sep 25, 9:24 am, iCod <sir...@lineone.net> wrote:
> > > I need to generate a clean pulse variable from10nS to 250nS twice
> > > a second 2Hz. I'm sure there is a chip out there that will do this?
> > > I have tried a 555 for the 'long' time but the rising edge is too
> > > dirty to derive a clean narrow pulse. Any ideas or pointers greatly
> > > appreciated.
>
> > Sounds like a job for a one shot.
> > 74HC123? But maybe something else is faster?
>
> > George H.
>
> I don't think you can get 10 ns pulse width from a '123. They're slow
> as molasses.
Yeah... maybe a faster process.
> George Herold wrote:
>
> > On Sep 25, 9:24 am, iCod <sir...@lineone.net> wrote:
> > > I need to generate a clean pulse variable from10nS to 250nS twice
> > > a second 2Hz. I'm sure there is a chip out there that will do this?
> > > I have tried a 555 for the 'long' time but the rising edge is too
> > > dirty to derive a clean narrow pulse. Any ideas or pointers greatly
> > > appreciated.
>
> > Sounds like a job for a one shot.
> > 74HC123? But maybe something else is faster?
>
> > George H.
>
> I don't think you can get 10 ns pulse width from a '123. They're slow
> as molasses.
The AHCT series?
http://www.ti.com/lit/ds/symlink/sn74ahct123a.pdf,
lists a minumum tsubw of 5ns. That sounds promising.
But the graphs don't look so good.
George H.
John Larkin
Sep 25, 2012, 12:38:03 PM9/25/12
to
On Tue, 25 Sep 2012 11:18:21 -0500, Tim Wescott <t...@seemywebsite.com>
wrote:
Here's a 13 ns pulse
https://dl.dropbox.com/u/53724080/Rigol/DS6_20120525021902.png
that comes from four sections of a 74HCT245 in parallel, with a 50 ohm
series resistor. ACT would have been faster.
Some of the TinyLogic parts will swing 5 volts in 600 ps or so, very
clean.
Fast edges need good multilayer PC board layouts.
wrote:
https://dl.dropbox.com/u/53724080/Rigol/DS6_20120525021902.png
that comes from four sections of a 74HCT245 in parallel, with a 50 ohm
series resistor. ACT would have been faster.
Some of the TinyLogic parts will swing 5 volts in 600 ps or so, very
clean.
Fast edges need good multilayer PC board layouts.
John Larkin
Sep 25, 2012, 12:41:20 PM9/25/12
to
On Tue, 25 Sep 2012 09:27:21 -0700 (PDT), George Herold
<ghe...@teachspin.com> wrote:
>On Sep 25, 11:18 am, Phil Hobbs
><pcdhSpamMeSensel...@electrooptical.net> wrote:
>> George Herold wrote:
>>
>> > On Sep 25, 9:24 am, iCod <sir...@lineone.net> wrote:
>> > > I need to generate a clean pulse variable from10nS to 250nS twice
>> > > a second 2Hz. I'm sure there is a chip out there that will do this?
>> > > I have tried a 555 for the 'long' time but the rising edge is too
>> > > dirty to derive a clean narrow pulse. Any ideas or pointers greatly
>> > > appreciated.
>>
>> > Sounds like a job for a one shot.
>> > 74HC123? But maybe something else is faster?
>>
>> > George H.
>>
>> I don't think you can get 10 ns pulse width from a '123. They're slow
>> as molasses.
>
>Yeah... maybe a faster process.
>The AHCT series?
>
>http://www.ti.com/lit/ds/symlink/sn74ahct123a.pdf,
>
> lists a minumum tsubw of 5ns. That sounds promising.
>
>But the graphs don't look so good.
Looks like 50, maybe 60 ns with Cext=0.
<ghe...@teachspin.com> wrote:
>On Sep 25, 11:18 am, Phil Hobbs
><pcdhSpamMeSensel...@electrooptical.net> wrote:
>> George Herold wrote:
>>
>> > On Sep 25, 9:24 am, iCod <sir...@lineone.net> wrote:
>> > > I need to generate a clean pulse variable from10nS to 250nS twice
>> > > a second 2Hz. I'm sure there is a chip out there that will do this?
>> > > I have tried a 555 for the 'long' time but the rising edge is too
>> > > dirty to derive a clean narrow pulse. Any ideas or pointers greatly
>> > > appreciated.
>>
>> > Sounds like a job for a one shot.
>> > 74HC123? But maybe something else is faster?
>>
>> > George H.
>>
>> I don't think you can get 10 ns pulse width from a '123. They're slow
>> as molasses.
>
>Yeah... maybe a faster process.
>The AHCT series?
>
>http://www.ti.com/lit/ds/symlink/sn74ahct123a.pdf,
>
> lists a minumum tsubw of 5ns. That sounds promising.
>
>But the graphs don't look so good.
John Fields
Sep 25, 2012, 1:17:19 PM9/25/12
to
View with a fixed-pitch font:
. +---+---------+
. Rt1 | | |
. [1M]<-+ +V | 0.5s
. 714K| |8 | |<-----t1----->|
. | 6+---+---+3 | _ _
. +--|TH OUT|--+-----+------A t2->| |<--10-250ns | |
. | 2|___ _|4 | EOR Y-->OUT ___| |___ _ _ ____| |___
. +-O|TR R|O--+V [Rt2] +--B
. |+ +---+---+ | | ______________
. [1湩] 1| 7555 +---+ 7555 OUT___| |______
. Ct1| | |
. | | [Ct2]
. GND GND |
. GND
Adjust Rt1 for a 1Hz signal out of the 7555 and RT2CT2 for the delay
needed to get the output pulsewidth you want.
--
JF
Vladimir Vassilevsky
Sep 25, 2012, 1:52:10 PM9/25/12
to
> "Tim Wescott" wrote:
> For that matter, just a 10ns pulse is pretty damn fast, with significant
> content up to 200MHz, and plenty more past that if you want sharp edges
> and no ringing. I'm not sure that you're going to find many chips that
> not only generate a pulse, but that give you edges that will look very
> square on an oscilloscope.
edges.
BTW, plain vanilla 74HC04 at 3.3V power generates 5ns transitions with 20pF
load.
George Herold
Sep 25, 2012, 2:23:11 PM9/25/12
to
On Sep 25, 12:41 pm, John Larkin
>
> - Show quoted text -
Yeah, Sorry I made a mistake and was reading the wrong parameter.
I seem to remember getting 50 ns from a 74LS123 (or 221)
The double pulser with one swallowing most of the other is a nice
trick.
(I'd just forgotten about it.)
George H.
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Tue, 25 Sep 2012 09:27:21 -0700 (PDT), George Herold
>
>
>
>
>
> <gher...@teachspin.com> wrote:
> >On Sep 25, 11:18 am, Phil Hobbs
> ><pcdhSpamMeSensel...@electrooptical.net> wrote:
> >> George Herold wrote:
>
> >> > On Sep 25, 9:24 am, iCod <sir...@lineone.net> wrote:
> >> > > I need to generate a clean pulse variable from10nS to 250nS twice
> >> > > a second 2Hz. I'm sure there is a chip out there that will do this?
> >> > > I have tried a 555 for the 'long' time but the rising edge is too
> >> > > dirty to derive a clean narrow pulse. Any ideas or pointers greatly
> >> > > appreciated.
>
> >> > Sounds like a job for a one shot.
> >> > 74HC123? But maybe something else is faster?
>
> >> > George H.
>
> >> I don't think you can get 10 ns pulse width from a '123. They're slow
> >> as molasses.
>
> >Yeah... maybe a faster process.
> >The AHCT series?
>
> >http://www.ti.com/lit/ds/symlink/sn74ahct123a.pdf,
>
> > lists a minumum tsubw of 5ns. That sounds promising.
>
> >But the graphs don't look so good.
>
> Looks like 50, maybe 60 ns with Cext=0.
>
> --
>
> John Larkin Highland Technology Incwww.highlandtechnology.com jlarkin at highlandtechnology dot com
> On Tue, 25 Sep 2012 09:27:21 -0700 (PDT), George Herold
>
>
>
>
>
> <gher...@teachspin.com> wrote:
> >On Sep 25, 11:18 am, Phil Hobbs
> ><pcdhSpamMeSensel...@electrooptical.net> wrote:
> >> George Herold wrote:
>
> >> > On Sep 25, 9:24 am, iCod <sir...@lineone.net> wrote:
> >> > > I need to generate a clean pulse variable from10nS to 250nS twice
> >> > > a second 2Hz. I'm sure there is a chip out there that will do this?
> >> > > I have tried a 555 for the 'long' time but the rising edge is too
> >> > > dirty to derive a clean narrow pulse. Any ideas or pointers greatly
> >> > > appreciated.
>
> >> > Sounds like a job for a one shot.
> >> > 74HC123? But maybe something else is faster?
>
> >> > George H.
>
> >> I don't think you can get 10 ns pulse width from a '123. They're slow
> >> as molasses.
>
> >Yeah... maybe a faster process.
> >The AHCT series?
>
> >http://www.ti.com/lit/ds/symlink/sn74ahct123a.pdf,
>
> > lists a minumum tsubw of 5ns. That sounds promising.
>
> >But the graphs don't look so good.
>
> Looks like 50, maybe 60 ns with Cext=0.
>
> --
>
>
> Precision electronic instrumentation
> Picosecond-resolution Digital Delay and Pulse generators
> Custom timing and laser controllers
> Photonics and fiberoptic TTL data links
> VME analog, thermocouple, LVDT, synchro, tachometer
> Multichannel arbitrary waveform generators- Hide quoted text -
> Precision electronic instrumentation
> Picosecond-resolution Digital Delay and Pulse generators
> Custom timing and laser controllers
> Photonics and fiberoptic TTL data links
> VME analog, thermocouple, LVDT, synchro, tachometer
>
> - Show quoted text -
Yeah, Sorry I made a mistake and was reading the wrong parameter.
I seem to remember getting 50 ns from a 74LS123 (or 221)
The double pulser with one swallowing most of the other is a nice
trick.
(I'd just forgotten about it.)
George H.
mike
Sep 25, 2012, 3:36:54 PM9/25/12
to
On 9/25/2012 6:33 AM, Phil Hobbs wrote:
> iCod wrote:
>>
>> I need to generate a clean pulse variable from10nS to 250nS twice
>> a second 2Hz. I'm sure there is a chip out there that will do this?
>> I have tried a 555 for the 'long' time but the rising edge is too
>> dirty to derive a clean narrow pulse. Any ideas or pointers greatly
>> appreciated.
>
> There are lots of ways to do this, but you need to give us more to go
> on. (Since you were starting with a 555, I gather that this is probably
> 5V logic, but can't be sure.)
>
> How is the pulse width set? A resistor? A voltage?
>
> How is the pulse triggered?
>
> What's the tolerance on pulse width, rep rate, and jitter?
>
> What output voltage and current do you need?
>
> What's the load?
>
> What are the limits on rise and fall time?
>
> How much overshoot can you stand?
>
> Cheers
>
> Phil Hobbs
>
And what are you using to measure the result to see how it conforms
> iCod wrote:
>>
>> I need to generate a clean pulse variable from10nS to 250nS twice
>> a second 2Hz. I'm sure there is a chip out there that will do this?
>> I have tried a 555 for the 'long' time but the rising edge is too
>> dirty to derive a clean narrow pulse. Any ideas or pointers greatly
>> appreciated.
>
> There are lots of ways to do this, but you need to give us more to go
> on. (Since you were starting with a 555, I gather that this is probably
> 5V logic, but can't be sure.)
>
> How is the pulse width set? A resistor? A voltage?
>
> How is the pulse triggered?
>
> What's the tolerance on pulse width, rep rate, and jitter?
>
> What output voltage and current do you need?
>
> What's the load?
>
> What are the limits on rise and fall time?
>
> How much overshoot can you stand?
>
> Cheers
>
> Phil Hobbs
>
to all of the above?
This smells like one of those projects that starts out with a vague
concept that gets tweaked into a nightmare scenario.
Last time I saw anything with a billion-to-one ratio, it ended up
as a digitally gated master clock in a multi-section cavity to keep one
end of the board from talking to the other.
John Larkin
Sep 25, 2012, 4:59:55 PM9/25/12
to
On Tue, 25 Sep 2012 09:56:05 -0400, Neon John <n...@never.com> wrote:
>On Tue, 25 Sep 2012 14:24:33 +0100, iCod <sir...@lineone.net> wrote:
>
>>I need to generate a clean pulse variable from10nS to 250nS twice
>>a second 2Hz. I'm sure there is a chip out there that will do this?
>>I have tried a 555 for the 'long' time but the rising edge is too
>>dirty to derive a clean narrow pulse. Any ideas or pointers greatly
>>appreciated.
>
>Bring your incoming signal into one terminal of an XOR gate. Pass the
>same signal through a buffer or two inverters in series to the other
>input of the XOR.
>
>When the incoming signal goes high, so does the output of the XOR -
>until the incoming signal propagates through the buffer(s), whereupon
>the XOR output goes low again.
The XOR will make an output pulse on both edges of the input. The
>On Tue, 25 Sep 2012 14:24:33 +0100, iCod <sir...@lineone.net> wrote:
>
>>I need to generate a clean pulse variable from10nS to 250nS twice
>>a second 2Hz. I'm sure there is a chip out there that will do this?
>>I have tried a 555 for the 'long' time but the rising edge is too
>>dirty to derive a clean narrow pulse. Any ideas or pointers greatly
>>appreciated.
>
>Bring your incoming signal into one terminal of an XOR gate. Pass the
>same signal through a buffer or two inverters in series to the other
>input of the XOR.
>
>When the incoming signal goes high, so does the output of the XOR -
>until the incoming signal propagates through the buffer(s), whereupon
>the XOR output goes low again.
alternate pulses won't be the same width.
--
John Larkin Highland Technology, Inc
jlarkin at highlandtechnology dot com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Photonics and fiberoptic TTL data links
VME thermocouple, LVDT, synchro acquisition and simulation
John Fields
Sep 25, 2012, 6:00:01 PM9/25/12
to
On Tue, 25 Sep 2012 13:59:55 -0700, John Larkin
<jla...@highlandtechnology.com> wrote:
>On Tue, 25 Sep 2012 09:56:05 -0400, Neon John <n...@never.com> wrote:
>
>>On Tue, 25 Sep 2012 14:24:33 +0100, iCod <sir...@lineone.net> wrote:
>>
>>>I need to generate a clean pulse variable from10nS to 250nS twice
>>>a second 2Hz. I'm sure there is a chip out there that will do this?
>>>I have tried a 555 for the 'long' time but the rising edge is too
>>>dirty to derive a clean narrow pulse. Any ideas or pointers greatly
>>>appreciated.
>>
>>Bring your incoming signal into one terminal of an XOR gate. Pass the
>>same signal through a buffer or two inverters in series to the other
>>input of the XOR.
>>
>>When the incoming signal goes high, so does the output of the XOR -
>>until the incoming signal propagates through the buffer(s), whereupon
>>the XOR output goes low again.
>
>The XOR will make an output pulse on both edges of the input. The
>alternate pulses won't be the same width.
---
<jla...@highlandtechnology.com> wrote:
>On Tue, 25 Sep 2012 09:56:05 -0400, Neon John <n...@never.com> wrote:
>
>>On Tue, 25 Sep 2012 14:24:33 +0100, iCod <sir...@lineone.net> wrote:
>>
>>>I need to generate a clean pulse variable from10nS to 250nS twice
>>>a second 2Hz. I'm sure there is a chip out there that will do this?
>>>I have tried a 555 for the 'long' time but the rising edge is too
>>>dirty to derive a clean narrow pulse. Any ideas or pointers greatly
>>>appreciated.
>>
>>Bring your incoming signal into one terminal of an XOR gate. Pass the
>>same signal through a buffer or two inverters in series to the other
>>input of the XOR.
>>
>>When the incoming signal goes high, so does the output of the XOR -
>>until the incoming signal propagates through the buffer(s), whereupon
>>the XOR output goes low again.
>
>The XOR will make an output pulse on both edges of the input. The
>alternate pulses won't be the same width.
Since the XOR's inputs aren't Schmitt triggered, and are voltage
dependent, it's likely that its trigger thresholds will be the same
with the input rising or falling.
Do you have any empirical data you can offer for a refutation?
--
JF
John Larkin
Sep 25, 2012, 7:16:17 PM9/25/12
to
buffers that generate the delay. Tpd_lh and Tpd_hl are usually
different, and logic thresholds aren't exactly Vcc/2. The OP did say
he wanted his pulses to be precise.
Just use an AND or NOR gate, and use only one of the incoming edges,
and avoid the hazard.
The dual one-shot thing is cleaner and easier to tune.
Jim Thompson
Sep 25, 2012, 7:39:16 PM9/25/12
to
On Tue, 25 Sep 2012 16:16:17 -0700, John Larkin
Not with a delay of only 10ns they're not.
But indeed NAND or NOR, one input direct from the 500ms timer, and the
other input delayed by 10ns will do the trick.
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
But indeed NAND or NOR, one input direct from the 500ms timer, and the
other input delayed by 10ns will do the trick.
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
John Larkin
Sep 25, 2012, 7:49:13 PM9/25/12
to
This one goes from 100 ps to 25 ns:
http://www.highlandtechnology.com/DSS/T240DS.shtml
Jim Thompson
Sep 25, 2012, 8:03:47 PM9/25/12
to
On Tue, 25 Sep 2012 16:49:13 -0700, John Larkin
And you are claiming you made it from 123's ?:-)
Give me a break, the 123 one-shot is one of the worst chip designs
ever.
Give me a break, the 123 one-shot is one of the worst chip designs
ever.
hamilton
Sep 25, 2012, 8:12:13 PM9/25/12
to
On 9/25/2012 5:49 PM, John Larkin wrote:
>
> The OP wants it adjustable from 10 to 250 ns.
The OP has not define the resolution !
>
> The OP wants it adjustable from 10 to 250 ns.
10 - 250 ns in 1 ns steps or
10 - 250 ns in 10 ns steps or
10 - 250 ns in xx ns steps ???
Also, did the OP state how the control would be handled.
A carbon pot on a (xxx) analog timer chip would be all over the map
and add offsets over temp.
What a mess !
If the OP is still around, what do you have in mind here ??
hamilton
Vladimir Vassilevsky
Sep 25, 2012, 8:23:56 PM9/25/12
to
"iCod" <sir...@lineone.net> wrote:
>I need to generate a clean pulse variable from10nS to 250nS twice
> a second 2Hz. I'm sure there is a chip out there that will do this?
> I have tried a 555 for the 'long' time but the rising edge is too
> dirty to derive a clean narrow pulse.
be absolutely the simplest and the cleanest way to generate any pulse with
180ps timing resolution.
George Herold
Sep 25, 2012, 9:08:53 PM9/25/12
to
On Sep 25, 8:03 pm, Jim Thompson <To-Email-Use-The-Envelope-I...@On-My-
Are there any better ones?
I've got some 74LS221's left over from an old insturment. (not very
fast)
I really would like a fast double pulser, with variable delay.
George H.
>
> I love to cook with wine. Sometimes I even put it in the food.- Hide quoted text -
I've got some 74LS221's left over from an old insturment. (not very
fast)
I really would like a fast double pulser, with variable delay.
George H.
>
> ...Jim Thompson
> --
> | James E.Thompson, CTO | mens |
> | Analog Innovations, Inc. | et |
> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
> | Phoenix, Arizona 85048 Skype: Contacts Only | |
> | Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
> | E-mail Icon athttp://www.analog-innovations.com| 1962 |
> ...Jim Thompson
> --
> | James E.Thompson, CTO | mens |
> | Analog Innovations, Inc. | et |
> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
> | Phoenix, Arizona 85048 Skype: Contacts Only | |
> | Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
>
> I love to cook with wine. Sometimes I even put it in the food.- Hide quoted text -
Jim Thompson
Sep 25, 2012, 9:16:47 PM9/25/12
to
enough for a 10ns (stable) pulse width.
I go with NAND-ing a signal and a delayed replica. Varying the delay
to adjust the pulsewidth.
...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
George Herold
Sep 25, 2012, 9:24:59 PM9/25/12
to
On Sep 25, 9:16 pm, Jim Thompson <To-Email-Use-The-Envelope-I...@On-My-
Thanks I'll give it a 'look see'. I don't really care about stable.
(I want to simulate PMT pulses.)
George H.
Web-Site.com> wrote:
> On Tue, 25 Sep 2012 18:08:53 -0700 (PDT), George Herold
>
>
>
>
>
> <gher...@teachspin.com> wrote:
> >On Sep 25, 8:03 pm, Jim Thompson <To-Email-Use-The-Envelope-I...@On-My-
> >Web-Site.com> wrote:
> >> On Tue, 25 Sep 2012 16:49:13 -0700, John Larkin
>
> >> <jlar...@highlandtechnology.com> wrote:
> >> >On Tue, 25 Sep 2012 16:39:16 -0700, Jim Thompson
> >> ><To-Email-Use-The-Envelope-I...@On-My-Web-Site.com> wrote:
>
> >> >>On Tue, 25 Sep 2012 16:16:17 -0700, John Larkin
> >> >><jlar...@highlandtechnology.com> wrote:
>
> >> >>>On Tue, 25 Sep 2012 17:00:01 -0500, John Fields
> >> >>><jfie...@austininstruments.com> wrote:
>
> >> >>>>On Tue, 25 Sep 2012 13:59:55 -0700, John Larkin
> >> >>>><jlar...@highlandtechnology.com> wrote:
>
> >> >>>>>On Tue, 25 Sep 2012 09:56:05 -0400, Neon John <n...@never.com> wrote:
>
> >> >>>>>>On Tue, 25 Sep 2012 14:24:33 +0100, iCod <sir...@lineone.net> wrote:
>
> >> >>>>>>>Ineedto generate a clean pulse variable from10nS to 250nS twice
> On Tue, 25 Sep 2012 18:08:53 -0700 (PDT), George Herold
>
>
>
>
>
> <gher...@teachspin.com> wrote:
> >On Sep 25, 8:03 pm, Jim Thompson <To-Email-Use-The-Envelope-I...@On-My-
> >Web-Site.com> wrote:
> >> On Tue, 25 Sep 2012 16:49:13 -0700, John Larkin
>
> >> <jlar...@highlandtechnology.com> wrote:
> >> >On Tue, 25 Sep 2012 16:39:16 -0700, Jim Thompson
> >> ><To-Email-Use-The-Envelope-I...@On-My-Web-Site.com> wrote:
>
> >> >>On Tue, 25 Sep 2012 16:16:17 -0700, John Larkin
> >> >><jlar...@highlandtechnology.com> wrote:
>
> >> >>>On Tue, 25 Sep 2012 17:00:01 -0500, John Fields
> >> >>><jfie...@austininstruments.com> wrote:
>
> >> >>>>On Tue, 25 Sep 2012 13:59:55 -0700, John Larkin
> >> >>>><jlar...@highlandtechnology.com> wrote:
>
> >> >>>>>On Tue, 25 Sep 2012 09:56:05 -0400, Neon John <n...@never.com> wrote:
>
> >> >>>>>>On Tue, 25 Sep 2012 14:24:33 +0100, iCod <sir...@lineone.net> wrote:
>
(I want to simulate PMT pulses.)
George H.
>
> I go with NAND-ing a signal and a delayed replica. Varying the delay
> to adjust the pulsewidth.
>
> ...Jim Thompson
> --
> | James E.Thompson, CTO | mens |
> | Analog Innovations, Inc. | et |
> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
> | Phoenix, Arizona 85048 Skype: Contacts Only | |
> | Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
> I go with NAND-ing a signal and a delayed replica. Varying the delay
> to adjust the pulsewidth.
>
> ...Jim Thompson
> --
> | James E.Thompson, CTO | mens |
> | Analog Innovations, Inc. | et |
> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
> | Phoenix, Arizona 85048 Skype: Contacts Only | |
> | Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
miso
Sep 25, 2012, 9:29:32 PM9/25/12
to
Dammit, stop making sense!
I'm with Jim on this one.
One shots in general are a bad idea. I went through great pains on a
multi-person design to use a counter to get around the one shot, only to
find in a power down mode the crystal was turned off. Fortunately, other
mistakes were in the chip so it wasn't like my screw up solely was to
blame for blowing up the design budget.
The trouble with one shots is they can be influenced by power supply
noise, temperature to some extend if gate delays are part of the
equation, etc. By the time you design a one shot as good as a Swiss
watch, it ends up being an analog beast.
I'm with Jim on this one.
One shots in general are a bad idea. I went through great pains on a
multi-person design to use a counter to get around the one shot, only to
find in a power down mode the crystal was turned off. Fortunately, other
mistakes were in the chip so it wasn't like my screw up solely was to
blame for blowing up the design budget.
The trouble with one shots is they can be influenced by power supply
noise, temperature to some extend if gate delays are part of the
equation, etc. By the time you design a one shot as good as a Swiss
watch, it ends up being an analog beast.
Robert Baer
Sep 25, 2012, 11:19:32 PM9/25/12
to
iCod wrote:
> I need to generate a clean pulse variable from10nS to 250nS twice
> I need to generate a clean pulse variable from10nS to 250nS twice
> a second 2Hz. I'm sure there is a chip out there that will do this?
> I have tried a 555 for the 'long' time but the rising edge is too
> dirty to derive a clean narrow pulse. Any ideas or pointers greatly
> appreciated.
Use the 555 to drive a one-transistor one-shot..
> I have tried a 555 for the 'long' time but the rising edge is too
> dirty to derive a clean narrow pulse. Any ideas or pointers greatly
> appreciated.
John Larkin
Sep 25, 2012, 11:56:33 PM9/25/12
to
On Tue, 25 Sep 2012 18:29:32 -0700, miso <mi...@sushi.com> wrote:
>Dammit, stop making sense!
>I'm with Jim on this one.
>
>One shots in general are a bad idea. I went through great pains on a
>multi-person design to use a counter to get around the one shot, only to
>find in a power down mode the crystal was turned off. Fortunately, other
>mistakes were in the chip so it wasn't like my screw up solely was to
>blame for blowing up the design budget.
Sounds like you should have used a one-shot.
>Dammit, stop making sense!
>I'm with Jim on this one.
>
>One shots in general are a bad idea. I went through great pains on a
>multi-person design to use a counter to get around the one shot, only to
>find in a power down mode the crystal was turned off. Fortunately, other
>mistakes were in the chip so it wasn't like my screw up solely was to
>blame for blowing up the design budget.
>
>The trouble with one shots is they can be influenced by power supply
>noise, temperature to some extend if gate delays are part of the
>equation, etc. By the time you design a one shot as good as a Swiss
>watch, it ends up being an analog beast.
temperature.
There are some newer, faster parts, like SN74LVC1G123.
You can spend 10x as much (or, in my case, 200x as much) to make a
faster, more precise pulse generator. Do that if you need to.
--
John Larkin Highland Technology Inc
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Photonics and fiberoptic TTL data links
John Fields
Sep 26, 2012, 12:17:10 AM9/26/12
to
On Tue, 25 Sep 2012 16:16:17 -0700, John Larkin
---
Yes, but he also said that the period between pulses was non-critical,
so that leaves only the pulse widths to contend with.
Then, since the inputs aren't hysteretic, the assumption is that the
high-going and low-going switching points will be equal, and if Tpd_lh
and Tpd_hl are equal, the output pulsewidths will be equal for both
the rising and falling edges of the exor inputs.
See:
http://www.ti.com/lit/ds/symlink/sn74ahc86.pdf
>Just use an AND or NOR gate, and use only one of the incoming edges,
>and avoid the hazard.
>
>The dual one-shot thing is cleaner and easier to tune.
---
Is it?
--
JF
Yes, but he also said that the period between pulses was non-critical,
so that leaves only the pulse widths to contend with.
Then, since the inputs aren't hysteretic, the assumption is that the
high-going and low-going switching points will be equal, and if Tpd_lh
and Tpd_hl are equal, the output pulsewidths will be equal for both
the rising and falling edges of the exor inputs.
See:
http://www.ti.com/lit/ds/symlink/sn74ahc86.pdf
>Just use an AND or NOR gate, and use only one of the incoming edges,
>and avoid the hazard.
>
>The dual one-shot thing is cleaner and easier to tune.
Is it?
--
JF
John Larkin
Sep 26, 2012, 12:38:36 AM9/26/12
to
On Tue, 25 Sep 2012 23:17:10 -0500, John Fields
Make that assumption if you want to, but it's usually not true. Actual
CMOS input transition points are typically a bit below Vcc/2, but
aren't guaranteed. And rising/falling edge prop delays are usually not
the same. PFETS and NFETS are different animals.
Why create a bunch of hazards when it's completely unnecessary?
>
>See:
>
>http://www.ti.com/lit/ds/symlink/sn74ahc86.pdf
>
>
>>Just use an AND or NOR gate, and use only one of the incoming edges,
>>and avoid the hazard.
>>
>>The dual one-shot thing is cleaner and easier to tune.
>
>---
>Is it?
I think so. The XOR+delay requires a tunable delay that has a 25:1
spread. If you do that with an RC as you suggest, the edges get very
slow for the longer delays; look at the input transition rate spec in
the data sheet that you provided the link to. A dual one-shot gives
you two clean, fast pulses to work with, and the tunable one only has
to be varied over a fairly small range, like 110 to 350 ns maybe.
--
John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
CMOS input transition points are typically a bit below Vcc/2, but
aren't guaranteed. And rising/falling edge prop delays are usually not
the same. PFETS and NFETS are different animals.
Why create a bunch of hazards when it's completely unnecessary?
>
>See:
>
>http://www.ti.com/lit/ds/symlink/sn74ahc86.pdf
>
>
>>Just use an AND or NOR gate, and use only one of the incoming edges,
>>and avoid the hazard.
>>
>>The dual one-shot thing is cleaner and easier to tune.
>
>---
>Is it?
spread. If you do that with an RC as you suggest, the edges get very
slow for the longer delays; look at the input transition rate spec in
the data sheet that you provided the link to. A dual one-shot gives
you two clean, fast pulses to work with, and the tunable one only has
to be varied over a fairly small range, like 110 to 350 ns maybe.
--
John Larkin Highland Technology Inc
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Photonics and fiberoptic TTL data links
Bill Sloman
Sep 26, 2012, 7:01:35 AM9/26/12
to
On Sep 26, 6:38 am, John Larkin
An ON-Semiconductor MC100EP195
http://www.onsemi.com/pub_link/Collateral/MC10EP195-D.PDF
offers a digitally programmable delay from 2nsec to 12nsec. You can
run the same pulse through one or - maybe easier - two of these parts
under the control of a programmable counter until you've built up the
20 to 250nsec of delay the OP is asking for, and then release the
timing pulse after that delay.
More complex than a monostable, and the propagation delay through the
MC100EP195 is depressingly temperature dependent - the maximum delay
increases by 6% from 25C to 85C and is decreased in the same
proportion at -40C, and the minimum delay changes about twice as fast,
but it might be good enough for use in an air-conditioned lab.
On the other hand, it's ECL so the power rails will be clean and the
edge transitions quick - about 100psec. You've got to route your logic
along traces that look like terminated transmission, but at least ECL
is designed to drive terminated connections.
It would make an odd mix with a 555, but this may be one of those rare
occasions where a 555 is the easiest quick and dirty option - albeit
it very dirty.
--
Bill Sloman, Nijmegen
http://www.onsemi.com/pub_link/Collateral/MC10EP195-D.PDF
offers a digitally programmable delay from 2nsec to 12nsec. You can
run the same pulse through one or - maybe easier - two of these parts
under the control of a programmable counter until you've built up the
20 to 250nsec of delay the OP is asking for, and then release the
timing pulse after that delay.
More complex than a monostable, and the propagation delay through the
MC100EP195 is depressingly temperature dependent - the maximum delay
increases by 6% from 25C to 85C and is decreased in the same
proportion at -40C, and the minimum delay changes about twice as fast,
but it might be good enough for use in an air-conditioned lab.
On the other hand, it's ECL so the power rails will be clean and the
edge transitions quick - about 100psec. You've got to route your logic
along traces that look like terminated transmission, but at least ECL
is designed to drive terminated connections.
It would make an odd mix with a 555, but this may be one of those rare
occasions where a 555 is the easiest quick and dirty option - albeit
it very dirty.
--
Bill Sloman, Nijmegen
lang...@fonz.dk
Sep 26, 2012, 8:32:58 AM9/26/12
to
On 25 Sep., 15:24, iCod <sir...@lineone.net> wrote:
> I need to generate a clean pulse variable from10nS to 250nS twice
> a second 2Hz. I'm sure there is a chip out there that will do this?
> I have tried a 555 for the 'long' time but the rising edge is too
> dirty to derive a clean narrow pulse. Any ideas or pointers greatly
> appreciated.
a cpld, 10 lines of verilog and a 100MHz oscillator, something like
> I need to generate a clean pulse variable from10nS to 250nS twice
> a second 2Hz. I'm sure there is a chip out there that will do this?
> I have tried a 555 for the 'long' time but the rising edge is too
> dirty to derive a clean narrow pulse. Any ideas or pointers greatly
> appreciated.
xc9536xl for example
26bit counter to give you ~2Hz, 5 bit counter to give you 10 to 310ns
pulse in 10ns steps
if you want pulse lengths that are not a multiple of 10ns, use a
different oscillator
-Lasse
John Larkin
Sep 26, 2012, 10:26:44 AM9/26/12
to
over the ECL idea.
The Micrel delay line chips (SY89xxx) are better than the Onsemi ones,
but still not a very good way to do this.
This would work, for both the 2 Hz ticker and the pulse generator:
http://www.highlandtechnology.com/DSS/T560DS.shtml
Bill Sloman
Sep 26, 2012, 12:45:50 PM9/26/12
to
On Sep 26, 4:26 pm, John Larkin
And a 221 beats a dual 123 in any application where you don't need to
retrigger the monostable. As Jim Thompson pointed out, the 123 is
crummy monstable. He didn't bother to point out that 121 is a whole
lot better if you don't need to retrigger.
The advantage of the ECL part lies in the quality of the pulse edges
it generates, and the stab\ility of the delay, particularly against
power rail noise. The 121 and 123 are essentially analog comparators
looking at a relatively slow ramp. Any noise on the ramp or the
voltage the comparator is using as a reference create a lot more
jitter than the same power rail noise would create in the ECL system,
and the power rails in an ECL system are pretty much guaranteed
quieter than the power rails in a TTL system.
And the ECL system does lend itself to self-calibration schemes, where
you calibrate the delay generating engine from time to time by getting
it to produce a pulse-width modulated waveform, where the repeat time
is controlled by a much more stable clock - which could be derived
from an off-air standard, traceable back to something at the local
National Bureau Standards.
Here you could go for a 3MHz repeat cycle and use the delay engine to
vary the high time from say 35nsec to 285nsec. Digitise the filtered
DC content of the waveform and you've calibrated the delay engine
against the 3MHz clock.
In practice you'd derive the 3MHz clock from a good 10MHz clock and
generate two additional 135nsec and 235nsec "high" period waveforms by
adding in one or two periods of the 10MHz clock, allowing you to
interpolate between exactly known PWM waveforms and the waveforms
being calibrated.
You can find and calculate out more subtle errors by repeating the
procedure with slower clocks - say 2.5MHz and 2MHz.
> The Micrel delay line chips (SY89xxx) are better than the Onsemi ones,
> but still not a very good way to do this.
It would be a whole lot better way - if more expensive and complicated
- if you designed it right.
> This would work, for both the 2 Hz ticker and the pulse generator:
>
> http://www.highlandtechnology.com/DSS/T560DS.shtml
Perhaps. Does it do any self-calibration? TTL is a a bit of a problem
if you are serious about getting accurate low-jitter timing signals.
--
Bill Sloman, Nijmegen
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Wed, 26 Sep 2012 04:01:35 -0700 (PDT), Bill Sloman
>
> On Wed, 26 Sep 2012 04:01:35 -0700 (PDT), Bill Sloman
>
retrigger the monostable. As Jim Thompson pointed out, the 123 is
crummy monstable. He didn't bother to point out that 121 is a whole
lot better if you don't need to retrigger.
The advantage of the ECL part lies in the quality of the pulse edges
it generates, and the stab\ility of the delay, particularly against
power rail noise. The 121 and 123 are essentially analog comparators
looking at a relatively slow ramp. Any noise on the ramp or the
voltage the comparator is using as a reference create a lot more
jitter than the same power rail noise would create in the ECL system,
and the power rails in an ECL system are pretty much guaranteed
quieter than the power rails in a TTL system.
And the ECL system does lend itself to self-calibration schemes, where
you calibrate the delay generating engine from time to time by getting
it to produce a pulse-width modulated waveform, where the repeat time
is controlled by a much more stable clock - which could be derived
from an off-air standard, traceable back to something at the local
National Bureau Standards.
Here you could go for a 3MHz repeat cycle and use the delay engine to
vary the high time from say 35nsec to 285nsec. Digitise the filtered
DC content of the waveform and you've calibrated the delay engine
against the 3MHz clock.
In practice you'd derive the 3MHz clock from a good 10MHz clock and
generate two additional 135nsec and 235nsec "high" period waveforms by
adding in one or two periods of the 10MHz clock, allowing you to
interpolate between exactly known PWM waveforms and the waveforms
being calibrated.
You can find and calculate out more subtle errors by repeating the
procedure with slower clocks - say 2.5MHz and 2MHz.
> The Micrel delay line chips (SY89xxx) are better than the Onsemi ones,
> but still not a very good way to do this.
- if you designed it right.
> This would work, for both the 2 Hz ticker and the pulse generator:
>
> http://www.highlandtechnology.com/DSS/T560DS.shtml
if you are serious about getting accurate low-jitter timing signals.
--
Bill Sloman, Nijmegen
Jim Thompson
Sep 26, 2012, 12:53:26 PM9/26/12
to
http://www.analog-innovations.com/SED/DelayCircuitForNarrowPulseWidths.pdf
This delayed signal is then used to create non-overlapping drives for
such things as full-H bridges, and commutating switches used in
synchronous rectification and integrate control loops.
Analysis is left as an exercise for the student ;-)
Hints:
(1) These are 10ps inverters (TSMC 0.18u process)
(2) This is internal to a monolithic chip, so no ESD to get in your
way, so left end of the cap flys above VDDD and below GNDD without
clamping or consequence.
This snap-shot is from a chip I designed last fall when I did an
extended stay (:-) on Long Island and met Martin Riddle.
Designed entirely on my laptop, the chip worked perfectly to
specifications first pass thru the foundry, as do ALL of my designs...
I never do "designs" without component values >:-)
John Larkin
Sep 26, 2012, 1:30:23 PM9/26/12
to
oscillator, a TCXO, so are very stable. There are tempco corrections,
so TC is typically in the few-ps per degree C sort of range. The "TTL"
output edges are around 650 ps rise/fall, faster than 10K ECL.
The OP could conceivable make a dual-one-shot thing himself, in a
sensible amount of time. If that's not good enough, it would make
sense to buy something, rather than spend weeks or months doing
something based on ECL delay lines and supporting logic.
ps - I did design this myself, and I did write the embedded uP code.
Somebody else did the FPGA code.
--
John Larkin Highland Technology, Inc
jlarkin at highlandtechnology dot com
http://www.highlandtechnology.com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Photonics and fiberoptic TTL data links
Jon Elson
Sep 26, 2012, 3:40:20 PM9/26/12
to
Jim Thompson wrote:
> On Tue, 25 Sep 2012 16:16:17 -0700, John Larkin
> <jla...@highlandtechnology.com> wrote:
>>The dual one-shot thing is cleaner and easier to tune.
>
> Not with a delay of only 10ns they're not.
Well, I think you can do it with a MC10H198 with no
> On Tue, 25 Sep 2012 16:16:17 -0700, John Larkin
> <jla...@highlandtechnology.com> wrote:
>>The dual one-shot thing is cleaner and easier to tune.
>
> Not with a delay of only 10ns they're not.
external capacitance. You'll need to convert the
trigger to the appropriate ECL levels. If you only need
a couple, this will work. If you need production quantities,
there ought to be an ECLiPS part that is equivalent, but they
are expensive.
I have done some one-shots with MC10198, and was easily able to
set them down to 15 ns and make a bank of them gang-adjustable
with an external control voltage.
Jon
Jon Elson
Sep 26, 2012, 3:43:23 PM9/26/12
to
Jim Thompson wrote:
>
> Give me a break, the 123 one-shot is one of the worst chip designs
> ever.
I seem to recall in some ancient gear I made many years ago, that they
>
> Give me a break, the 123 one-shot is one of the worst chip designs
> ever.
were insanely sensitive to EMI. A small ESD event completely across
the room would trip the FF as if it were a full-swing logic pulse.
I never did get that thing working reliably.
Jon
Bill Sloman
Sep 26, 2012, 4:15:49 PM9/26/12
to
On Sep 26, 9:31 pm, Jon Elson <jmel...@wustl.edu> wrote:
> Jim Thompson wrote:
> > On Tue, 25 Sep 2012 16:16:17 -0700, John Larkin
> > <jlar...@highlandtechnology.com> wrote:
> >>The dual one-shot thing is cleaner and easier to tune.
>
> > Not with a delay of only 10ns they're not.
>
> Well, I think you can do it with a MC10H198 with no
> external capacitance. You'll need to convert the
> trigger to the appropriate ECL levels. If you only need
> a couple, this will work. If you need production quantities,
> there ought to be an ECLiPS part that is equivalent, but they
> are expensive.
Pity about that. ON-Semiconductor don't make them any more, and don't
> Jim Thompson wrote:
> > On Tue, 25 Sep 2012 16:16:17 -0700, John Larkin
> > <jlar...@highlandtechnology.com> wrote:
> >>The dual one-shot thing is cleaner and easier to tune.
>
> > Not with a delay of only 10ns they're not.
>
> Well, I think you can do it with a MC10H198 with no
> external capacitance. You'll need to convert the
> trigger to the appropriate ECL levels. If you only need
> a couple, this will work. If you need production quantities,
> there ought to be an ECLiPS part that is equivalent, but they
> are expensive.
seem to have any ECLinPS equivalent
http://www.onsemi.com/PowerSolutions/product.do?id=MC10198FN
> I have done some one-shots with MC10198, and was easily able to
> set them down to 15 ns and make a bank of them gang-adjustable
> with an external control voltage.
Instruments voltage contrast electron microscope.
In fact I used several. One generated pulses wider than about 100nsec,
range-switched by switching in a variety of timing capacitors, the
other generated pulse in the 20nsec to 100nsec region, controller by
adjusting the ramp generating current. For the narrowest pulses 5nsec,
2nsec, 1nsec and 0.5nsec we split a 10nsec ecl pulse and fed one copy
- as a "start" pulse into into one side of a NOR-gate built with
discrete broad-band transistors while the other copy, after routing
through a series of small delays realised as loops of miniature coax,
hit the other side of the gate as a "stop" pulse.
Very nice parts. It's a pity that they've gone obsolete.
--
Bill Sloman, Nijmegen
John Larkin
Sep 26, 2012, 4:26:26 PM9/26/12
to
On Wed, 26 Sep 2012 14:43:23 -0500, Jon Elson <jme...@wustl.edu>
wrote:
There was a DTL one-shot like that. I've never had problems with an
HC123.
wrote:
HC123.
Jim Thompson
Sep 26, 2012, 4:45:30 PM9/26/12
to
On Wed, 26 Sep 2012 14:40:20 -0500, Jon Elson <jme...@wustl.edu>
wrote:
Well! If you want to get down and dirty. At the device level I've
designed DLL's (delay-locked loops) for Silicon Graphics (Chippewa
Falls, WI, the old Cray facility)... voltage controlled delays, in
10ps steps plus a vernier.
wrote:
designed DLL's (delay-locked loops) for Silicon Graphics (Chippewa
Falls, WI, the old Cray facility)... voltage controlled delays, in
10ps steps plus a vernier.
Bill Sloman
Sep 26, 2012, 5:08:40 PM9/26/12
to
On Sep 26, 7:30 pm, John Larkin <jlar...@highlandtechnology.com>
wrote:
> >> >An ON-Semiconductor MC100EP195
>
> >> >http://www.onsemi.com/pub_link/Collateral/MC10EP195-D.PDF
>
> >> >offers a digitally programmable delay from 2nsec to 12nsec. You can
> >> >run the same pulse through one or - maybe easier - two of these parts
> >> >under the control of a programmable counter until you've built up the
> >> >20 to 250nsec of delay the OP is asking for, and then release the
> >> >timing pulse after that delay.
>
> >> >More complex than a monostable, and the propagation delay through the
> >> >MC100EP195 is depressingly temperature dependent - the maximum delay
> >> >increases by 6% from 25C to 85C and is decreased in the same
> >> >proportion at -40C, and the minimum delay changes about twice as fast,
> >> >but it might be good enough for use in an air-conditioned lab.
>
> >> >On the other hand, it's ECL so the power rails will be clean and the
> >> >edge transitions quick - about 100psec. You've got to route your logic
> >> >along traces that look like terminated transmission lines, but at
10K ecl is a bit dated now. Back in 1995 I published a comment in
Rev.Sci, Instrum,
http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=4993539&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D4993539
Amongst other things I objected to the offending authors making a fuss
about 10k being four times faster than TTL, when ECLinPS - which had
been freely available for a year or two by then - was four times
faster than 10K.
> The OP could conceivable make a dual-one-shot thing himself, in a
> sensible amount of time. If that's not good enough, it would make
> sense to buy something, rather than spend weeks or months doing
> something based on ECL delay lines and supporting logic.
The 74221 has a typical minimum pulse width of 47nsec with a no
external timing capacitance. Worst case limits are 20nsec and 70nsec.
This is incompatible with the 10nsec to 250nsec pulse width requested
by the OP. There are lots of ways that you could shave the pulse down
a bit to reduce that worst case 70nsec down to 10nsec, but none that
would be all that trustworthy, and it's certainly not the single chip
solution that the OP asked for.
As Jon Elson pointed out the MC10198 would have done the job
beautifully, but ON-semiconductor don't make it any more.
The MC100EP195 isn't a single chip solution, and wrapping it up in
enough supporting logic to do the job wouldn't be trivial, but it can
be guaranteed to work, and work very well, if the job is done
carefully. You'd want to do it on a four layer board, and make all the
connections 75R micro-strip. The pulse width would then programmable
in 10psec steps and the pulse edges would be very clean.
The temperature dependence of the delays is a pain, but it looks as if
it would be smooth and predictable. One might be tempted to glue a
Peltier junction onto the top of the MC100EP195, and big heatsink on
top of that, and regulate the substrate temperature to a millidegree
or two, if one could work out how to sense the temperature inside the
MC100EP195 package, by perhaps exploiting one of the protection diodes
as a thermometer.
Buying in a pulse generator is a much better idea, but no fun.
<snip>
--
Bill Sloman, Nijmegen
wrote:
> On Wed, 26 Sep 2012 09:45:50 -0700 (PDT),BillSloman
>
>
> <bill.slo...@ieee.org> wrote:
> >On Sep 26, 4:26 pm, John Larkin
> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> >> On Wed, 26 Sep 2012 04:01:35 -0700 (PDT),BillSloman
>
> >> <bill.slo...@ieee.org> wrote:
> >> >On Sep 26, 6:38 am, John Larkin
> >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> >> >> On Tue, 25 Sep 2012 23:17:10 -0500, John Fields
>
> >> >> <jfie...@austininstruments.com> wrote:
> >> >> >On Tue, 25 Sep 2012 16:16:17 -0700, John Larkin
> >> >> ><jlar...@highlandtechnology.com> wrote:
>
> >> >> >>On Tue, 25 Sep 2012 17:00:01 -0500, John Fields
> >> >> >><jfie...@austininstruments.com> wrote:
>
> >> >> >>>On Tue, 25 Sep 2012 13:59:55 -0700, John Larkin
> >> >> >>><jlar...@highlandtechnology.com> wrote:
>
> >> >> >>>>On Tue, 25 Sep 2012 09:56:05 -0400, Neon John <n...@never.com> wrote:
>
> >> >> >>>>>On Tue, 25 Sep 2012 14:24:33 +0100, iCod <sir...@lineone.net> wrote:
>
> >> >> >>>>>>I need to generate a clean pulse variable from10nS to 250nS twice
> >> >> >>>>>>a second 2Hz. I'm sure there is a chip out there that will do this?
> >> >> >>>>>>I have tried a 555 for the 'long' time but the rising edge is too
> >> >> >>>>>>dirty to derive a clean narrow pulse. Any ideas or pointers greatly
> >> >> >>>>>>appreciated.
<snip>
> >On Sep 26, 4:26 pm, John Larkin
> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> >> On Wed, 26 Sep 2012 04:01:35 -0700 (PDT),BillSloman
>
> >> <bill.slo...@ieee.org> wrote:
> >> >On Sep 26, 6:38 am, John Larkin
> >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> >> >> On Tue, 25 Sep 2012 23:17:10 -0500, John Fields
>
> >> >> <jfie...@austininstruments.com> wrote:
> >> >> >On Tue, 25 Sep 2012 16:16:17 -0700, John Larkin
> >> >> ><jlar...@highlandtechnology.com> wrote:
>
> >> >> >>On Tue, 25 Sep 2012 17:00:01 -0500, John Fields
> >> >> >><jfie...@austininstruments.com> wrote:
>
> >> >> >>>On Tue, 25 Sep 2012 13:59:55 -0700, John Larkin
> >> >> >>><jlar...@highlandtechnology.com> wrote:
>
> >> >> >>>>On Tue, 25 Sep 2012 09:56:05 -0400, Neon John <n...@never.com> wrote:
>
> >> >> >>>>>On Tue, 25 Sep 2012 14:24:33 +0100, iCod <sir...@lineone.net> wrote:
>
> >> >> >>>>>>I need to generate a clean pulse variable from10nS to 250nS twice
> >> >> >>>>>>a second 2Hz. I'm sure there is a chip out there that will do this?
> >> >> >>>>>>I have tried a 555 for the 'long' time but the rising edge is too
> >> >> >>>>>>dirty to derive a clean narrow pulse. Any ideas or pointers greatly
> >> >> >>>>>>appreciated.
> >> >An ON-Semiconductor MC100EP195
>
> >> >http://www.onsemi.com/pub_link/Collateral/MC10EP195-D.PDF
>
> >> >offers a digitally programmable delay from 2nsec to 12nsec. You can
> >> >run the same pulse through one or - maybe easier - two of these parts
> >> >under the control of a programmable counter until you've built up the
> >> >20 to 250nsec of delay the OP is asking for, and then release the
> >> >timing pulse after that delay.
>
> >> >More complex than a monostable, and the propagation delay through the
> >> >MC100EP195 is depressingly temperature dependent - the maximum delay
> >> >increases by 6% from 25C to 85C and is decreased in the same
> >> >proportion at -40C, and the minimum delay changes about twice as fast,
> >> >but it might be good enough for use in an air-conditioned lab.
>
> >> >On the other hand, it's ECL so the power rails will be clean and the
> >> >edge transitions quick - about 100psec. You've got to route your logic
Rev.Sci, Instrum,
http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=4993539&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D4993539
Amongst other things I objected to the offending authors making a fuss
about 10k being four times faster than TTL, when ECLinPS - which had
been freely available for a year or two by then - was four times
faster than 10K.
> The OP could conceivable make a dual-one-shot thing himself, in a
> sensible amount of time. If that's not good enough, it would make
> sense to buy something, rather than spend weeks or months doing
> something based on ECL delay lines and supporting logic.
external timing capacitance. Worst case limits are 20nsec and 70nsec.
This is incompatible with the 10nsec to 250nsec pulse width requested
by the OP. There are lots of ways that you could shave the pulse down
a bit to reduce that worst case 70nsec down to 10nsec, but none that
would be all that trustworthy, and it's certainly not the single chip
solution that the OP asked for.
As Jon Elson pointed out the MC10198 would have done the job
beautifully, but ON-semiconductor don't make it any more.
The MC100EP195 isn't a single chip solution, and wrapping it up in
enough supporting logic to do the job wouldn't be trivial, but it can
be guaranteed to work, and work very well, if the job is done
carefully. You'd want to do it on a four layer board, and make all the
connections 75R micro-strip. The pulse width would then programmable
in 10psec steps and the pulse edges would be very clean.
The temperature dependence of the delays is a pain, but it looks as if
it would be smooth and predictable. One might be tempted to glue a
Peltier junction onto the top of the MC100EP195, and big heatsink on
top of that, and regulate the substrate temperature to a millidegree
or two, if one could work out how to sense the temperature inside the
MC100EP195 package, by perhaps exploiting one of the protection diodes
as a thermometer.
Buying in a pulse generator is a much better idea, but no fun.
<snip>
--
Bill Sloman, Nijmegen
John Larkin
Sep 26, 2012, 5:35:32 PM9/26/12
to
NOR gate (one more) could do the job. One one-shot would be fixed at,
say, 100 ns, and the other would be adjusted from 110 to 260. The gate
takes the difference.
I could explain it in more detail if you don't get the concept.
Bill Sloman
Sep 26, 2012, 7:29:51 PM9/26/12
to
On Sep 26, 11:35 pm, John Larkin <jlar...@highlandtechnology.com>
wrote:
> On Wed, 26 Sep 2012 14:08:40 -0700 (PDT),BillSloman
> >http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=4993539&url=htt...
first one shot to 100nsec, you'd rely on the two one-shots on a single
substrate being more or less the same, and set up the first one for a
minimum pulse width - 2k to +5V and no capacitor - and set up the
second to cover the range from there - plus 10nnsec - out to about
300nsec.
I'd use a 74221, and program the pulse width on the second monostable
in the package with a current mirror delivering a constant but
adjustable (from about 2mA on down to perhaps 0.2mA or whatever - it's
a long time since I've done it) current into the Rext/Cext pin,
primarily to let me put the pot that programmed the pulse width a long
way from the 74221 generating the pulse without hanging a long aerial
on the Rext/Cext pin.
You could probably make the programming rheostat a 3-turn pot, with
each turn adding another 100nsec to the pulse width, and use an
auxiliary trim-pot to allow the range to start 10nsec. There'd
presumably be a op amp in there to convert the current being sunk into
the potentiometer into a current to be fed into the controlling side
of the current mirror.
There used to be application notes around that talked about doing
that, but I can't seem to find any of them
http://www2.elo.utfsm.cl/~lsb/elo211/datos/lacaja/74123.pdf
presents Nat. Semi.'s AN-366 from 1984, which is informative, but not
on that specific point.
http://www.fairchildsemi.com/an/AN/AN-138.pdf
shows the idea in action, but only on the CMOS version of the 221, and
there's no explanation of what's going on.
--
Bill Sloman, Nijmegen
wrote:
> On Wed, 26 Sep 2012 14:08:40 -0700 (PDT),BillSloman
>
> >Amongst other things I objected to the offending authors making a fuss
> >about 10k being four times faster than TTL, when ECLinPS - which had
> >been freely available for a year or two by then - was four times
> >faster than 10K.
>
> >> The OP could conceivable make a dual-one-shot thing himself, in a
> >> sensible amount of time. If that's not good enough, it would make
> >> sense to buy something, rather than spend weeks or months doing
> >> something based on ECL delay lines and supporting logic.
>
> >The 74221 has a typical minimum pulse width of 47nsec with a no
> >external timing capacitance. Worst case limits are 20nsec and 70nsec.
>
> >This is incompatible with the 10nsec to 250nsec pulse width requested
> >by the OP. There are lots of ways that you could shave the pulse down
> >a bit to reduce that worst case 70nsec down to 10nsec, but none that
> >would be all that trustworthy, and it's certainly not the single chip
> >solution that the OP asked for.
>
> As I suggested, a couple of times, a dual one-shot (one chip) and a
> NOR gate (one more) could do the job. One one-shot would be fixed at,
> say, 100 ns, and the other would be adjusted from 110 to 260. The gate
> takes the difference.
>
> I could explain it in more detail if you don't get the concept.
It's not exactly a complicated idea. You wouldn't actually trim the
> >Amongst other things I objected to the offending authors making a fuss
> >about 10k being four times faster than TTL, when ECLinPS - which had
> >been freely available for a year or two by then - was four times
> >faster than 10K.
>
> >> The OP could conceivable make a dual-one-shot thing himself, in a
> >> sensible amount of time. If that's not good enough, it would make
> >> sense to buy something, rather than spend weeks or months doing
> >> something based on ECL delay lines and supporting logic.
>
> >The 74221 has a typical minimum pulse width of 47nsec with a no
> >external timing capacitance. Worst case limits are 20nsec and 70nsec.
>
> >This is incompatible with the 10nsec to 250nsec pulse width requested
> >by the OP. There are lots of ways that you could shave the pulse down
> >a bit to reduce that worst case 70nsec down to 10nsec, but none that
> >would be all that trustworthy, and it's certainly not the single chip
> >solution that the OP asked for.
>
> As I suggested, a couple of times, a dual one-shot (one chip) and a
> NOR gate (one more) could do the job. One one-shot would be fixed at,
> say, 100 ns, and the other would be adjusted from 110 to 260. The gate
> takes the difference.
>
> I could explain it in more detail if you don't get the concept.
first one shot to 100nsec, you'd rely on the two one-shots on a single
substrate being more or less the same, and set up the first one for a
minimum pulse width - 2k to +5V and no capacitor - and set up the
second to cover the range from there - plus 10nnsec - out to about
300nsec.
I'd use a 74221, and program the pulse width on the second monostable
in the package with a current mirror delivering a constant but
adjustable (from about 2mA on down to perhaps 0.2mA or whatever - it's
a long time since I've done it) current into the Rext/Cext pin,
primarily to let me put the pot that programmed the pulse width a long
way from the 74221 generating the pulse without hanging a long aerial
on the Rext/Cext pin.
You could probably make the programming rheostat a 3-turn pot, with
each turn adding another 100nsec to the pulse width, and use an
auxiliary trim-pot to allow the range to start 10nsec. There'd
presumably be a op amp in there to convert the current being sunk into
the potentiometer into a current to be fed into the controlling side
of the current mirror.
There used to be application notes around that talked about doing
that, but I can't seem to find any of them
http://www2.elo.utfsm.cl/~lsb/elo211/datos/lacaja/74123.pdf
presents Nat. Semi.'s AN-366 from 1984, which is informative, but not
on that specific point.
http://www.fairchildsemi.com/an/AN/AN-138.pdf
shows the idea in action, but only on the CMOS version of the 221, and
there's no explanation of what's going on.
--
Bill Sloman, Nijmegen
John Larkin
Sep 26, 2012, 7:49:26 PM9/26/12
to
one-shots are initially fired. That can be fixed by using a couple of
the other NOR sections to delay the start of the second (variable)
one-shot. Or use the output of the first one-shot to fire the second
one.
Bill Sloman
Sep 27, 2012, 4:13:29 AM9/27/12
to
On Sep 27, 1:49 am, John Larkin <jlar...@highlandtechnology.com>
wrote:
I'd be inclined to use the common input to both monostables to mask
the init
> Or use the output of the first one-shot to fire the second
> one.
>
> --
>
> John Larkin Highland Technology, Inc
>
> jlarkin at highlandtechnology dot comhttp://www.highlandtechnology.com
>
> read more »
wrote:
> On Wed, 26 Sep 2012 16:29:51 -0700 (PDT), Bill Sloman
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
the init
> Or use the output of the first one-shot to fire the second
> one.
>
> --
>
> John Larkin Highland Technology, Inc
>
>
> Precision electronic instrumentation
> Picosecond-resolution Digital Delay and Pulse generators
> Custom laser drivers and controllers
> Photonics and fiberoptic TTL data links
> VME thermocouple, LVDT,...
> Precision electronic instrumentation
> Picosecond-resolution Digital Delay and Pulse generators
> Custom laser drivers and controllers
> Photonics and fiberoptic TTL data links
>
> read more »
Bill Sloman
Sep 27, 2012, 4:26:32 AM9/27/12
to
On Sep 27, 1:49 am, John Larkin <jlar...@highlandtechnology.com>
wrote:
I'd probably use the common trigger to both monostables to mask the
output until one or other of them had fired; worst case 74221
propagation delay from trimmer to output is about 80nsec, which makes
the "best case" about 30nsec (but they don't specify it at all) and
the propagation delay through the gating logic should be long enough
to mask the glitch. It's the sort of thing you'd sort out at the
detail design level.
> Or use the output of the first one-shot to fire the second one.
You might. It's a bit too crude and extravagant for anybody serious
about circuit design.
--
Bill Sloman, Nijmegen
wrote:
> On Wed, 26 Sep 2012 16:29:51 -0700 (PDT), Bill Sloman
>
>
output until one or other of them had fired; worst case 74221
propagation delay from trimmer to output is about 80nsec, which makes
the "best case" about 30nsec (but they don't specify it at all) and
the propagation delay through the gating logic should be long enough
to mask the glitch. It's the sort of thing you'd sort out at the
detail design level.
> Or use the output of the first one-shot to fire the second one.
about circuit design.
--
Bill Sloman, Nijmegen
John Larkin
Sep 27, 2012, 10:20:36 AM9/27/12
to
parts. It's not crude, it's elegant. I'm suge glad you don't work for
me. Actually, I'm glad you don't work for anybody.
--
John Larkin Highland Technology Inc
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Photonics and fiberoptic TTL data links
bloggs.fred...@gmail.com
Sep 27, 2012, 11:46:23 AM9/27/12
to
What the heck is wrong with a switched current source + capacitor ramp driving a high speed comparator, the other input of which is driven by a variable voltage threshold? The OP only wants a 25:1 pulse width adjustment so that's no big deal.
Jim Thompson
Sep 27, 2012, 12:43:47 PM9/27/12
to
>
>That's a nice design variant on the multi-inverter oscillator, but I don't see where it lends itself to easy adjustability from a front panel mounted pot- or the equivalent located at some distance from the high speed components.
In this case I didn't need adjustability. When I do, I generally do
>That's a nice design variant on the multi-inverter oscillator, but I don't see where it lends itself to easy adjustability from a front panel mounted pot- or the equivalent located at some distance from the high speed components.
an adjustment of the inverter rails... easy monolithically, tricky in
discrete's.
>What the heck is wrong with a switched current source + capacitor ramp driving a high speed comparator, the other input of which is driven by a variable voltage threshold? The OP only wants a 25:1 pulse width adjustment so that's no big deal.
device level.
Larkin promised us a schematic with component values, but never has
posted it.
You should adjust your wrap setting. I have mine set at 70 to allow
room for attribution marks without spillover.
Bill Sloman
Sep 27, 2012, 1:23:56 PM9/27/12
to
On Sep 27, 4:20 pm, John Larkin
<snip>
> >> Or use the output of the first one-shot to fire the second one.
>
> >You might. It's a bit too crude and extravagant for anybody serious
> >about circuit design.
>
> Extravagant? It avoids a race hazard by moving one wire; no additional
> parts.
It introduces a good deal more delay than is strictly necessary. We've
already got the propagation delay from the initiating edge to the
output of the first monostable, and you want to add in the same
propagation delay for the second monostable? And a TTL monostable at
that, so the delay depends on the state of the 5V rail.
> It's not crude, it's elegant.
Like everything else invented by John Larkin ...
>I'm sure glad you don't work for me. Actually, I'm glad you don't work
> for anybody.
Sure, I'm guilty of the unforgivable crime of not sharing your opinion
of John Larkin's virtues as a circuit designer. At least you won't be
tempted to report me to the FBI for harbouring dangerously anti-
American attitudes, as Jim Thompson says he did. There's no committee
- as yet - for investigating people who aren't sufficiently credulous
about John Larkin's self-advertising.
--
Bill Sloman, Nijmegen
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Thu, 27 Sep 2012 01:26:32 -0700 (PDT), Bill Sloman
>
> On Thu, 27 Sep 2012 01:26:32 -0700 (PDT), Bill Sloman
>
> >> Or use the output of the first one-shot to fire the second one.
>
> >You might. It's a bit too crude and extravagant for anybody serious
> >about circuit design.
>
> Extravagant? It avoids a race hazard by moving one wire; no additional
> parts.
already got the propagation delay from the initiating edge to the
output of the first monostable, and you want to add in the same
propagation delay for the second monostable? And a TTL monostable at
that, so the delay depends on the state of the 5V rail.
> It's not crude, it's elegant.
>I'm sure glad you don't work for me. Actually, I'm glad you don't work
> for anybody.
Sure, I'm guilty of the unforgivable crime of not sharing your opinion
of John Larkin's virtues as a circuit designer. At least you won't be
tempted to report me to the FBI for harbouring dangerously anti-
American attitudes, as Jim Thompson says he did. There's no committee
- as yet - for investigating people who aren't sufficiently credulous
about John Larkin's self-advertising.
--
Bill Sloman, Nijmegen
John Larkin
Sep 27, 2012, 1:29:47 PM9/27/12
to
--
John Larkin Highland Technology, Inc
jlarkin at highlandtechnology dot com
http://www.highlandtechnology.com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Photonics and fiberoptic TTL data links
Michael A. Terrell
Sep 27, 2012, 1:39:18 PM9/27/12
to
Jim Thompson wrote:
>
> You should adjust your wrap setting. I have mine set at 70 to allow
> room for attribution marks without spillover.
Jim Thompson
Sep 27, 2012, 3:55:45 PM9/27/12
to
Bill Sloman
Sep 27, 2012, 6:20:00 PM9/27/12
to
On Sep 27, 7:29 pm, John Larkin <jlar...@highlandtechnology.com>
wrote:
Don't tempt me. I only use my powers for good, but you do work for the
dark side from time to time, and not only by propagating climate
change denialist propaganda.
--
Bill Sloman, Nijmegen
wrote:
> On Thu, 27 Sep 2012 10:23:56 -0700 (PDT), Bill Sloman
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
dark side from time to time, and not only by propagating climate
change denialist propaganda.
--
Bill Sloman, Nijmegen
John Larkin
Sep 27, 2012, 8:51:58 PM9/27/12
to
certain middle-eastern country develop nuclear weapons. I've given
away far more than I've earned.
You don't use your powers for good; you aren't effective enough.
So, do you admit that the dual one-shot thing has a race hazard? If
so, what's "too crude and extravagant" about my suggested fix? What do
you have that's better?
bloggs.fred...@gmail.com
Sep 27, 2012, 9:21:19 PM9/27/12
to
That's a nice design variant on the multi-inverter oscillator, but I don't see where it lends itself to easy adjustability from a front panel mounted pot- or the equivalent located at some distance from the high speed components.
What the heck is wrong with a switched current source + capacitor ramp driving a high speed comparator, the other input of which is driven by a variable voltage threshold? The OP only wants a 25:1 pulse width adjustment so that's no big deal.
END OP
Did that wrap right?
bloggs.fred...@gmail.com
Sep 27, 2012, 9:25:41 PM9/27/12
to
On Thursday, September 27, 2012 8:52:02 PM UTC-4, John Larkin wrote:
> I refused to help a
>
> certain middle-eastern country develop nuclear weapons.
Haha-
> I refused to help a
>
> certain middle-eastern country develop nuclear weapons.
Michael A. Terrell
Sep 27, 2012, 9:48:32 PM9/27/12
to
Jim Thompson wrote:
>
> On Thu, 27 Sep 2012 13:39:18 -0400, "Michael A. Terrell"
> <mike.t...@earthlink.net> wrote:
>
> >
> >Jim Thompson wrote:
> >>
> >> You should adjust your wrap setting. I have mine set at 70 to allow
> >> room for attribution marks without spillover.
> >
> >
> > He's using Google Groups.
>
> Google Groups has no editor setting capabilities ??
calling it 'the new Google Groups' after every change.
Bill Sloman
Sep 28, 2012, 5:34:33 AM9/28/12
to
On Sep 28, 2:52 am, John Larkin <jlar...@highlandtechnology.com>
wrote:
So where did you steal the unearned money that you have given away?
You've made it fairly clear that you didn't have an inherited fortune
to give away.
> You don't use your powers for good; you aren't effective enough.
Not where you can see the effects.
> So, do you admit that the dual one-shot thing has a race hazard?
Obviously - the propagation delay from the trigger to the start of the
output pulse can be anywhere from 20nsec to 70nsec for either
monostable, and you've got to mask that first 70nsec in consequence
> If so, what's "too crude and extravagant" about my suggested fix? What do
> you have that's better?
Anything with a shorter propagation delay; my preference was for a
short trigger pulse which could be used to mask the final output pulse
until both monostables could be relied on to have fired. I'm not going
to design the whole circuit just to prove the point - as far as I'm
concerned the two monostable solution is cheap and nasty, and I
wouldn't put in any effort on it until I was convinced that iCod
didn't need anything better
--
Bill Sloman, Nijmegen
wrote:
> On Thu, 27 Sep 2012 15:20:00 -0700 (PDT), Bill Sloman
>
>
You've made it fairly clear that you didn't have an inherited fortune
to give away.
> You don't use your powers for good; you aren't effective enough.
> So, do you admit that the dual one-shot thing has a race hazard?
output pulse can be anywhere from 20nsec to 70nsec for either
monostable, and you've got to mask that first 70nsec in consequence
> If so, what's "too crude and extravagant" about my suggested fix? What do
> you have that's better?
short trigger pulse which could be used to mask the final output pulse
until both monostables could be relied on to have fired. I'm not going
to design the whole circuit just to prove the point - as far as I'm
concerned the two monostable solution is cheap and nasty, and I
wouldn't put in any effort on it until I was convinced that iCod
didn't need anything better
--
Bill Sloman, Nijmegen
Bill Sloman
Sep 28, 2012, 5:36:45 AM9/28/12
to
--
Bill Sloman, Nijmegen
John Larkin
Sep 28, 2012, 10:19:31 AM9/28/12
to
Good pay, travel, gratitude were offered.
--
John Larkin Highland Technology Inc
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Photonics and fiberoptic TTL data links
John Larkin
Sep 28, 2012, 10:22:14 AM9/28/12
to
people buy them. I they're not happy, they can have their money back.
>> You don't use your powers for good; you aren't effective enough.
>
>Not where you can see the effects.
>
>> So, do you admit that the dual one-shot thing has a race hazard?
>
>Obviously - the propagation delay from the trigger to the start of the
>output pulse can be anywhere from 20nsec to 70nsec for either
>monostable, and you've got to mask that first 70nsec in consequence
>
>> If so, what's "too crude and extravagant" about my suggested fix? What do
>> you have that's better?
>
>Anything with a shorter propagation delay; my preference was for a
>short trigger pulse which could be used to mask the final output pulse
>until both monostables could be relied on to have fired. I'm not going
>to design the whole circuit just to prove the point - as far as I'm
>concerned the two monostable solution is cheap and nasty, and I
>wouldn't put in any effort on it until I was convinced that iCod
>didn't need anything better
--
John Larkin Highland Technology Inc
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Photonics and fiberoptic TTL data links
Bill Sloman
Sep 28, 2012, 11:09:32 AM9/28/12
to
On Sep 28, 4:19 pm, John Larkin
know much about high-speed electronic design either, but at least know
enough about training to write a - crummy - book.
It looks as if the nuclear holocaust is still some way off.
--
Bill Sloman, Nijmegen
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Fri, 28 Sep 2012 02:36:45 -0700 (PDT), Bill Sloman
>
> On Fri, 28 Sep 2012 02:36:45 -0700 (PDT), Bill Sloman
>
> <bill.slo...@ieee.org> wrote:
> >On Sep 28, 3:25 am, bloggs.fredbloggs.f...@gmail.com wrote:
> >> On Thursday, September 27, 2012 8:52:02 PM UTC-4, John Larkin wrote:
> >> > I refused to help a
>
> >> > certain middle-eastern country develop nuclear weapons.
>
> >> Haha-
>
> >They must have been desperately scraping the bottom of the barrel.
>
> They wanted me to train their people in high-speed electronics design.
> Good pay, travel, gratitude were offered.
So they couldn't afford Howard Johnson or Martin Graham, who don't
> >On Sep 28, 3:25 am, bloggs.fredbloggs.f...@gmail.com wrote:
> >> On Thursday, September 27, 2012 8:52:02 PM UTC-4, John Larkin wrote:
> >> > I refused to help a
>
> >> > certain middle-eastern country develop nuclear weapons.
>
> >> Haha-
>
> >They must have been desperately scraping the bottom of the barrel.
>
> They wanted me to train their people in high-speed electronics design.
> Good pay, travel, gratitude were offered.
know much about high-speed electronic design either, but at least know
enough about training to write a - crummy - book.
It looks as if the nuclear holocaust is still some way off.
--
Bill Sloman, Nijmegen
Bill Sloman
Sep 28, 2012, 11:15:05 AM9/28/12
to
On Sep 28, 4:22 pm, John Larkin
To what end? Would you admire the result, even if it were
breathtakingly perfect?
I prefer to waste my time amusing myself - it's playing to a more
critical audience.
In any event I'm off to Australia in a fortnight, and my wife wants me
to focus on getting packed up and organised.
--
Bill Sloman, Nijmegen
breathtakingly perfect?
I prefer to waste my time amusing myself - it's playing to a more
critical audience.
In any event I'm off to Australia in a fortnight, and my wife wants me
to focus on getting packed up and organised.
--
Bill Sloman, Nijmegen
John Larkin
Sep 28, 2012, 12:53:40 PM9/28/12
to
John Larkin
Sep 28, 2012, 12:55:02 PM9/28/12
to
--
John Larkin Highland Technology Inc
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Photonics and fiberoptic TTL data links
Bill Sloman
Sep 28, 2012, 4:50:35 PM9/28/12
to
On Sep 28, 6:53 pm, John Larkin
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Fri, 28 Sep 2012 08:15:05 -0700 (PDT),BillSloman
I've done that, and wouldn't mind doing it again.
Meanwhile iCod hasn't actually told us enough about what he's doing
and what he wants his circuit to do to let us to design anything that
might qualify as "real" electronics.
At the moment you've got the hots for the 74123 when it's only worth
using instead of the 74121 when you need the re-trigger function,
which doesn't seem to be necessary in the application. We are a very
long way from "real" electronics.
--
Bill Sloman, Nijmegen
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Fri, 28 Sep 2012 08:15:05 -0700 (PDT),BillSloman
>
>
>
>
>
>
>
>
>
> <bill.slo...@ieee.org> wrote:
> >On Sep 28, 4:22 pm, John Larkin
> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> >> On Fri, 28 Sep 2012 02:34:33 -0700 (PDT),BillSloman
>
>
>
>
>
>
>
>
> <bill.slo...@ieee.org> wrote:
> >On Sep 28, 4:22 pm, John Larkin
> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
>
> >> <bill.slo...@ieee.org> wrote:
> >> >On Sep 28, 2:52 am, John Larkin <jlar...@highlandtechnology.com>
> >> >wrote:
> >> >> On Thu, 27 Sep 2012 15:20:00 -0700 (PDT),BillSloman
> >> <bill.slo...@ieee.org> wrote:
> >> >On Sep 28, 2:52 am, John Larkin <jlar...@highlandtechnology.com>
> >> >wrote:
>
> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >On Sep 27, 7:29 pm, John Larkin <jlar...@highlandtechnology.com>
> >> >> >wrote:
> >> >> >> On Thu, 27 Sep 2012 10:23:56 -0700 (PDT),BillSloman
> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >On Sep 27, 7:29 pm, John Larkin <jlar...@highlandtechnology.com>
> >> >> >wrote:
>
> >> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >> >On Sep 27, 4:20 pm, John Larkin
> >> >> >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> >> >> >> >> On Thu, 27 Sep 2012 01:26:32 -0700 (PDT),BillSloman
> >> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >> >On Sep 27, 4:20 pm, John Larkin
> >> >> >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
>
> >> >> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >> >> >On Sep 27, 1:49 am, John Larkin <jlar...@highlandtechnology.com>
> >> >> >> >> >wrote:
> >> >> >> >> >> On Wed, 26 Sep 2012 16:29:51 -0700 (PDT),BillSloman
> >> >> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >> >> >On Sep 27, 1:49 am, John Larkin <jlar...@highlandtechnology.com>
> >> >> >> >> >wrote:
Meanwhile iCod hasn't actually told us enough about what he's doing
and what he wants his circuit to do to let us to design anything that
might qualify as "real" electronics.
At the moment you've got the hots for the 74123 when it's only worth
using instead of the 74121 when you need the re-trigger function,
which doesn't seem to be necessary in the application. We are a very
long way from "real" electronics.
--
Bill Sloman, Nijmegen
Bill Sloman
Sep 28, 2012, 4:52:52 PM9/28/12
to
On Sep 28, 6:54 pm, John Larkin
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Fri, 28 Sep 2012 02:34:33 -0700 (PDT),BillSloman
I'm sure yours could find something more useful for you to do too.
--
Bill Sloman, Nijmegen
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Fri, 28 Sep 2012 02:34:33 -0700 (PDT),BillSloman
>
>
>
>
>
>
>
>
>
> <bill.slo...@ieee.org> wrote:
> >On Sep 28, 2:52 am, John Larkin <jlar...@highlandtechnology.com>
> >wrote:
> >> On Thu, 27 Sep 2012 15:20:00 -0700 (PDT),BillSloman
>
>
>
>
>
>
>
>
> <bill.slo...@ieee.org> wrote:
> >On Sep 28, 2:52 am, John Larkin <jlar...@highlandtechnology.com>
> >wrote:
>
> >> <bill.slo...@ieee.org> wrote:
> >> >On Sep 27, 7:29 pm, John Larkin <jlar...@highlandtechnology.com>
> >> >wrote:
> >> >> On Thu, 27 Sep 2012 10:23:56 -0700 (PDT),BillSloman
> >> <bill.slo...@ieee.org> wrote:
> >> >On Sep 27, 7:29 pm, John Larkin <jlar...@highlandtechnology.com>
> >> >wrote:
>
> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >On Sep 27, 4:20 pm, John Larkin
> >> >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> >> >> >> On Thu, 27 Sep 2012 01:26:32 -0700 (PDT),BillSloman
> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >On Sep 27, 4:20 pm, John Larkin
> >> >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
>
> >> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >> >On Sep 27, 1:49 am, John Larkin <jlar...@highlandtechnology.com>
> >> >> >> >wrote:
> >> >> >> >> On Wed, 26 Sep 2012 16:29:51 -0700 (PDT),BillSloman
> >> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >> >On Sep 27, 1:49 am, John Larkin <jlar...@highlandtechnology.com>
> >> >> >> >wrote:
--
Bill Sloman, Nijmegen
josephkk
Sep 29, 2012, 7:50:59 AM9/29/12
to
John Larkin
Sep 29, 2012, 11:38:15 AM9/29/12
to
This has 60 ps edges and makes a nice 100 ps FWHM pulse, 100x less
than your "difficult" 10 ns. It uses a linear ramp and two
comparators, to program both delay and width. It's made from
Digikey-level discrete parts. It wasn't terribly difficult, and worked
first time. The biggest chore was e/m simulation of the geometry of
the PCB and the edge-launch SMA connectors.
https://dl.dropbox.com/u/53724080/ATLC/T240.jpg
https://dl.dropbox.com/u/53724080/ATLC/Edge_alone_4.jpg
https://dl.dropbox.com/u/53724080/ATLC/E-field.jpg
https://dl.dropbox.com/u/53724080/PCBs/T240_First_Board.JPG
There just aren't many ways to make a programmable pulse in the
hundred-picosecond range, for less than the price of a Porsche.
>
>Larkin promised us a schematic with component values, but never has
>posted it.
>
Jim Thompson
Sep 29, 2012, 11:43:13 AM9/29/12
to
On Sat, 29 Sep 2012 08:38:15 -0700, John Larkin
<jjla...@highNOTlandTHIStechnologyPART.com> wrote:
>On Thu, 27 Sep 2012 09:43:47 -0700, Jim Thompson
><To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>
>>On Thu, 27 Sep 2012 08:46:23 -0700 (PDT),
>>bloggs.fred...@gmail.com wrote:
>>
>>>On Wednesday, September 26, 2012 12:53:27 PM UTC-4, Jim Thompson wrote:
>>>> On Tue, 25 Sep 2012 18:29:32 -0700, miso <mi...@sushi.com> wrote:
>>>>
[snip]
<jjla...@highNOTlandTHIStechnologyPART.com> wrote:
>On Thu, 27 Sep 2012 09:43:47 -0700, Jim Thompson
><To-Email-Use-Th...@On-My-Web-Site.com> wrote:
>
>>On Thu, 27 Sep 2012 08:46:23 -0700 (PDT),
>>bloggs.fred...@gmail.com wrote:
>>
>>>On Wednesday, September 26, 2012 12:53:27 PM UTC-4, Jim Thompson wrote:
>>>> On Tue, 25 Sep 2012 18:29:32 -0700, miso <mi...@sushi.com> wrote:
>>>>
>>
>>That works, but, down at 10ns that gets difficult at the discrete
>>device level.
>
>http://www.highlandtechnology.com/DSS/J240DS.shtml
>
>This has 60 ps edges and makes a nice 100 ps FWHM pulse, 100x less
>than your "difficult" 10 ns. It uses a linear ramp and two
>comparators, to program both delay and width. It's made from
>Digikey-level discrete parts. It wasn't terribly difficult, and worked
>first time. The biggest chore was e/m simulation of the geometry of
>the PCB and the edge-launch SMA connectors.
>
>https://dl.dropbox.com/u/53724080/ATLC/T240.jpg
>
>https://dl.dropbox.com/u/53724080/ATLC/Edge_alone_4.jpg
>
>https://dl.dropbox.com/u/53724080/ATLC/E-field.jpg
>
>https://dl.dropbox.com/u/53724080/PCBs/T240_First_Board.JPG
>
>There just aren't many ways to make a programmable pulse in the
>hundred-picosecond range, for less than the price of a Porsche.
>
>
>>
>>Larkin promised us a schematic with component values, but never has
>>posted it.
>>
>
>Schematic of what? I forget.
Schematics of the above J240 ?:-)
>>That works, but, down at 10ns that gets difficult at the discrete
>>device level.
>
>http://www.highlandtechnology.com/DSS/J240DS.shtml
>
>This has 60 ps edges and makes a nice 100 ps FWHM pulse, 100x less
>than your "difficult" 10 ns. It uses a linear ramp and two
>comparators, to program both delay and width. It's made from
>Digikey-level discrete parts. It wasn't terribly difficult, and worked
>first time. The biggest chore was e/m simulation of the geometry of
>the PCB and the edge-launch SMA connectors.
>
>https://dl.dropbox.com/u/53724080/ATLC/T240.jpg
>
>https://dl.dropbox.com/u/53724080/ATLC/Edge_alone_4.jpg
>
>https://dl.dropbox.com/u/53724080/ATLC/E-field.jpg
>
>https://dl.dropbox.com/u/53724080/PCBs/T240_First_Board.JPG
>
>There just aren't many ways to make a programmable pulse in the
>hundred-picosecond range, for less than the price of a Porsche.
>
>
>>
>>Larkin promised us a schematic with component values, but never has
>>posted it.
>>
>
>Schematic of what? I forget.
John Larkin
Sep 29, 2012, 12:31:14 PM9/29/12
to
On Sat, 29 Sep 2012 08:43:13 -0700, Jim Thompson
Sorry, not that one.
But I posted the wrong link. I meant this one:
http://www.highlandtechnology.com/DSS/T240DS.shtml
I have the darndest time remembering my own model numbers. Too many of
the danged things.
But I posted the wrong link. I meant this one:
http://www.highlandtechnology.com/DSS/T240DS.shtml
I have the darndest time remembering my own model numbers. Too many of
the danged things.
ehsjr
Sep 29, 2012, 2:06:15 PM9/29/12
to
On 9/29/2012 7:50 AM, josephkk wrote:
> On Thu, 27 Sep 2012 18:21:19 -0700 (PDT), bloggs.fred...@gmail.com
> wrote:
>
>>
<snip>
> On Thu, 27 Sep 2012 18:21:19 -0700 (PDT), bloggs.fred...@gmail.com
> wrote:
>
>>
>> Did that wrap right?
>
>
> No. But thanks for trying.
>
> ?-)
>
It wrapped correctly for me.
>
>
> No. But thanks for trying.
>
> ?-)
>
Ed
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