For the sake of discussion, I'm talking DC to 500KHz tops - I'll pass on
light amplification for my audio, I pick up enough noise as it is :-).
Just in case it isn't clear enough, my primary question is: Are there any
technical performance reasons (linearity, bandwidth, etc) to prefer a
folded cascode over a conventional cascode to be used with, say, a JFET
diff amp in the input stage of an audio power amp? I know the Jeff Rowland
power amps from some years ago did something along this line, but he seems
to have shifted to those IC power amp thingies now (LM3886, etc). Gotta
drive that cost down, don't cha know. :-)
Anyways, I'm looking to learn, so if you know something or know some good
educational links to point to, share 'em.
thanks,
Michael
Both circuits are cascodes, so that's a draw. The folded
cascode provides level shifting as you said and that's a
plus. There is one issue associated with a carelessly-
designed folded-cascode circuit, and that's excess noise.
Consider the output current of a conventional cascode,
i = gm Vin
By contrast, the output from a folded cascode is
i = I_bias - gm Vin,
where I_bias = V_bias / R and R is the pullup resistor.
This can be rearranged to reflect the current inversion.
- i = gm (Vin + en) - V_bias / R
Normally one ignores the 2nd term, calling it a dc bias.
We can expand these equations to include noise sources,
i = gm (Vin + en)
- i = gm (Vin + en) - (V_bias + Vn) / R
where en is the input stage's voltage noise and Vn is the
noise in the path, including the folded cascode transistor.
It's customary to reflect all noise back to the input so we
can compare it with the signal to determine SNR.
- i = gm [ Vin + en - V_bias/(R gm) - Vn/(R gm) ]
We've defined V_bias as the quiet part of the bias voltage,
so we can eliminate that. We have two noise components,
en and Vn / gm R
To get a handle on these we can take en as the Johnson noise
in the input transistor's re = 1/gm = kT/qIc so we see that
it's related to our standing input-stage bias current Ic.
The bias resistor R is also related to Ic. The bias current
is generally 2 Ic, so that it can reflect a full Ic onward,
and it's generally derived from a voltage reference V_bias,
so R = V_bias / 2 Ic
Let's take some typical values. We'll pick Ic = 1.0mA so
that gm is 40mmho, and we'll pick en = 8nV for our input
stage's voltage noise density. We'll say our bias voltage
is 2.5V, so our bias resistor is 1.25k and the dimensionless
gm * R = 50. This says that the folded-cascode bias-current
zener noise will be reflected back to the input divided by 50,
so we want our zener bias-voltage noise to be much less than
8 * 50 = 400nV, let's say 150nV. Sadly many zeners are MUCH
noisier than that. So are most voltage references, such as
an LM385-2.5, at 800nV per root Hertz. So are power-supply
voltages, if one divides a portion for use as a reference.
This means that a careless designer who fails to properly
filter the voltage for the folded-cascode bias current has
a noisier amplifier as a result.
What about the voltage-noise of our folded cascode transistor?
It's also reduced by gm * R or 50x, which is another way of
saying it's reduced by the ratio re/R, which makes good sense.
We're happy to be able to ignore it entirely.
OK, Michael, I hope this has been helpful. Even though the
noise voltages discussed above are very small, smaller than
the signal input to a power amplifier, one could say it's a
consideration, and I had to come up with something! :-)
___
Thanks, /.-.\
((( ))
- Win \\\//
\\\
Winfield Hill //\\\
Rowland Institute for Science /// \\\
Cambridge, MA \/ \/
A key, or _the_ key, thing about a folded cascode is that you can get it
to run at a lower supply voltage then if it was non folded. Ideally you
try and bias the cascode so that only about 300mm or so is across the
current sources feeding the collectors of the differential pair. A
disadvantage is that the input offset is usually at least twice as much.
This is because two currents are subtracted from each other etc...
Kevin Aylward
ke...@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
A folded cascode (if I understand your terminology correctly) may introduce
greater additional distortion products due to Vbe variation in the CB stage.
For old 'scope designers, its added current consumption could be a problem,
though this would depend on what power supplies were present. As someone
else already pointed out, the folded cascode might fit inside power supplies
better than a normal cascode.
-frank
--
I'm not sure this is an accurate generalization. The whole point of a
cascode circuit it to gain a dramatic benefit from driving the emitter
of the cascode transistor, thereby reducing the amplifying transistor's
collector swing from the normal large output voltage swing to the much
smaller Vbe variation of the cascode transistor. This pleasant benefit
is obtained whether an ordinary cascode or a folded cascode is used.
It's not a distortion-inducing circuit, quite the contrary.
Incidentally, Vbe variation with collector voltage is called the Early
effect and characterized by a voltage V_A that can be used to estimate
the output resistance of a CE transistor stage, r_O = (VA + Vce)/Ic.
A cascode dramatically increases the output resistance, by a factor of
VA/VT, typically ~ 4000x. Whether the improvement is 500x or 10000x
is not material, because r_O usually ends up much higher than the next
stage's input load resistance anyway, so r_O drops out of the picture.
It's true that for basic silicon monolithic ICs, lateral PNP transistors
have lower VA than their NPN counterparts, which reduces the r_O benefit
mentioned above for folded vs ordinary cascodes. But the improvement is
still very dramatic, and this becomes a gain-limiting, not a distortion-
producing issue anyway, there being serious dominating distortion sources
such as changing beta with load current for the following stage.
Comparing both circuits, on the folded one you have vbe modulation of the CB
stage (induced by the input stage collector current variation) that cause,
non linear current error in the bias current source if it's dynamic
impedance is too low (resistors vs constant current source). This simply
don't happen with normal cascode circuit.
Another pb of folded cascode is with PSRR, when the bias resistors and the
base voltage of CB stage don't have the same reference potential, (or you
have a slightly modulated constant current source) and you don't have a well
balanced current mirror stage following, or worse : no current mirror at
all.
All these additional errors don't exist with normal cascode.
Fred.
Win Hill <wh...@picovolt.com> a écrit dans le message :
3CFCC4E1...@picovolt.com...
Thanks, Fred, you expressed it very well -- apparently better than I.
-frank
--
Fred.
fred bartoli <to...@hotmail.toto> a écrit dans le message :
3cfcd220$0$242$626a...@news.free.fr...
>> Win Hill <wh...@picovolt.com> a écrit dans le message:
>> 3CFCC4E1...@picovolt.com...
>>>
>>> I'm not sure this is an accurate generalization. The whole point of a
>>> cascode circuit it to gain a dramatic benefit from driving the emitter
>>> of the cascode transistor, thereby reducing the amplifying transistor's
>>> collector swing from the normal large output voltage swing to the much
>>> smaller Vbe variation of the cascode transistor. This pleasant benefit
>>> is obtained whether an ordinary cascode or a folded cascode is used.
>>>
>>> It's not a distortion-inducing circuit, quite the contrary.
>>>
>>> Incidentally, Vbe variation with collector voltage is called the Early
>>> effect and characterized by a voltage V_A that can be used to estimate
>>> the output resistance of a CE transistor stage, r_O = (VA + Vce)/Ic ...
>
> In article <3cfcd220$0$242$626a...@news.free.fr>,
> fred bartoli <fred.bartoli_n...@remove.free.fr> wrote:
>> Win, of course you're right, but I'm not sure Frank was speaking about
>> Early voltage induced distorsion.
>>
>> Comparing both circuits, on the folded one you have vbe modulation of the
>> CB stage (induced by the input stage collector current variation) that
>> cause, non linear current error in the bias current source if it's dynamic
>> impedance is too low (resistors vs constant current source). This simply
>> don't happen with normal cascode circuit.
>>
>> Another pb of folded cascode is with PSRR, when the bias resistors and the
>> base voltage of CB stage don't have the same reference potential, (or you
>> have a slightly modulated constant current source) and you don't have a
>> well balanced current mirror stage following, or worse : no current mirror
>> at all.
>>
>> All these additional errors don't exist with normal cascode.
Frank Miles wrote:
>
> Thanks, Fred, you expressed it very well -- apparently better than I.
Actually Fred, you said it well as well, although I failed to catch the
point. You're both right: If a resistor is used obtain the canceling
current, the distortion in a folded cascode circuit can be very high.
The change in Vbe with collector current is given by kT/q ln(I2/I1),
(e.g. 58mV for current ratio of 10:1), which when subtracted from the
voltage driving the folded-cascode bias resistor introduces unintended
changes in output current, by the ratio Vbias / VT ln(I2/I1), amounting
to fully 2% (with 2.5V bias) for the 10:1 case!
_____________
| | V+ rail
Rfc |
| 2I |
,----------+ |
| Q3 | Vref + 0.7
| | I v\| |
| | |---+ V_rail
Q1 | | Q2 /| G = gm RL = ------ = 40/0.05 = 800
|/ \| | 2 V_T for +/-40V rails
---| |--- | | \
|\v v/| +----| >--- load
'--+--' I | | /
| |
| RL
2I |
___|___ V- rail
Let's compare these distortions to that created by a long-tail pair to
get our 10:1 current ratio in the first place. Analyzing r_e for Q1 Q2
we see the gain of an LT-pair drops by 11.1% when I2/I1 is unbalanced
by 2:1 in one direction, and by 44.4% when unbalanced by 1:5 in the
other direction for our current ratio of 10:1 above. The drops in g_m
(gm = 1 / re1+re2) as Q1 Q2 go through their excursions creates much
more distortion than the 2% effect from a folded cascode with resistor.
*** Thanks be to the gods for negative feedback! *** :-)
Although it's common to degenerate the LT pair with emitter resistors,
etc., nonetheless the LT pair generally remains a dominant distortion
source.
As Fred said a solution is to replace RL with a current sink, thereby
minimizing changes in input-pair current (at least for frequencies
and signal amplitudes well below the slew-rate limits), and happily
providing a much higher gain than a meager 800 (for +/-40V supplies).
As for my claim that a folded-cascode is "not a distortion-inducing
circuit, quite the contrary," of course I am correct. :) Clearly the
2% distortion-producing error we evaluated above came from the cheap,
lazy-ass, lame "current source" comprising a single 2-cent resistor,
Rfc, and had a proper current source been used instead, our folded-
cascode stage would have exhibited zero distortion contribution!
:-)