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Analog MUX using discrete MOSFETs for flying capacitor cell measurement BMS
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P E Schoen
Nov 10, 2017, 4:05:00 AM11/10/17
to
My latest project is a battery management system (BMS) that can accurately
measure cells in a lithium battery pack, and also perform shunt balancing
and possibly charge shuttling to balance the pack. I would also like to be
able to use it for a pack of four 12V SLA batteries. A DG408 could be used
to select up to 8 cell voltage taps from nominal 3.2V (LiFePO4) or 3.7V
(Li-Ion), with a maximum voltage of 8 * 4.2 or 33.6V, which is within the
maximum voltage of 40V for the DG408. But the voltage would need a 12:1
voltage divider to read using a PIC with a 3V power supply (from the bottom
cell), and this renders the precision of the 10 bit ADC to 33.6/1024=0.032V,
which is really not accurate enough for lithium cell monitoring.
I did a preliminary design using a DG409 which can read any one of four
cells differentially, or two DG408s for 8 cells. The outputs can be fed to a
"flying capacitor", which will hold a voltage sample taken from a cell, and
then a pair of MOSFETs can translate that charge to ground level so the ADC
can read it using the full range allowed by the reference.
Another method, used by some BMS chips, utilizes a high CMRR differential
amplifier to translate the samples to the ADC.
It is also desired to implement shunt charge balancing, where selected cells
that have a higher voltage can be discharged to match lower cells in the
pack. This is wasteful, but is a commonly used method, and can be done with
MOSFETs and resistors.
It is also possible to use charge shuttling, where the flying capacitor can
be connected to lower voltage cells so that its charge adds to that of the
low cell. But this requires a fairly large capacitor and a low resistance
MUX. The DG408/9 have about 50 ohms per element, so that severely limits the
practicality of such charge shuttling.
So, I endeavored to design a multiplexer using discrete MOSFETs. My first
attempt used MOSFET opto-isolators, but they are somewhat costly and use a
fair amount of current for the LED. Then I tried several designs using
discrete MOSFETs, and it looks to be successful, although it's a bit
complex. Here is the LTSpice file for a simulation:
http://enginuitysystems.com/pix/electronics/Analog_Mux_1.asc
Here is an image of a complete schematic (as it stands now):
http://enginuitysystems.com/pix/electronics/BMS_MOSFET_1.png
And a PDF that may be easier to view:
http://enginuitysystems.com/pix/electronics/BMS_MOSFET.pdf
I think this should work pretty well, and the discrete MOSFETs should be
able to carry at least 100 mA to perform shunt balancing. A larger sampling
capacitor might be able to provide charge shuttling. The circuit seems
pretty efficient and should work on cell voltages of 2.5 to 4.5 volts, and
12V nominal batteries.
If anyone has a schematic for the DG408 or similar analog MUX, I'd
appreciate a link to the design. What I found from searching turned up NMOS
and PMOS devices in anti-parallel, which won't work because of the body
diodes. In series should work, but providing the correct gate voltages is a
challenge.
measure cells in a lithium battery pack, and also perform shunt balancing
and possibly charge shuttling to balance the pack. I would also like to be
able to use it for a pack of four 12V SLA batteries. A DG408 could be used
to select up to 8 cell voltage taps from nominal 3.2V (LiFePO4) or 3.7V
(Li-Ion), with a maximum voltage of 8 * 4.2 or 33.6V, which is within the
maximum voltage of 40V for the DG408. But the voltage would need a 12:1
voltage divider to read using a PIC with a 3V power supply (from the bottom
cell), and this renders the precision of the 10 bit ADC to 33.6/1024=0.032V,
which is really not accurate enough for lithium cell monitoring.
I did a preliminary design using a DG409 which can read any one of four
cells differentially, or two DG408s for 8 cells. The outputs can be fed to a
"flying capacitor", which will hold a voltage sample taken from a cell, and
then a pair of MOSFETs can translate that charge to ground level so the ADC
can read it using the full range allowed by the reference.
Another method, used by some BMS chips, utilizes a high CMRR differential
amplifier to translate the samples to the ADC.
It is also desired to implement shunt charge balancing, where selected cells
that have a higher voltage can be discharged to match lower cells in the
pack. This is wasteful, but is a commonly used method, and can be done with
MOSFETs and resistors.
It is also possible to use charge shuttling, where the flying capacitor can
be connected to lower voltage cells so that its charge adds to that of the
low cell. But this requires a fairly large capacitor and a low resistance
MUX. The DG408/9 have about 50 ohms per element, so that severely limits the
practicality of such charge shuttling.
So, I endeavored to design a multiplexer using discrete MOSFETs. My first
attempt used MOSFET opto-isolators, but they are somewhat costly and use a
fair amount of current for the LED. Then I tried several designs using
discrete MOSFETs, and it looks to be successful, although it's a bit
complex. Here is the LTSpice file for a simulation:
http://enginuitysystems.com/pix/electronics/Analog_Mux_1.asc
Here is an image of a complete schematic (as it stands now):
http://enginuitysystems.com/pix/electronics/BMS_MOSFET_1.png
And a PDF that may be easier to view:
http://enginuitysystems.com/pix/electronics/BMS_MOSFET.pdf
I think this should work pretty well, and the discrete MOSFETs should be
able to carry at least 100 mA to perform shunt balancing. A larger sampling
capacitor might be able to provide charge shuttling. The circuit seems
pretty efficient and should work on cell voltages of 2.5 to 4.5 volts, and
12V nominal batteries.
If anyone has a schematic for the DG408 or similar analog MUX, I'd
appreciate a link to the design. What I found from searching turned up NMOS
and PMOS devices in anti-parallel, which won't work because of the body
diodes. In series should work, but providing the correct gate voltages is a
challenge.
Jan Panteltje
Nov 10, 2017, 6:59:34 AM11/10/17
to
On a sunny day (Fri, 10 Nov 2017 04:04:51 -0500) it happened "P E Schoen"
<pa...@pstech-inc.com> wrote in <ou3q3o$g6k$1...@dont-email.me>:
My idea is n small switchers with each one PIC and 1 MOSFET,
so 1 for each cell, isolated.
and fed from a 1 turn on a big transformer driven by 2 MOSFETS push pull oscillator
Big charge currents no problem.
Avoids disspiating power in parallel MOSFETS, no heat.
Usenet patent.
When mass produced the small PCBs are possibly cheaper.
And greener.
<pa...@pstech-inc.com> wrote in <ou3q3o$g6k$1...@dont-email.me>:
so 1 for each cell, isolated.
and fed from a 1 turn on a big transformer driven by 2 MOSFETS push pull oscillator
Big charge currents no problem.
Avoids disspiating power in parallel MOSFETS, no heat.
Usenet patent.
When mass produced the small PCBs are possibly cheaper.
And greener.
Tim Williams
Nov 10, 2017, 9:59:45 AM11/10/17
to
Since 4-pin MOSFETs are nearly unavailable (not completely extinct, but, I'm
not aware of any over 6V), you have to replace them with back-to-back
MOSFETs, and a suitable drive arrangement. In short -- trace out the body
diodes in your circuit.
This is a good application for photoMOS relays:
https://www.digikey.com/short/q3cnbr
PhotoFET optos also come to mind,
http://www.mouser.com/ds/2/149/h11f1m-185284.pdf
Tim
--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: https://www.seventransistorlabs.com/
"P E Schoen" <pa...@pstech-inc.com> wrote in message
news:ou3q3o$g6k$1...@dont-email.me...
not aware of any over 6V), you have to replace them with back-to-back
MOSFETs, and a suitable drive arrangement. In short -- trace out the body
diodes in your circuit.
This is a good application for photoMOS relays:
https://www.digikey.com/short/q3cnbr
PhotoFET optos also come to mind,
http://www.mouser.com/ds/2/149/h11f1m-185284.pdf
Tim
--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: https://www.seventransistorlabs.com/
"P E Schoen" <pa...@pstech-inc.com> wrote in message
news:ou3q3o$g6k$1...@dont-email.me...
John Larkin
Nov 10, 2017, 11:25:41 AM11/10/17
to
On Fri, 10 Nov 2017 04:04:51 -0500, "P E Schoen" <pa...@pstech-inc.com>
wrote:
That's awfully complex.
Why not just slam the mosfet gates from some open-drain things, to
ground?
Opto-ssrs would sure be easy.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
wrote:
Why not just slam the mosfet gates from some open-drain things, to
ground?
Opto-ssrs would sure be easy.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
P E Schoen
Nov 10, 2017, 3:32:27 PM11/10/17
to
"John Larkin" wrote in message
news:39kb0d1pni0gf8pd3...@4ax.com...
> That's awfully complex.
> Why not just slam the mosfet gates from some open-drain things, to ground?
The PMOS devices are pulled to ground, with gate protection for when the
pack voltage is greater than the rated 20V. They are used for the voltages
that are above GND, but they don't work for the ground voltage. Of course,
that is not really needed. The low voltage taps, including GND, are read
with NMOS devices, gates pulled high.
> Opto-ssrs would sure be easy.
They were considered previously. Here is a design using TLP222, which are
about $1 each, and have 2 ohms ON resistance and can handle 500 mA. The
TLP175 is rated for 100 mA, has a trigger current of 1 mA, and is about
$0.60 each. Here is my design using that topology (yes, much simpler):
http://enginuitysystems.com/pix/electronics/BMS_TLP222.png
And a design using a DG408 for 8 channels:
http://enginuitysystems.com/pix/electronics/BMS_DG408.png
For that design, I was going to use an RC circuit and a comparator for each
of the cell voltages to GND. The voltage would be determined by the charge
time on the capacitor, which can be measured to 16 bits. An additional DG408
would allow 8 channels of differential measurement, and a high CMRR
differential amplifier could provide GND reference for the ADC. A DG409
would provide 4 channels. The flying capacitor topology could be implemented
as well.
Paul
news:39kb0d1pni0gf8pd3...@4ax.com...
> That's awfully complex.
> Why not just slam the mosfet gates from some open-drain things, to ground?
pack voltage is greater than the rated 20V. They are used for the voltages
that are above GND, but they don't work for the ground voltage. Of course,
that is not really needed. The low voltage taps, including GND, are read
with NMOS devices, gates pulled high.
> Opto-ssrs would sure be easy.
about $1 each, and have 2 ohms ON resistance and can handle 500 mA. The
TLP175 is rated for 100 mA, has a trigger current of 1 mA, and is about
$0.60 each. Here is my design using that topology (yes, much simpler):
http://enginuitysystems.com/pix/electronics/BMS_TLP222.png
And a design using a DG408 for 8 channels:
http://enginuitysystems.com/pix/electronics/BMS_DG408.png
For that design, I was going to use an RC circuit and a comparator for each
of the cell voltages to GND. The voltage would be determined by the charge
time on the capacitor, which can be measured to 16 bits. An additional DG408
would allow 8 channels of differential measurement, and a high CMRR
differential amplifier could provide GND reference for the ADC. A DG409
would provide 4 channels. The flying capacitor topology could be implemented
as well.
Paul
P E Schoen
Nov 10, 2017, 3:41:52 PM11/10/17
to
"Tim Williams" wrote in message news:ou4esp$3an$1...@dont-email.me...
> Since 4-pin MOSFETs are nearly unavailable (not completely extinct, but,
> I'm not aware of any over 6V), you have to replace them with back-to-back
> MOSFETs, and a suitable drive arrangement. In short -- trace out the body
> diodes in your circuit.
I have considered that approach, but it only works for channels more than
about 2 volts below the supply rail or above GND.
Yes, I have considered the TLP179 and the TLP222 for lower ON resistance and
higher current. They are about $0.69 and $0.96 each in 100 piece quantity.
That may be the easiest.
I have used them in the past. They are rather expensive.
> Since 4-pin MOSFETs are nearly unavailable (not completely extinct, but,
> I'm not aware of any over 6V), you have to replace them with back-to-back
> MOSFETs, and a suitable drive arrangement. In short -- trace out the body
> diodes in your circuit.
about 2 volts below the supply rail or above GND.
Yes, I have considered the TLP179 and the TLP222 for lower ON resistance and
higher current. They are about $0.69 and $0.96 each in 100 piece quantity.
That may be the easiest.
I have used them in the past. They are rather expensive.
P E Schoen
Nov 10, 2017, 3:52:03 PM11/10/17
to
"Jan Panteltje" wrote in message news:ou44at$5dc$1...@adenine.netfront.net...
> My idea is n small switchers with each one PIC and 1 MOSFET, so 1 for each
> cell, isolated. and fed from a 1 turn on a big transformer driven by 2
> MOSFETS push pull oscillator
> Big charge currents no problem.
> Avoids disspiating power in parallel MOSFETS, no heat.
> Usenet patent.
> When mass produced the small PCBs are possibly cheaper. And greener.
I have also considered such a design. Small PICs are like 50 cents each. But
the problem is with communication of the cell voltages to a master processor
for display and control. It is possible (and has been done) to daisy-chain
multiple units with communication up and down the chain, but that involves
opto-isolators or MOSFETs which increases complexity and cost.
There is a long-running thread in the DIYelectricCar forum where various
topologies are being discussed. The most recent discussion starts about here
and on following pages:
http://www.diyelectriccar.com/forums/showthread.php/bms-design-guidelines-82646p8.html
Paul
> My idea is n small switchers with each one PIC and 1 MOSFET, so 1 for each
> cell, isolated. and fed from a 1 turn on a big transformer driven by 2
> MOSFETS push pull oscillator
> Big charge currents no problem.
> Avoids disspiating power in parallel MOSFETS, no heat.
> Usenet patent.
> When mass produced the small PCBs are possibly cheaper. And greener.
the problem is with communication of the cell voltages to a master processor
for display and control. It is possible (and has been done) to daisy-chain
multiple units with communication up and down the chain, but that involves
opto-isolators or MOSFETs which increases complexity and cost.
There is a long-running thread in the DIYelectricCar forum where various
topologies are being discussed. The most recent discussion starts about here
and on following pages:
http://www.diyelectriccar.com/forums/showthread.php/bms-design-guidelines-82646p8.html
Paul
John Larkin
Nov 10, 2017, 4:34:13 PM11/10/17
to
On Fri, 10 Nov 2017 15:32:15 -0500, "P E Schoen" <pa...@pstech-inc.com>
wrote:
>"John Larkin" wrote in message
>news:39kb0d1pni0gf8pd3...@4ax.com...
>
>> That's awfully complex.
>
>> Why not just slam the mosfet gates from some open-drain things, to ground?
>
>The PMOS devices are pulled to ground, with gate protection for when the
>pack voltage is greater than the rated 20V. They are used for the voltages
>that are above GND, but they don't work for the ground voltage. Of course,
>that is not really needed. The low voltage taps, including GND, are read
>with NMOS devices, gates pulled high.
You can use one section of a cheap quad opamp open-loop as a r-r gate
driver. Add a series resistor and use a protected-gate mosfet maybe.
--
John Larkin Highland Technology, Inc
picosecond timing precision measurement
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
wrote:
>"John Larkin" wrote in message
>news:39kb0d1pni0gf8pd3...@4ax.com...
>
>> That's awfully complex.
>
>> Why not just slam the mosfet gates from some open-drain things, to ground?
>
>The PMOS devices are pulled to ground, with gate protection for when the
>pack voltage is greater than the rated 20V. They are used for the voltages
>that are above GND, but they don't work for the ground voltage. Of course,
>that is not really needed. The low voltage taps, including GND, are read
>with NMOS devices, gates pulled high.
driver. Add a series resistor and use a protected-gate mosfet maybe.
--
John Larkin Highland Technology, Inc
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
P E Schoen
Nov 10, 2017, 7:34:14 PM11/10/17
to
"John Larkin" wrote in message
news:oh6c0dhfq08qsraer...@4ax.com...
> On Fri, 10 Nov 2017 15:32:15 -0500, "P E Schoen" <pa...@pstech-inc.com>
> wrote:
>>"John Larkin" wrote in message
>>news:39kb0d1pni0gf8pd3...@4ax.com...
>
>>> That's awfully complex.
>
>>> Why not just slam the mosfet gates from some open-drain things, to
>>> ground?
>
>> The PMOS devices are pulled to ground, with gate protection for when the
>> pack voltage is greater than the rated 20V. They are used for the
>> voltages that are above GND, but they don't work for the ground voltage.
>> Of course, that is not really needed. The low voltage taps, including
>> GND, are read with NMOS devices, gates pulled high.
> You can use one section of a cheap quad opamp open-loop as a r-r gate
> driver. Add a series resistor and use a protected-gate mosfet maybe.
GND and within 2V of supply rail (30V max). It also has a programmable
precision reference, and costs less than 50 cents in 100 piece quantity.
http://www.ti.com/lit/ds/symlink/tsm104w.pdf
The outputs could provide sink voltage to each of four PMOS devices, which
can be used to sample the high sides of four cells as well as the low sides
of three top cells. It isn't necessary to sample the low side of the bottom
cell, which is GND. The spare amplifier can be used to turn on the gates of
another pair of PMOS devices to get the high and low sides of the flying
capacitor. That looks to be a good solution for up to eight LiFePO4 cells
(3.75V each), or six Li-Ion cells (up to 5V each). Perhaps each op-amp could
be used for a pair of PMOS devices, so one quad device can suffice.
It seems I may have over-complicated this design, but it still may be useful
for higher voltage battery packs of 12V each, although the MOSFET
opto-isolators may be best for that.
Thanks,
Paul
P E Schoen
Nov 10, 2017, 8:33:19 PM11/10/17
to
"P E Schoen" wrote in message news:ou5gi3$2hv$1...@dont-email.me...
> The outputs could provide sink voltage to each of four PMOS devices, which
> can be used to sample the high sides of four cells as well as the low
> sides of three top cells. It isn't necessary to sample the low side of the
> bottom cell, which is GND. The spare amplifier can be used to turn on the
> gates of another pair of PMOS devices to get the high and low sides of the
> flying capacitor. That looks to be a good solution for up to eight LiFePO4
> cells (3.75V each), or six Li-Ion cells (up to 5V each). Perhaps each
> op-amp could be used for a pair of PMOS devices, so one quad device can
> suffice.
> It seems I may have over-complicated this design, but it still may be
> useful for higher voltage battery packs of 12V each, although the MOSFET
> opto-isolators may be best for that.
It seems that there is a problem using all PMOS devices. When one pair is
sampling one of the higher cells, the turned-off PMOS devices on the lower
cells will conduct through the body diodes. My original design using both
PMOS and NMOS for each pair might be OK. Otherwise, maybe a series-connected
PMOS and NMOS with high and low gate drives may work, although perhaps not
for the top voltage. That might require a single PMOS device.
Here is a simulation showing the problem:
http://enginuitysystems.com/pix/electronics/Analog_Mux_2a.png
http://enginuitysystems.com/pix/electronics/Analog_Mux_2a.asc
The DG408/9 and the opto-isolators and the differential amplifier are
beginning to look much better.
Paul
> The outputs could provide sink voltage to each of four PMOS devices, which
> can be used to sample the high sides of four cells as well as the low
> sides of three top cells. It isn't necessary to sample the low side of the
> bottom cell, which is GND. The spare amplifier can be used to turn on the
> gates of another pair of PMOS devices to get the high and low sides of the
> flying capacitor. That looks to be a good solution for up to eight LiFePO4
> cells (3.75V each), or six Li-Ion cells (up to 5V each). Perhaps each
> op-amp could be used for a pair of PMOS devices, so one quad device can
> suffice.
> It seems I may have over-complicated this design, but it still may be
> useful for higher voltage battery packs of 12V each, although the MOSFET
> opto-isolators may be best for that.
sampling one of the higher cells, the turned-off PMOS devices on the lower
cells will conduct through the body diodes. My original design using both
PMOS and NMOS for each pair might be OK. Otherwise, maybe a series-connected
PMOS and NMOS with high and low gate drives may work, although perhaps not
for the top voltage. That might require a single PMOS device.
Here is a simulation showing the problem:
http://enginuitysystems.com/pix/electronics/Analog_Mux_2a.png
http://enginuitysystems.com/pix/electronics/Analog_Mux_2a.asc
The DG408/9 and the opto-isolators and the differential amplifier are
beginning to look much better.
Paul
whit3rd
Nov 10, 2017, 9:51:11 PM11/10/17
to
On Friday, November 10, 2017 at 1:05:00 AM UTC-8, P E Schoen wrote:
> My latest project is a battery management system (BMS) that can accurately
> measure cells in a lithium battery pack, and also perform shunt balancing
> and possibly charge shuttling to balance the pack. I would also like to be
> able to use it for a pack of four 12V SLA batteries. A DG408 could be used
> to select up to 8 cell voltage taps...
> My latest project is a battery management system (BMS) that can accurately
> measure cells in a lithium battery pack, and also perform shunt balancing
> and possibly charge shuttling to balance the pack. I would also like to be
> able to use it for a pack of four 12V SLA batteries. A DG408 could be used
As far as monitoring is concerned, a PNP transistor with emitter resistor to a
cell (+), and base that connects (through resistor) to cell (-) will give
collector current according to cell voltage. Just monitor the
temperature of the thermal enclosure around your transistors...
For balancing, could you just use an optoisolator to steal some
charge current from the strongest cells? One isolator and one
transistor per cell is cheap.
Jan Panteltje
Nov 11, 2017, 4:25:07 AM11/11/17
to
On a sunny day (Fri, 10 Nov 2017 15:51:51 -0500) it happened "P E Schoen"
<pa...@pstech-inc.com> wrote in <ou53hf$5e7$1...@dont-email.me>:
>"Jan Panteltje" wrote in message news:ou44at$5dc$1...@adenine.netfront.net...
>
>> My idea is n small switchers with each one PIC and 1 MOSFET, so 1 for each
>> cell, isolated. and fed from a 1 turn on a big transformer driven by 2
>> MOSFETS push pull oscillator
>
>> Big charge currents no problem.
>
>> Avoids disspiating power in parallel MOSFETS, no heat.
>
>> Usenet patent.
>
>> When mass produced the small PCBs are possibly cheaper. And greener.
>
>I have also considered such a design. Small PICs are like 50 cents each. But
>the problem is with communication of the cell voltages to a master processor
>for display and control. It is possible (and has been done) to daisy-chain
>multiple units with communication up and down the chain, but that involves
>opto-isolators or MOSFETs which increases complexity and cost.
Yes, for fun give each small PIC board a photo-diode and IR LED and a fixed serial address
8 bits data, bit 9 set is address mode, old proved system.
Case should be light proof.
Master PIC (also opto and IR LED) addresses each slave board in turn and
gets reply, can set parameters and read voltages and currents.
:-)
Using optos is safer :-)
There are many ways.
But serial commienukeation is easy.
>There is a long-running thread in the DIYelectricCar forum where various
>topologies are being discussed. The most recent discussion starts about here
>and on following pages:
>
>http://www.diyelectriccar.com/forums/showthread.php/bms-design-guidelines-82646p8.html
>
>Paul
Yes, it all depends on the power levels and voltages too for course.
Low speed optocouplers are not that expensive anymore either:
https://www.ebay.com/itm/401093464932
50 for 1$51 free shipping
<pa...@pstech-inc.com> wrote in <ou53hf$5e7$1...@dont-email.me>:
>"Jan Panteltje" wrote in message news:ou44at$5dc$1...@adenine.netfront.net...
>
>> My idea is n small switchers with each one PIC and 1 MOSFET, so 1 for each
>> cell, isolated. and fed from a 1 turn on a big transformer driven by 2
>> MOSFETS push pull oscillator
>
>> Big charge currents no problem.
>
>> Avoids disspiating power in parallel MOSFETS, no heat.
>
>> Usenet patent.
>
>> When mass produced the small PCBs are possibly cheaper. And greener.
>
>I have also considered such a design. Small PICs are like 50 cents each. But
>the problem is with communication of the cell voltages to a master processor
>for display and control. It is possible (and has been done) to daisy-chain
>multiple units with communication up and down the chain, but that involves
>opto-isolators or MOSFETs which increases complexity and cost.
8 bits data, bit 9 set is address mode, old proved system.
Case should be light proof.
Master PIC (also opto and IR LED) addresses each slave board in turn and
gets reply, can set parameters and read voltages and currents.
:-)
Using optos is safer :-)
There are many ways.
But serial commienukeation is easy.
>There is a long-running thread in the DIYelectricCar forum where various
>topologies are being discussed. The most recent discussion starts about here
>and on following pages:
>
>http://www.diyelectriccar.com/forums/showthread.php/bms-design-guidelines-82646p8.html
>
>Paul
Low speed optocouplers are not that expensive anymore either:
https://www.ebay.com/itm/401093464932
50 for 1$51 free shipping
piglet
Nov 11, 2017, 8:40:40 AM11/11/17
to
Your PMOS symbol for Q8 (and possibly others) is wrong, for a pmos
device the substrate arrow points away from the channel so opposite to
an nmos device where arrow points into the channel. Think of the arrow
as being another way of indicating the intrinsic substrate D-S diode.
Here is my sketch of some universal bidrectional switches using inverse
series nmos devices :-
<https://www.dropbox.com/s/ye7fdkkagydge9g/poormans_ssr.pdf?dl=0>
In your BMS application the logicside world actually has a galvanic
connection to the batteryside world so the (B) circuit may be of more
interest and since the flying capacitor is very large compared to the HF
coupling capacitors measurement errors should not be a worry.
Battery state of charge tends not to change rapidly so why not slow
right down to just a few samples per minute and use real relays? Relays
are cheap, robust against misuse and come with multiple poles or
changeover contacts at minimal extra cost.
piglet
piglet
Nov 11, 2017, 8:51:20 AM11/11/17
to
On 10/11/2017 09:04, P E Schoen wrote:
30uA drain on the battery?
piglet
P E Schoen
Nov 11, 2017, 10:31:50 PM11/11/17
to
"piglet" wrote in message news:ou6ukf$e8b$1...@dont-email.me...
> A lot of resistors and zener diodes in your circuit :)
> Your PMOS symbol for Q8 (and possibly others) is wrong, for a pmos device
> the substrate arrow points away from the channel so opposite to an nmos
> device where arrow points into the channel. Think of the arrow as being
> another way of indicating the intrinsic substrate D-S diode.
That is probably an artifact of the screen-shot of the PDF. The symbols are
correct, but they are rather small.
> Here is my sketch of some universal bidrectional switches using inverse
> series nmos devices :-
> <https://www.dropbox.com/s/ye7fdkkagydge9g/poormans_ssr.pdf?dl=0>
That looks a lot like John Larkin's circuit. ;)
https://dl.dropboxusercontent.com/content_link/bZVI9rq6Dq5Z31eOfo9Y93qekw9ZLl6fxRI1H7fHVyWS0VzjkXKaV3fNUKYZpli0/file
> In your BMS application the logicside world actually has a galvanic
> connection to the batteryside world so the (B) circuit may be of more
> interest and since the flying capacitor is very large compared to the HF
> coupling capacitors measurement errors should not be a worry.
> Battery state of charge tends not to change rapidly so why not slow right
> down to just a few samples per minute and use real relays? Relays are
> cheap, robust against misuse and come with multiple poles or changeover
> contacts at minimal extra cost.
I would agree that solid state relays would be good, and I may go that
route. But electromechanical relays are bulky, not cheap, and draw a lot
more current. What might be interesting would be a miniature stepper switch,
perhaps like the movement in battery powered clocks and watches for the
second hand.
Paul
> A lot of resistors and zener diodes in your circuit :)
> Your PMOS symbol for Q8 (and possibly others) is wrong, for a pmos device
> the substrate arrow points away from the channel so opposite to an nmos
> device where arrow points into the channel. Think of the arrow as being
> another way of indicating the intrinsic substrate D-S diode.
correct, but they are rather small.
> Here is my sketch of some universal bidrectional switches using inverse
> series nmos devices :-
> <https://www.dropbox.com/s/ye7fdkkagydge9g/poormans_ssr.pdf?dl=0>
https://dl.dropboxusercontent.com/content_link/bZVI9rq6Dq5Z31eOfo9Y93qekw9ZLl6fxRI1H7fHVyWS0VzjkXKaV3fNUKYZpli0/file
> In your BMS application the logicside world actually has a galvanic
> connection to the batteryside world so the (B) circuit may be of more
> interest and since the flying capacitor is very large compared to the HF
> coupling capacitors measurement errors should not be a worry.
> Battery state of charge tends not to change rapidly so why not slow right
> down to just a few samples per minute and use real relays? Relays are
> cheap, robust against misuse and come with multiple poles or changeover
> contacts at minimal extra cost.
route. But electromechanical relays are bulky, not cheap, and draw a lot
more current. What might be interesting would be a miniature stepper switch,
perhaps like the movement in battery powered clocks and watches for the
second hand.
Paul
P E Schoen
Nov 16, 2017, 1:04:56 AM11/16/17
to
"piglet" wrote in message news:ou6v8h$iot$1...@dont-email.me...
> Is the wiring around R26 - R34 correct, looks like you have a continuous
> 30uA drain on the battery?
I think you are correct. But I have now made some major changes in the
circuit. It uses back-to-back P-channel MOSFETs which can sample voltages of
the plus side of the lowest cell and above. It is much simplified. I also
added a buck converter which can charge the low cell (which is used for the
PIC power supply) from the total pack. This accomplishes balancing without
wasting power in shunt resistors.
http://enginuitysystems.com/pix/electronics/BMS_MOSFET.pdf
Here is a simulation of the buck charger:
http://enginuitysystems.com/pix/electronics/BMS_Low_Cell_Charger_3.png
The ASCII file:
http://enginuitysystems.com/pix/electronics/BMS_Low_Cell_Charger_3.asc
It may need some way to monitor the charging current so the PWM can be
adjusted. Maybe a differential amplifier across ten ohm resistor R14. Maybe
something like the Si8240:
http://www.mouser.com/ds/2/368/Si8540-51544.pdf
or TS94033:
http://www.mouser.com/ds/2/761/TS94033-1036098.pdf
I may get some PC boards made and try this out.
Paul
> Is the wiring around R26 - R34 correct, looks like you have a continuous
> 30uA drain on the battery?
circuit. It uses back-to-back P-channel MOSFETs which can sample voltages of
the plus side of the lowest cell and above. It is much simplified. I also
added a buck converter which can charge the low cell (which is used for the
PIC power supply) from the total pack. This accomplishes balancing without
wasting power in shunt resistors.
http://enginuitysystems.com/pix/electronics/BMS_MOSFET.pdf
Here is a simulation of the buck charger:
http://enginuitysystems.com/pix/electronics/BMS_Low_Cell_Charger_3.png
The ASCII file:
http://enginuitysystems.com/pix/electronics/BMS_Low_Cell_Charger_3.asc
It may need some way to monitor the charging current so the PWM can be
adjusted. Maybe a differential amplifier across ten ohm resistor R14. Maybe
something like the Si8240:
http://www.mouser.com/ds/2/368/Si8540-51544.pdf
or TS94033:
http://www.mouser.com/ds/2/761/TS94033-1036098.pdf
I may get some PC boards made and try this out.
Paul
piglet
Nov 16, 2017, 3:27:50 AM11/16/17
to
On 16/11/2017 06:04, P E Schoen wrote:
> I think you are correct. But I have now made some major changes in the
> circuit. It uses back-to-back P-channel MOSFETs which can sample
> voltages of the plus side of the lowest cell and above. It is much
> simplified. I also added a buck converter which can charge the low cell
> (which is used for the PIC power supply) from the total pack. This
> accomplishes balancing without wasting power in shunt resistors.
>
> http://enginuitysystems.com/pix/electronics/BMS_MOSFET.pdf
>
Looking good. D21,D19,D7,D8 are not doing much useful work as drawn but
> I think you are correct. But I have now made some major changes in the
> circuit. It uses back-to-back P-channel MOSFETs which can sample
> voltages of the plus side of the lowest cell and above. It is much
> simplified. I also added a buck converter which can charge the low cell
> (which is used for the PIC power supply) from the total pack. This
> accomplishes balancing without wasting power in shunt resistors.
>
> http://enginuitysystems.com/pix/electronics/BMS_MOSFET.pdf
>
would if moved slightly - e.g. if D19 moved to the Q4/Q6 gate path then
blocks a sneak error current that can flow via R1 and R2.
It is possible R5 will introduce measurement errors by charging up the
flying capacitor C3.
I don't know the charge/measurement switching strategy you use but it
may be possible to merge R19 and R16 (and R23/R20,R14/R15) into one?
Buck converter D9 and D10 puzzle me but seem mostly harmless?
(Apart from Q22 the mosfet symbol arrows have still got conflicting
arrow directions - see the datasheet symbols for BSS84 and BSS138 at
ON-Semi or Diodes Inc. A solid line vs broken line channel is used to
distinguish depletion from enhancement. Explicity drawing the parasitic
diode adds clutter and is redundant if the substrate diode arrowhead is
correctly placed.)
piglet
P E Schoen
Nov 16, 2017, 6:40:08 PM11/16/17
to
"piglet" wrote in message news:ouji62$u62$1...@dont-email.me...
I will be updating this schematic as I fine tune the design:
>> http://enginuitysystems.com/pix/electronics/BMS_MOSFET.pdf
> Looking good. D21,D19,D7,D8 are not doing much useful work as drawn but
> would if moved slightly - e.g. if D19 moved to the Q4/Q6 gate path then
> blocks a sneak error current that can flow via R1 and R2.
I can see why the diodes are probably unnecessary, and I see where current
can flow from MUX+ and MUX- through Q1 and Q5 body diode when sampling, but
I don't understand how a diode can block that. Also I think you mean Q2/Q6?
> It is possible R5 will introduce measurement errors by charging up the
> flying capacitor C3.
Yes, it looks to be from the pack voltage through R5, R4, and D14. A diode
in series with R4 should take care of that.
> I don't know the charge/measurement switching strategy you use but it may
> be possible to merge R19 and R16 (and R23/R20,R14/R15) into one?
I think that would be good. I might use a polyswitch fuse but a 200 mA
device has 7.5 ohms resistance, and that severely limits the average charge
current. I will probably use 1 ohm resistors, and the one at the bottom will
be used for charge current monitoring.
> Buck converter D9 and D10 puzzle me but seem mostly harmless?
They are probably superfluous and I have removed them.
> (Apart from Q22 the mosfet symbol arrows have still got conflicting arrow
> directions - see the datasheet symbols for BSS84 and BSS138 at ON-Semi or
> Diodes Inc. A solid line vs broken line channel is used to distinguish
> depletion from enhancement. Explicity drawing the parasitic diode adds
> clutter and is redundant if the substrate diode arrowhead is correctly
> placed.)
I have corrected that. My schematic symbol editor is quirky and somehow I
got them reversed. I have redrawn the symbols, but I have left the body
diodes in place, because it is easier for me to follow the current flow to
see possible problems like the sneak current paths you found.
Thanks for your help. I hope to commit this to copper and FR4 pretty soon.
Should be fun!
Paul
I will be updating this schematic as I fine tune the design:
>> http://enginuitysystems.com/pix/electronics/BMS_MOSFET.pdf
> Looking good. D21,D19,D7,D8 are not doing much useful work as drawn but
> would if moved slightly - e.g. if D19 moved to the Q4/Q6 gate path then
> blocks a sneak error current that can flow via R1 and R2.
can flow from MUX+ and MUX- through Q1 and Q5 body diode when sampling, but
I don't understand how a diode can block that. Also I think you mean Q2/Q6?
> It is possible R5 will introduce measurement errors by charging up the
> flying capacitor C3.
in series with R4 should take care of that.
> I don't know the charge/measurement switching strategy you use but it may
> be possible to merge R19 and R16 (and R23/R20,R14/R15) into one?
device has 7.5 ohms resistance, and that severely limits the average charge
current. I will probably use 1 ohm resistors, and the one at the bottom will
be used for charge current monitoring.
> Buck converter D9 and D10 puzzle me but seem mostly harmless?
> (Apart from Q22 the mosfet symbol arrows have still got conflicting arrow
> directions - see the datasheet symbols for BSS84 and BSS138 at ON-Semi or
> Diodes Inc. A solid line vs broken line channel is used to distinguish
> depletion from enhancement. Explicity drawing the parasitic diode adds
> clutter and is redundant if the substrate diode arrowhead is correctly
> placed.)
got them reversed. I have redrawn the symbols, but I have left the body
diodes in place, because it is easier for me to follow the current flow to
see possible problems like the sneak current paths you found.
Thanks for your help. I hope to commit this to copper and FR4 pretty soon.
Should be fun!
Paul
piglet
Nov 17, 2017, 4:24:47 AM11/17/17
to
On 16/11/2017 23:39, P E Schoen wrote:
> "piglet" wrote in message news:ouji62$u62$1...@dont-email.me...
>
> "piglet" wrote in message news:ouji62$u62$1...@dont-email.me...
>
>> It is possible R5 will introduce measurement errors by charging up the
>> flying capacitor C3.
>
> Yes, it looks to be from the pack voltage through R5, R4, and D14. A
> diode in series with R4 should take care of that.
>
Simpler still is remove R5 then no diode (D21) needed either :)
>> flying capacitor C3.
>
> Yes, it looks to be from the pack voltage through R5, R4, and D14. A
> diode in series with R4 should take care of that.
>
piglet
piglet
Nov 17, 2017, 4:56:37 AM11/17/17
to
On 16/11/2017 23:39, P E Schoen wrote:
> "piglet" wrote in message news:ouji62$u62$1...@dont-email.me...
>> (Apart from Q22 the mosfet symbol arrows have still got conflicting
>> arrow directions - see the datasheet symbols for BSS84 and BSS138 at
>> ON-Semi or Diodes Inc. A solid line vs broken line channel is used to
>> distinguish depletion from enhancement. Explicity drawing the
>> parasitic diode adds clutter and is redundant if the substrate diode
>> arrowhead is correctly placed.)
>
> I have corrected that. My schematic symbol editor is quirky and somehow
> I got them reversed. I have redrawn the symbols, but I have left the
> body diodes in place, because it is easier for me to follow the current
> flow to see possible problems like the sneak current paths you found.
>
> Thanks for your help. I hope to commit this to copper and FR4 pretty
> soon. Should be fun!
>
> Paul
The body diodes are pointing in the right direction, they always were.
>> arrow directions - see the datasheet symbols for BSS84 and BSS138 at
>> ON-Semi or Diodes Inc. A solid line vs broken line channel is used to
>> distinguish depletion from enhancement. Explicity drawing the
>> parasitic diode adds clutter and is redundant if the substrate diode
>> arrowhead is correctly placed.)
>
> I have corrected that. My schematic symbol editor is quirky and somehow
> I got them reversed. I have redrawn the symbols, but I have left the
> body diodes in place, because it is easier for me to follow the current
> flow to see possible problems like the sneak current paths you found.
>
> Thanks for your help. I hope to commit this to copper and FR4 pretty
> soon. Should be fun!
>
> Paul
What was wrong is the channel or substrate diodes are shown reversed.
For instance you have Q22 correct - it is a P-channel and so the arrow
points out of the substrate and towards the source. It is in fact just
another way of showing the parasitic body diode. But now look at the
BSS84 symbols - those too are P-channel but the symbol on your design
has their substrate diode arrow pointing from source towards the back of
the gate. In other words the channel diode direction should point the
same way as the body diode (if drawn) the two arrows are showing the
same thing and so should point the same way. Likewise the symbols on
your design for the BSS138 which is an N-channel device have the body
diode drawn right but have the channel arrow pointing out the channel
pointing to source - the arrow should point into the channel. Look at
how the On-Semi datasheets for those parts correctly depict them. I
think sometimes people get confused between FETS and BJTs, on an NPN BJT
the emitter arrow points towards the outside world, not so with an
N-channel fet!
piglet
P E Schoen
Nov 17, 2017, 6:47:25 AM11/17/17
to
"piglet" wrote in message news:oumboe$5ap$1...@dont-email.me...
> The body diodes are pointing in the right direction, they always were.
> What was wrong is the channel or substrate diodes are shown reversed. For
> instance you have Q22 correct - it is a P-channel and so the arrow points
> out of the substrate and towards the source. It is in fact just another
> way of showing the parasitic body diode. But now look at the BSS84
> symbols - those too are P-channel but the symbol on your design has their
> substrate diode arrow pointing from source towards the back of the gate.
> In other words the channel diode direction should point the same way as
> the body diode (if drawn) the two arrows are showing the same thing and so
> should point the same way. Likewise the symbols on your design for the
> BSS138 which is an N-channel device have the body diode drawn right but
> have the channel arrow pointing out the channel pointing to source - the
> arrow should point into the channel. Look at how the On-Semi datasheets
> for those parts correctly depict them. I think sometimes people get
> confused between FETS and BJTs, on an NPN BJT the emitter arrow points
> towards the outside world, not so with an N-channel fet!
Whew! I found out that my PADS Logic symbol editor was somehow corrupted. I
would edit the symbol, but when I applied it to the schematic, it kept the
old one. Now I think I finally have it right, and a made the arrow open
rather than closed. I still like the body diode, but I see your point.
Anyway, I have arranged the parts on a 2"x 6" board, and that isn't really
very dense. I will be getting the prototypes made by www.eiconnect.com,
originally zoompcb.com, and they have a deal where I have gotten 5" x 5"
boards (maximum is 25 in^2) for $25 each. I am considering adding more
circuitry to fill up a 4" x 6" board - perhaps my design using TL222 optos
and one using one or two DG408 or DG409 analog switches.
Thanks,
Paul
> The body diodes are pointing in the right direction, they always were.
> What was wrong is the channel or substrate diodes are shown reversed. For
> instance you have Q22 correct - it is a P-channel and so the arrow points
> out of the substrate and towards the source. It is in fact just another
> way of showing the parasitic body diode. But now look at the BSS84
> symbols - those too are P-channel but the symbol on your design has their
> substrate diode arrow pointing from source towards the back of the gate.
> In other words the channel diode direction should point the same way as
> the body diode (if drawn) the two arrows are showing the same thing and so
> should point the same way. Likewise the symbols on your design for the
> BSS138 which is an N-channel device have the body diode drawn right but
> have the channel arrow pointing out the channel pointing to source - the
> arrow should point into the channel. Look at how the On-Semi datasheets
> for those parts correctly depict them. I think sometimes people get
> confused between FETS and BJTs, on an NPN BJT the emitter arrow points
> towards the outside world, not so with an N-channel fet!
would edit the symbol, but when I applied it to the schematic, it kept the
old one. Now I think I finally have it right, and a made the arrow open
rather than closed. I still like the body diode, but I see your point.
Anyway, I have arranged the parts on a 2"x 6" board, and that isn't really
very dense. I will be getting the prototypes made by www.eiconnect.com,
originally zoompcb.com, and they have a deal where I have gotten 5" x 5"
boards (maximum is 25 in^2) for $25 each. I am considering adding more
circuitry to fill up a 4" x 6" board - perhaps my design using TL222 optos
and one using one or two DG408 or DG409 analog switches.
Thanks,
Paul
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