DDS cleanup using PLL
Richard Hosking
I am looking to use a DDS as part of a receiver LO
As it is probably not clean enough on its own,
I am intending to use it as part of a PLL loop
There appear to be 2 schemes:
(1) DDS as a fractional N divider in the PLL loop.
ie the VCO output is the DDS clock
In this case a presume you could filter the DDS output before applying it to
the phase detector
eg reference at 455 KHz - use sharp 455 KHz filter to clean up DDS output.
Would there be a problem with loop lockup? ie if the DDS output was outside
filter bandwidth I presume the loop might not lock up. You could switch the
filter in circuit at lock
(2) DDS as a reference to the loop. In this case the DDS is moved over a
narrow range to give frequency resolution and passed through a filter to
get rid of wideband spurs.
Are there any advantages to either scheme?
I was intending to use a Minicircuits VCO 45-75 MHz as the LO
This project is presumably not for the faint hearted. Have any of you
learned gentlemen had any experience of this?
Richard
Allan Herriman
<zapri...@iinet.net.au(remove the zap)> wrote:
>Gday all
>I am looking to use a DDS as part of a receiver LO
>As it is probably not clean enough on its own,
>I am intending to use it as part of a PLL loop
>There appear to be 2 schemes:
>(1) DDS as a fractional N divider in the PLL loop.
>ie the VCO output is the DDS clock
>In this case a presume you could filter the DDS output before applying it to
>the phase detector
>eg reference at 455 KHz - use sharp 455 KHz filter to clean up DDS output.
>Would there be a problem with loop lockup? ie if the DDS output was outside
>filter bandwidth I presume the loop might not lock up. You could switch the
>filter in circuit at lock
A bandpass filter on the DDS output (before the phase detector) is
equivalent to a low pass filter on the phase detector output.
But the low pass filter will be cheaper and easier to design, for a
given performance level.
Either way, the filter is in the feedback loop of the PLL, so the
amount of filtering you can do is limited by the desired loop
bandwidth and stability concerns.
Your idea of switching the filter in once lock is achieved isn't
really viable. Loop stability problems will also occur when locked.
Switchable loop filters are usually used to improve lock times, but
the loop needs to be stable in both cases. i.e. you don't use a
switchable loop filter to work around a stability problem.
Note that reducing the loop bandwidth will reduce the output phase
noise, as long as the DDS noise is the dominant part of the output
noise.
If you continue to decrease the loop bandwidth, you'll reach a point
where the output noise will start to increase again. This noise is
the intrinsic phase noise of the VCO, and can't be cancelled if the
loop bandwidth is too low.
(It's best to consider this in the frequency domain. Start with the
phase noise characteristics of the VCO, and apply the noise
suppression characteristics of the loop.)
>(2) DDS as a reference to the loop. In this case the DDS is moved over a
>narrow range to give frequency resolution and passed through a filter to
>get rid of wideband spurs.
The advantage here is that the filter is not inside the feedback loop
of the PLL. Therefore the group delay of the filter doesn't matter
(i.e. it has no effect on the loop stability), so you can filter the
DDS output as much as you like.
The disadvantage is that the filter is a bandpass filter, and it will
need to track the DDS output (assuming the filter bandwidth is less
than the DDS output range).
>Are there any advantages to either scheme?
>
>I was intending to use a Minicircuits VCO 45-75 MHz as the LO
>This project is presumably not for the faint hearted. Have any of you
>learned gentlemen had any experience of this?
You might like to consider several of the fractional-N PLL chips out
there.
Here are some links to Philips fractional-N PLL devices:
http://www-eu5.semiconductors.philips.com/catalog/219/282/27047/31110/31605/
The 7016/8016 seems to be the "classic" one.
http://www.semiconductors.philips.com/acrobat/datasheets/SA7016_5.pdf
http://www.semiconductors.philips.com/acrobat/datasheets/SA8016_5.pdf
These work by stealing a pulse from the main divider at a regular
rate.
The jitter is partially compensated by adding an analog compensation
current to the phase detector output. (It's supposed to give about
20-30dB of spur suppression.)
Here are some from Fujitsu:
http://www.fmi.fujitsu.com/wire/wireSeriesData02.asp?s=Fractional-N&sec=suppll&grOut=Fractional%2DN
The TI ones seem to be Philips clones:
http://focus.ti.com/docs/prod/productfolder.jhtml?genericPartNumber=TRF2056
Here are the NS ones:
http://www.national.com/pf/LM/LMX2350.html
Regards,
Allan.
Allan Herriman
allan_herrim...@agilent.com (Allan Herriman) wrote:
>On Sun, 13 Jan 2002 18:14:04 +0800, "Richard Hosking"
><zapri...@iinet.net.au(remove the zap)> wrote:
>
>>Gday all
>>I am looking to use a DDS as part of a receiver LO
>>As it is probably not clean enough on its own,
>>I am intending to use it as part of a PLL loop
>>There appear to be 2 schemes:
>>(1) DDS as a fractional N divider in the PLL loop.
>>ie the VCO output is the DDS clock
>>In this case a presume you could filter the DDS output before applying it to
>>the phase detector
>>eg reference at 455 KHz - use sharp 455 KHz filter to clean up DDS output.
>>Would there be a problem with loop lockup? ie if the DDS output was outside
>>filter bandwidth I presume the loop might not lock up. You could switch the
>>filter in circuit at lock
>
>A bandpass filter on the DDS output (before the phase detector) is
>equivalent to a low pass filter on the phase detector output.
>But the low pass filter will be cheaper and easier to design, for a
>given performance level.
Oops, just noticed the magic 455kHz number. An off-the-shelf 455kHz
IF filter can give you a lot of filtering cheaply.
But watch the group delay. The better manufacturers will publish the
group delay performance in the data sheet.
Some IF filters have poor wideband rejection, so you might need
another (RC or RLC) filter in cascade.
Allan.
John Miles
>
>snip
> I was intending to use a Minicircuits VCO 45-75 MHz as the LO
> This project is presumably not for the faint hearted. Have any of you
> learned gentlemen had any experience of this?
>
By coincidence, I'm doing the exact same thing for a DC-daylight
receiver LO, and with your AD9854 board, no less. :)
The PLL reference clock in my design is:
- AD9854 clocked at 100 MHz, output center frequency 10.7 MHz
- 180 kHz ceramic FM IF filter bracketed by MCL T6-1 matching xfrmrs
- MAR-6 MMIC amp to get the level back up to 0 dBm
- MCL PLP-10.7 low-pass filter to clean up high-order overtones passed
by the ceramic filter
The phase detector will be an Analog Devices ADF4112 (ordered via
Analog's direct-sales web site but not received yet). This is
essentially a copy of the NatSemi PLLatinum chip with a programmable
prescaler and more charge-pump gain.
My VCO is a Mini-Circuits ROS-2150VW, driven from the 5V phase detector
chip with a third-order loop filter based on an OP27 low-noise opamp.
The ROS-2150VW is a nice part -- it's about US $30, and gives a full
octave of coverage between 1.0 and 2.0 GHz. Phase noise is -96 dBc at
10 kHz, which is actually pretty respectable for a beast of this nature.
Using a DDS with a narrow BPF as a PLL reference is absolutely the way
to go, IMHO. The fixed BPF essentially acts like a very high-Q tracking
filter. It allows the DDS to do what it's good at -- provide stable
signals with a high degree of frequency precision -- while avoiding the
sea of spectral garbage you usually get when you use a DDS as a PLL
reference external to the loop.
My current plan is to run the ADF4112's R counter at 3X, yielding a
comparison frequency (Fcomp) of around 3.57 MHz. The synthesizer is
required to cover the 1-2 GHz octave in full, so the N modulus will
range from 280 to 560. The DDS tuning range will be about 38 kHz (Fcomp
/ Nmin * R).
So far, I've tested the general idea with a Qualcomm Q2334 DDS driving a
NatSemi LMX2326 PLLatinum chip through a 25 kHz-wide 11.5 MHz crystal
filter (N=1043 at 1 GHz, R=12). The results have been really, really
promising. With a narrow loop BW (1.5 kHz-3 kHz in most of my tests to
date), the output at the Mini-Circuits VCO is the expected -96 dBc at 10
Khz, which is already good enough for the adjacent-channel rejection I'm
after. And there's not a spur in sight. I looked at about 100
randomly-chosen frequencies between 1 and 2 GHz, and the output spectrum
remained essentially identical at each of them.
The 1 GHz plot is at http://209.95.122.40/jm/TRACE.GIF -- the outer plot
is the LMX2326-based synthesizer, and the inner plot is from an HP8662A
to mark the analyzer's own phase-noise floor.
The LMX2326's prescaler is hardwired to 32X, so its minimum N modulus is
992. With the Analog part, I'll be able to reduce Nmin to 280 for
almost 11 dB less noise. I'm thinking I can afford to widen the loop BW
quite a bit with the new chip, and if so, I'm pretty sure it will be
possible to get the performance of the final design close to my
analyzer's own limits. I'm already within 6-7 dB of matching the
performance of the synthesizer in my Icom R7000, which is a very complex
multiloop dual-VCO beast.
This is more than you wanted to know, probably, but if it helps you
decide to use the narrowband-DDS-as-reference topology, it might be
worth it. I've been really impressed with the simplicity, economy, and
flexibility of this approach. It's hard to imagine doing it any other
way... there just doesn't seem to be a downside.
-- jm
------------------------------------------------------
http://www.qsl.net/ke5fx
Note: My E-mail address has been altered to avoid spam
------------------------------------------------------
Richard Hosking
Many thanks for your comments
I will investigate this approach
Richard
"John Miles" <jmi...@pop.removethistomailme.net> wrote in message
news:3C437E...@pop.removethistomailme.net...
John Miles
>
> <snip>
> The phase detector will be an Analog Devices ADF4112 (ordered via
> Analog's direct-sales web site but not received yet). This is
> essentially a copy of the NatSemi PLLatinum chip with a programmable
> <snip>
So, after much late-night tinkering, here are some follow-up results for
this synthesizer design (blue), compared to the synthesizer in my Icom
R7000 (magenta):
http://209.95.122.40/jm/WIDE.GIF (R7000 'wins' by 7 dB at 10 kHz due to
its
cleaner VCOs)
http://209.95.122.40/jm/MEDIUM.GIF (R7000's narrow loop is very noisy
close-in)
http://209.95.122.40/jm/NARROW.GIF (R7000 is garbage, while we look
pretty
good)
Worst-case lock time is similar for both, although their step functions
look
very different:
http://209.95.122.40/jm/TIME.GIF (blue/magenta=R7000 stepping between
770
and 1030 MHz; red/green=DDS PLL stepping between 1000 and 2000 MHz)
In general the ADF4112 doesn't seem any quieter than the LMX2326 I tried
earlier. The ADF4112 supposedly allows up to 5 mA of charge-pump gain
versus the LMX2326's 1 mA, but I kept running into stability problems at
gain settings over 2.5 mA. These plots were made with a loop bandwidth
of 2.1 kHz and a charge-pump gain of 1.88 mA.
Still, this is more-than-passable performance for such a simple design!
I've never seen a synthesizer with a gigahertz of range and sub-1 Hz
resolution that fits into a 4" x 2" Hammond 1590G box before... much
less managed to build one. It's less than a third the size of the
R7000's 770-1290 MHz PLL assembly, and has 100 times the frequency
resolution and up to 30 dB less close-in phase noise.
John Miles
Mike Monett
Fantasic, John. You got my vote for MVPOTY. This is just what I have
been looking for.
"text and schematics to follow"
Please hurry - is there anything we can do to help?
(mvpoty - Most Valuable Post Of The Year)
Regards,
Mike Monett
mrmo...@yahoo.com
John Miles
Hopefully I'll have a schematic up there before long... it's not a
complex circuit but I don't feel like entering the 80-pin DDS part
myself. Although the ADF4112 is hand-wired (barely visible at right),
the AD9854 is mounted to a cutaway section of one of Richard Hosking's
PC boards, and we've been chatting about the possibility of doing a
board design for the whole synthesizer based on the AD9854 board he's
already done.
I'd certainly like to have some boards made up, because I could use a
couple more of these synthesizers, and I don't EVER want to wire up
another TSSOP package ugly-style.
Mike Monett
> > (mvpoty - Most Valuable Post Of The Year)
> >
> > Regards,
> >
> > Mike Monett
> > mrmo...@yahoo.com
> Hopefully I'll have a schematic up there before long... it's not a
> complex circuit but I don't feel like entering the 80-pin DDS part
> myself.
Don't blame you at all. How about a simple square block just showing
the inputs and outputs?
What kind of vco are you using? You didn't mention this so far.
> Although the ADF4112 is hand-wired (barely visible at right),
> the AD9854 is mounted to a cutaway section of one of Richard Hosking's
> PC boards, and we've been chatting about the possibility of doing a
> board design for the whole synthesizer based on the AD9854 board he's
> already done.
That would be very interesting.
> I'd certainly like to have some boards made up, because I could use a
> couple more of these synthesizers, and I don't EVER want to wire up
> another TSSOP package ugly-style.
The first time is the hardest :)
Richard Hosking
I should be able to have a schematic done by the end of the week. BTW do you
want shielding between different sections of the board? I note that you have
it in your prototype
Richard
"John Miles" <jmi...@pop.removethistomailme.net> wrote in message
news:3C52E7...@pop.removethistomailme.net...
John Miles
>
> Don't blame you at all. How about a simple square block just showing
> the inputs and outputs?
Well, here's the circuit description that I sent to Richard (with a few
corrections I've already passed on to him) and additional notes in
parentheses. This is the basis for the schematic and board layout he's
working on.
------snip email to Richard-----
Basically, I started with the circuit for your (Richard's) DDS board,
using an AD9854ASQ chip. (The cheaper -AST chip would be fine, too,
since it doesn't need to run very fast, 100 MHz or thereabouts.) It is
wired the same as your board (see Richard's board at
http://members.iinet.net.au/~richardh/VK6BRO.htm, a steal at US $20 for
anyone who doesn't need the full PLL monty!), with the following
exceptions:
- The A2IOR line is permanently grounded (there's no need to ever read
from the DDS chip, as far as I can tell)
- The CS chip select line, ditto
- Same for FSKHOL and SHKEY
- The comparator circuitry is omitted (R16-R19 and C17, C19)
- The clock is supplied externally through an SMA jack terminated in 51
ohms
- The clock jack feeds the center junction of two 1K resistors going
between AVDD and ground via a 0.001 uF blocking capacitor (you may want
to make this optional if you wish to include an onboard clock option
like you have now)
- The power-supply regulators are replaced with Linear Technology LT1086
chips (just what I had available, yours are fine too, I'm sure) bolted
to the 1590 chassis as a heat sink and fed by +12V
- Aside from the usual bypass capacitors, there is a 100 uH RF choke
(from Radio Shack) between U2 and the AVDD connection point on the DDS
board. At least with the LT1086 regulators, this improves the DDS
broadband noise floor substantially.
I didn't need a latch feature for my purposes, so I omitted U5. My
5V-to-3.3V interface is simply the junction of a 10K resistor to ground
and a 3.3K resistor to each of the following LPT port pins:
- LPT pin 9 to RESET (DDS pin 71 controlled by printer port bit 7)
- LPT pin 8 to IOUD (DDS pin 20 controlled by printer port bit 6, R9
omitted)
- LPT pin 3 to WRB/SC (DDS pin 21 controlled by printer port bit 2)
- LPT pin 2 to A0/SDI (DDS pin 19 controlled by printer port bit 1)
The output low-pass filters are omitted. Instead, a connection is made
from DDS pin 49 (I output at R4) through a 0.1 uF capacitor to the
primary of a Mini-Circuits T1-6T transformer. The other end of the
primary is grounded. The secondary of this transformer feeds a Toko
America SK107M3N-AO-20 ceramic filter (Digi-Key part # TK2307-ND, 10.7
MHz center frequency, 180 kHz bandwidth with Zmatch=330 ohms), which in
turn drives the secondary of another T1-6T transformer to get back down
to 50 ohms.
The level at the output of the second T1-6T transformer is about -18
dBm. It is amplified by a Mini-Circuits MAV-11 MMIC
(http://www.minicircuits.com/cgi-bin/amplifier?model=MAV-11&pix=bbb123.gif&bv=4)
with 0.1 uF coupling capacitors on either side, biased by 12 volts
through a 120-ohm, 1-watt resistor with a 0.1 uF decoupling capacitor at
the power-supply feed point. The level after the MAV-11 is
approximately -8 dBm. The coupling capacitor at the MAV-11's output
feeds a Mini-Circuits PLP-10.7 low-pass filter
(http://www.minicircuits.com/dg02-162.pdf), whose purpose is to get rid
of higher-order harmonics and DDS images that the ceramic filter won't
attenuate very well.
The output of the PLP-10.7 filter is terminated with a 51-ohm resistor
to ground. A 0.1 uF coupling capacitor feeds pin 2 of a Linear
Technologies LT1016 high-speed comparator
(http://www.linear-tech.com/pdf/1016fc.pdf). This is an 8-pin DIP that
serves to convert the filtered DDS signal to 5V CMOS-compatible levels.
Driving the phase detector chip with a rail-to-rail square wave is good
for 2-3 dB of in-band phase noise improvement, at least with the LMX2326
chip. (I actually don't know if this is still true of the ADF4112, as I
didn't try it without the comparator. It seems like a safe bet,
though. It might be worth using the AD9854's built-in 3.3V comparator
instead if board space is at a premium.)
Pin 2 of the LT1016, the noninverting signal input, is biased halfway to
the +5V rail with two 1K resistors in series between power and ground.
Another 1K resistor is placed between pins 2 and 3 to raise the
inverting input to the same DC level. Pin 3 has a 0.1 uF bypass to
ground to keep it from trying to follow the AC component of the input
signal. Pins 4, 5 and 6 are grounded, with +5V Vcc at pin 1.
The comparator output at pin 8 (~Q) goes directly to pin 8 (REFin) of an
Analog Devices ADF4112 phase-frequency detector chip. The ADF4112 is a
16-pin TSSOP package, available by direct order in small quantities from
www.analog.com. The connections to this chip are basically as shown in
the data sheet at
http://products.analog.com/products/info.asp?product=ADF4112:
- Pin 1 has a 4.7K resistor to ground
- Pin 2 is the charge pump output to the OP27 op-amp, below
- Pins 3, 4, and 9 are grounded
- Pin 5 is bypassed to ground with 100 pF
- Pin 6 is the input from the VCO, below
- Pin 7 is the analog supply (+5)
- Pin 8 is the reference input from the LT1016 as noted above
- Pins 10 and 15 are tied to the digital +5 supply
- Pin 11 is connected directly to the LPT port pin 3 (not through the
10K/3.3K divider since this is a 5V chip)
- Pin 12 is connected directly to the LPT port pin 2
- Pin 13 is connected to LPT port pin 7
- Pin 14 is connected to LPT port pin 15
- Pin 16 is the charge-pump supply (+5)
(To use the more commonly-available National LMX2326 PLLatinum chip,
leave out the resistor at pin 1. This requires changes to the control
software and loop filter, but I believe the performance will ultimately
be the same.)
Between the ADF4112 charge-pump output at pin 2 and the VCO is an OP27
low-noise opamp
(http://focus.ti.com/docs/prod/folders/print/op27.html). This is an
8-pin DIP available from numerous vendors at www.findchips.com (although
DigiKey seems to be out of stock at the moment).
The OP27 serves to interface the 5V phase-detector chip to the VCO,
whose tuning line needs about 18V to tune to 2 GHz. The OP27 is powered
(at pin 7) by a +20V power source, decoupled with a 47 uF capacitor and
1 mH RF choke. Like everything else in the circuit, the OP27 needs
clean power -- its own common-mode supply rejection is not enough.
The OP27's non-inverting input is tied midway between +5 and ground with
two 10K resistors. There is a 0.1 uF bypass capacitor at their
junction.
The first and second poles of the loop filter in my circuit consist of
two 1-uF polyester capacitors in parallel (at least 35 volt rating
needed here, and the caps should be nonpolarized -- no aluminum
electrolytics) in series with a parallel combination of a 0.22 uF
tantalum or metal-film cap (no ceramics!) and 82-ohm resistor. This
filter goes between pin 2 (inverting input) and pin 6 (output) of the
OP27.
The loop filter also has a third pole intended to clean up as much of
the op-amp's own noise as possible. It consists of a 100 ohm resistor
between pin 6 of the OP27 and the VCO's tuning line. A 0.1 uF tantalum
(no ceramics) and a 100 pF silver-mica are paralleled between the VCO
tuning line and ground, as close to the VCO as possible.
Some say that metal-film resistors are 'quieter' than carbon-film types,
but I never saw any difference in my tests. It might be true for larger
values. Carbon-composition resistors are supposedly among the noisiest
of all, so try to steer clear of them in the loop filter.
I would suggest leaving plenty of room and ample connection-pad area for
the loop filter components, since people like to tweak these. Some
builders may want to use smaller capacitors for faster locking, for
instance. Same with the VCO... the ADF4112 is usable with any VCO
between 100 MHz and 3 GHz, so it would be nice to make it easy for
people to adapt the board for different VCO modules.
The VCO is a Mini-Circuits ROS-2150VW (data and pinout at
http://www.minicircuits.com/cgi-bin/vco?model=ROS-2150VW&pix=ck605.gif&bv=4).
It runs on +5 volts, and its RF output is connected to one leg of a
Y-network of three 22 ohm resistors. One of the other 22-ohm "legs"
drives a 51-ohm resistor whose opposite end is grounded. The junction
of this 22-ohm and 51ohm resistor is coupled through a 0.001 uF
capacitor to pin 6 of the ADF4112. Obviously these lines need to either
be very short (millimeters!), or they need to be designed as 50-ohm
transmission lines, because they carry the 1-2 GHz signal from the VCO.
The final 22-ohm resistor in the splitter network feeds the input pin of
a Mini-Circuits ERA-5 MMIC
(http://www.minicircuits.com/cgi-bin/amplifier?model=ERA-5&pix=vv105.gif&bv=4)
through a 0.001 uF coupling capacitor. The ERA-5 is biased with +12V
through a 100-ohm 1-watt resistor and a Mini-Circuits ADCH-80A broadband
RF choke (http://www.minicircuits.com/dg02-210.pdf). The RF choke
should be mounted directly adjacent to the ERA-5, with the resistor
between it and +12V.
The synthesizer output is coupled from the junction of the ADCH-80A and
ERA-5 output pin via a 0.001 uF capacitor to an SMA jack. The output
level is nominally +11 dBm, varying +/- 3dB between 1000 and 2000 MHz.
That's all there is to it, really, except for the +5V power
distribution. I used a 7805 regulator (again, bolted to the chassis to
serve as a heat sink) off the +12V bus, which itself came from a 7812.
The 7812 also feeds the two 3.3-volt LT1086 regulators for the DDS
subsystem.
The output of a 78xx regulator is very rich in broadband noise, so it
has to be filtered heavily before being used in a PLL. I used a 1 mH RF
choke at the 7805 output, feeding a 47 uF bypass capacitor (tantalum or
aluminum electrolytic). There are five more 1 mH RF chokes connected to
this node, each with its own 0.1 uF ceramic / 2.2 uF tantalum bypasses
to the ground plane. Three of these RF chokes feed the ADF4112's
digital, analog, and phase-detector power-supply pins; the fourth
supplies the LT1016 comparator at pin 1; and the fifth supplies the VCO.
Make sure the 1 mH chokes above are rated for at least 100 mA of
current. Total current drain on the +5V line is about 60 mA. The DDS
subsystem will require about 400 mA at a clock rate of 100 MHz, when
configured with my software (Q DAC, comparator, and sinc filter turned
off).
At first, I tried running the "master" 7812 from the same +20V bus that
feeds the OP27, but it just generated too much heat. So I added a
second feedthrough cap to my chassis, and ran +15V to the 7812 and +20
to the OP27 (+24 is fine too, but +18 may not be enough to tune the VCO
to 2 GHz reliably). The chassis still runs warm (probably ~40-50C), but
not burning hot like it did with a single +20V supply.
-----------end snip------------
>
> What kind of vco are you using? You didn't mention this so far.
See above. Usually, good engineering practice in a PLL with this kind
of coverage calls for two or more high-quality VCOs for reduced tuning
sensitivity and (consequently) lower phase noise outside the loop
bandwidth. That's what the R7000 receiver does, which is how they're
able to pull ahead of me in the wideband phase-noise plot with up to 7
dB better PN at the all-important 12.5-kHz channel-spacing offset. But
that would complicate the design substantially, and for my application,
it just isn't worth the hassle for the difference between -105 and -98
dBc noise levels.
If you need better noise performance, you would want to start by
upgrading the $30 Mini-Circuits VCO, either by splitting the coverage
range across multiple VCOs or by using a quieter, more expensive part
(like a surplus YIG oscillator). The VCO is definitely the weakest link
in my design.
After that, a narrower DDS filter (say a +/- 15 kHz-wide crystal filter)
would bring a further improvement in both SFDR and broadband noise.
Finally, it might be worth looking for a quieter op-amp (or a
discrete-transistor charge pump amplifier as suggested by Dean Banerjee
at NSC, something the Icom people used to good effect with a JFET
current source). Watch out for opamps that seem quiet in the nV/root-Hz
department but have a high input current spec that will load the phase
detector, though.
John Miles
>
> John
> I should be able to have a schematic done by the end of the week. BTW do you
> want shielding between different sections of the board? I note that you have
> it in your prototype
>
The reason for the vertical shield and 4 feedthrough caps in my chassis
was to keep any digital hash on the parallel-port lines as far away from
the PLL-VCO path as possible. I probably went overboard with that... at
any rate, RF decoupling of the digital control lines can be left off the
board and up to the individual builder.
Why don't you just surround the DDS chip and its associated filters with
a "firewall" of adjacent pads that are connected with vias to the ground
plane? That way, if it turns out we need to physically wall off the
digital components from the rest of the PLL, it'll be easy. Otherwise,
no harm done.
Rex Allers
Very interesting design with current nify chips.
So on the ADF4112, you dead-bugged the TSSOP package for your
prototype? (I assume that means glue the chip with legs up and
solder wires to it.) No wonder you don't want to do that again. Just
curious what gage wire you were soldering to the chip. I would
think even 30 ga would be big to solder to a TSSOP package.
One small question, below, on your description of the circuit.
Thanks for sharing,
Rex, KK6MK
On Sun, 27 Jan 2002 03:06:15 GMT, John Miles
<jmi...@pop.removethistomailme.net> wrote:
>The level at the output of the second T1-6T transformer is about -18
>dBm. It is amplified by a Mini-Circuits MAV-11 MMIC
>with 0.1 uF coupling capacitors on either side, biased by 12 volts
>through a 120-ohm, 1-watt resistor with a 0.1 uF decoupling capacitor at
^^^^^^^^^^^^^^^
>the power-supply feed point.
Was the 1-watt a typo? Seems excessive for a MMIC, but with 12 V
feed maybe you need at least 1/2 watt.
Mike Monett
> Mike Monett wrote:
> >
> > Don't blame you at all. How about a simple square block just showing
> > the inputs and outputs?
>
> Well, here's the circuit description that I sent to Richard (with a few
> corrections I've already passed on to him) and additional notes in
> parentheses. This is the basis for the schematic and board layout he's
> working on.
[...snip good description]
> If you need better noise performance, you would want to start by
> upgrading the $30 Mini-Circuits VCO, either by splitting the coverage
> range across multiple VCOs or by using a quieter, more expensive part
> (like a surplus YIG oscillator). The VCO is definitely the weakest link
> in my design.
>
> After that, a narrower DDS filter (say a +/- 15 kHz-wide crystal filter)
> would bring a further improvement in both SFDR and broadband noise.
>
> Finally, it might be worth looking for a quieter op-amp (or a
> discrete-transistor charge pump amplifier as suggested by Dean Banerjee
> at NSC, something the Icom people used to good effect with a JFET
> current source). Watch out for opamps that seem quiet in the nV/root-Hz
> department but have a high input current spec that will load the phase
> detector, though.
>
> -- jm
>
> ------------------------------------------------------
> http://www.qsl.net/ke5fx
> Note: My E-mail address has been altered to avoid spam
> ------------------------------------------------------
Hi Jim,
Thanks for the excellent info. You have a thoroughly professional
design, and I am anxiously waiting for the schematics and more info.
In the meantime, I collected some information that may be of interest
if you haven't come across it already. Here's a copy-paste from my
notes:
On reducing regulator noise, Wenzel has some comments on "Finesse
Voltage Regulator Noise" at
http://www.wenzel.com/documents/finesse.html
Fred Walls uses a Darlington configuration in series with VCC with
bypassing on the base in "Guidelines for Designing BJT Amplifiers
with Low 1/f AM and PM Noise"
http://www.boulder.nist.gov/timefreq/general/pdf/1139.pdf
There's some interesting articles on reducing synthesizer noise
listed in "NIST Time and Frequency Publications"
http://www.boulder.nist.gov/cgi-bin/showpubs.pl
Many of the articles are dated but still of interest.
Ulrich Rohde shows a neat trick for reducing oscillator flicker
noise in Fig. 15 of "Oscillator Basics and Low-Noise Techniques for
Microwave Oscillators and VCOs"
http://www.synergymwave.com/publications/PDF/Oscillators.pdf
He claims a 15 dB reduction in close-in noise using the tecnique in
"Analyze VCOs And Fractional-N Synthesizers", which used to be at
http://www.mwrf.com/2000/aug1500/057-078.html
but that url is no longer valid. Also, the idea is probably patented
by now, but individuals can try it for experiments.
Adding DC stabilization would mean removing the can of the
Minicircuits vco, but it might be worth it!
Regards,
Mike Monett
mrmo...@yahoo.com
Ian White, G3SEK
>Richard Hosking wrote:
>>
>> John
>> I should be able to have a schematic done by the end of the week. BTW do you
>> want shielding between different sections of the board? I note that you have
>> it in your prototype
>>
>
>The reason for the vertical shield and 4 feedthrough caps in my chassis
>was to keep any digital hash on the parallel-port lines as far away from
>the PLL-VCO path as possible. I probably went overboard with that... at
>any rate, RF decoupling of the digital control lines can be left off the
>board and up to the individual builder.
>
>Why don't you just surround the DDS chip and its associated filters with
>a "firewall" of adjacent pads that are connected with vias to the ground
>plane? That way, if it turns out we need to physically wall off the
>digital components from the rest of the PLL, it'll be easy. Otherwise,
>no harm done.
>
additional shielding and decoupling at the design stage. We never
actually know whether all of those extras are going to be needed, but as
JM says, they do no harm. But they do increase the chances that the
circuit will work well, first time.
In amateur radio, I value my time a lot more than the cost of the extra
small components. My first priority is always to get the project
successfully completed, because the "wanna do" list is always growing!
I was going to say that "Obviously this isn't a cost-effective way of
designing commercial products", where component and assembly costs can
add up over long production runs - but as I write, I'm realising that
isn't necessarily true. In the control boards that I sell for amateur
power amplifiers, I've designed in lots of protection against external
RF fields. Many customers will not need all of that protection... but
there have been no callbacks about RFI problems, so maybe over-design
was a good commercial decision too.
--
73 from Ian G3SEK Editor, 'The VHF/UHF DX Book'
'In Practice' columnist for RadCom (RSGB)
http://www.ifwtech.com/g3sek
Kijoma
and for 100MHz clock the 9850/1?
or is this using the quadrature outputs?
--
Bill Lewis
Engineering Director
Kijoma Solutions Ltd
RF - Analogue - Digital - Software
Electronic Product Design & Consultancy
Email : Bill.Lewis_@_kijoma.com (removes the _'s)
"John Miles" <jmi...@pop.removethistomailme.net> wrote in message
news:3C536F...@pop.removethistomailme.net...
John Miles
>
> Why use the ad9854 agn?, would the 9852 do the job?
The 9852 would be fine, too. The 9854 is just what I had in the junk
box. It is pin-compatible with the 9852, so either chip would be OK to
use. I don't know if the pricing is any different.
>
> and for 100MHz clock the 9850/1?
Have a look at the narrowband SFDR plots on their respective data
sheets. Remember that the "grass" within a few kHz of the carrier will
be amplified by as much as 40-50 dB (20*log(total N)) by the PLL. The
9852/9854 have 12-bit DACs with 17-bit internal phase accumulators, so
they're theoretically 6 dB cleaner than the cheaper 10-bit parts... but
from the spectral plots in the data sheets, the differences in overall
noise/spur content look even more dramatic. PLLs like clean references!
As usual, for most applications the extra noise may not be a big deal,
but I'd rather spend a few more bucks and be satisfied that I've used
the best part for the job. I guess that's why I don't do this for a
living. :-)
John Miles
Now that is a neat hack! It's a shame they don't build 3-terminal
regulators with that technique built onto the die, where it (seemingly)
would belong.
John Miles
>
> John,
>
> Very interesting design with current nify chips.
>
> So on the ADF4112, you dead-bugged the TSSOP package for your
> prototype? (I assume that means glue the chip with legs up and
> solder wires to it.)
Exactly. You can barely see the 4112 just above the leftmost of the
two bright yellow polyester caps. The chip is held down by its three
grounded pins, no glue necessary.
> No wonder you don't want to do that again. Just
> curious what gage wire you were soldering to the chip. I would
> think even 30 ga would be big to solder to a TSSOP package.
I used 30-gauge Kynar wire-wrap wire.
The trick seems to be to bend alternating pins on the chip in opposite
directions to give yourself some room. You get to do this once, maybe
twice, before the pin suffers too much fatigue and goes all floppy on
you, so it pays to start by bending the ground pins down towards the
board. :)
Tin both the chip lead and the wire, and then -- remembering to clean
the soldering iron tip before every connection -- lay the wire end atop
the chip pin and heat it with the iron until you think the solder
coatings might have melted together. You can verify the connection to
some extent by wiggling the wire at the point where it lies atop the pin
with a very fine pair of tweezers. After that, you don't want to move
the wire around any more than necessary.
You want to keep plenty of fine-grade solder wick on hand, of course.
> Was the 1-watt a typo? Seems excessive for a MMIC, but with 12 V
> feed maybe you need at least 1/2 watt.
The MAV-11 draws about 60 mA at 5.5 volts. (12-5.5)/.06 is 110 ohms,
rounded up to 120. .06*.06*120 is a little less than 1/2 watt, rounded
up to 1 watt for safety. Actually the prototype uses a 330-ohm and
180-ohm parallel combo, the former being visible just to the right of
the two dark yellow T1-6T transformers below the DDS chip.
The other power-hungry MMIC is the ERA-5 that follows the VCO.
Interestingly, now that you made me go back and check :), it looks like
Mini-Circuits has derated the ERA-5's current spec since I printed my
copy of their data sheet a few years ago. They are now calling for 65
mA at 4.9 volts typical, while my old data sheet says 80 mA at 5.0
volts. So my 100-ohm bias resistor on the ERA-5 is not as conservative
as I thought.
It may be a good idea to use the same 120-ohm 1W resistor on the ERA-5
as on the MAV-11, although I'm not about to dig back into my own unit
and change it. The ERA-5's maximum rating is high enough (120 mA on
both data sheets) that I'm not too worried about the difference between
65 and 80 mA.
Mike Monett
[... snip my stuff]
> > On reducing regulator noise, Wenzel has some comments on "Finesse
> > Voltage Regulator Noise" at
> >
> > http://www.wenzel.com/documents/finesse.html
> >
>
> Now that is a neat hack! It's a shame they don't build 3-terminal
> regulators with that technique built onto the die, where it (seemingly)
> would belong.
>
> -- jm
>
> ------------------------------------------------------
> http://www.qsl.net/ke5fx
> Note: My E-mail address has been altered to avoid spam
> ------------------------------------------------------
Wenzel comes up with some great stuff! But few people are interested
in low-noise supplies.
Here are some updates on low-noise regulators that I didn't include
since I could not verify the urls.
I once saw an article that showed the output impedance of the 78XX
regulator has a small inductive component. I can't find the article,
but I seem to remember than a 10uF tantalum on the output caused a
resonance. This increased the output noise significantly between 1
KHz and 100KHz.
The solution was to use higher or lower values of capacitance to
avoid resonance. I'm still looking for the app note.
The 7805 is spec'd at 40uV of noise between 10Hz and 100KHz, where
the venerable 723 produces 2.5uV between 100Hz and 10KHz with a 5uF
bypass at the CREF pin.
A Synergy Microwave article uses a 723 driving a PNP pass transistor
to reduce the output noise. The article has been upgraded to Acrobat
4, which I cannot read using Win 3.11. Hopefully, the regulator is
still shown in Fig. 5. It looks quite nice, since it drives a 22uF
output cap from the collector of the pass transistor.
http://www.synergymwave.com/products/synthesizers/synthesizerpdf/SynthesizerTutorial.pdf
Here's another low-noise regulator that drops the noise to 3nV/Hz at
1KHz:
http://archives.e-insite.net/archives/ednmag/reg/1997/010297/01di_03.htm
Also, Bob Perrin points out the LTZlOOO voltage reference has a
phenomenal temperature stability of 0.05 ppm/C. It has an on-chip
heater resistor and temperature sensor (base-emitter junction). It
might be worth looking into for a stable reference for critical
applications.
Regards,
Mike Monett
Jim Pennell
with the power spec'd and the physical package the part uses.
We switched to the GAL-5 which has equivalent performance, but a much
better construction for getting the heat out of the device.
Mini-Circuits recommends the GAL for any new designs, and you may want to
alter the design for this part. It's physically different, but in terms of
cost and performance, it was pretty much a drop in replacement with better
reliability.
Actually, I think the GAL was a fraction cheaper cost...
Jim Pennell
John Miles
>
> Wenzel comes up with some great stuff! But few people are interested
> in low-noise supplies.
>
> Here are some updates on low-noise regulators that I didn't include
> since I could not verify the urls.
I'll add those links to my collection (Win 3.11?! Wow, that's stoicism
for ya!) I would like to find a quieter regulator solution for this
type of circuit at some point. Seemingly the RF chokes are taking care
of any power-supply noise problems in the present design, as I don't see
an improvement when running the +5V line from a separate, known-quiet
supply, or when temporarily bridging a 1000 uF cap across it.
John Miles
Good to know, Jim, thanks! I'll have a look at the new part. The ERA-5
certainly does run hot when you bias it to 80 mA. Hopefully we're OK
using a larger bias resistor.
For some reason, when I type GAL-5 into the minicircuits.com search
page, I get a popup Javascript box that says "Please try GALI-5."
GALI-5 brings up the specs on the part you're talking about (I assume),
but it's not listed in their catalog pages.
Pretty typical, just as I restock my parts bin with 20 ERA-5s...!
Mike Monett
Yes, Win 3.11. No worries about viruses or trojans, since they won't
run. In fact, the virus checking programs won't run either, so I save
a lot of time not having to keep up with the latest versions :)
Windows loads in less than 4 seconds on a K6-450 MHz, so I get back
online faster after it crashes. And I don't have to reformat my hard
disk and reinstall it every three months :)
BTW, the LTZ1OOO voltage reference is vast overkill for a
synthesizer, since the loop has to lock regardless of temperature
drift in the varicaps. The spec took a while to find, since ENGINEER
Bob misspelled it.The data sheet is at
http://www.linear.com/prod/datasheet.html?datasheet=141
Sounds like regulator noise is not a problem in your current design,
but wait till you get your hands on a cheap surplus YIG!
Regards,
Mike Monett
mrmo...@yahoo.com
Win Hill
>
> I once saw an article that showed the output impedance of the 78XX
> regulator has a small inductive component. I can't find the article,
> but I seem to remember than a 10uF tantalum on the output caused a
> resonance. This increased the output noise significantly between
>
> The solution was to use higher or lower values of capacitance to
> avoid resonance. I'm still looking for the app note.
>
> The 7805 is spec'd at 40uV of noise between 10Hz and 100KHz, where
> the venerable 723 produces 2.5uV between 100Hz and 10KHz with a 5uF
> bypass at the CREF pin.
All regulators appear to have inductive output impedances, just as
do all opamps in closed loops. This is because the regulator's
moderately-high intrinsic open-loop output impedance is reduced to
a respectably-low impedance by the regulator's negative feedback.
But this negative feedback necessarily decreases with increasing
frequency, so the output impedance rises with increasing frequency,
which is the characteristic of an inductor.
The NSC 7805 data sheet shows this effect in a graph on page 8,
where Zo is 8 milliohms up to 1kHz, and starts rising 6dB/octave
with an apparent inductance of L = 0.023 / 2pi 10kHz = 0.37uH.
This would resonate with a 10uF output capacitor at 83kHz, but
at 83kHz 0.37uH has a resonanct impedance of only 0.19 ohms, and
a 10uF aluminum capacitor is likely to have a higher esr than 0.2
ohms, so there's really no Q in this "resonance." A 1000uF low-esr
electrolytic like a 10V Panasonic FC type (0.065 ohms) resonates at
9kHz with Q = 2pi 8.3kHz 0.37uH / 0.065 = 0.3, illustrating how hard
it is to show any real resonance effect in most regulators. In this
way the "high" esr of the output electrolytic plays an important role
in closed-loop stability.
___
Thanks, /.-.\
((( ))
- Win \\\//
\\\
Winfield Hill //\\\
Rowland Institute for Science /// \\\
Cambridge, MA \/ \/
John Larkin
Win,
The negative regulators - 79xx, LM337 - will oscillate if
insufficiently bypassed. I've bypassed them with just a few hundred nF
of ceramics, and that didn't work... nice sawtooth oscillators.
John
Spehro Pefhany
> The negative regulators - 79xx, LM337 - will oscillate if
> insufficiently bypassed. I've bypassed them with just a few hundred nF
> of ceramics, and that didn't work... nice sawtooth oscillators.
Clearly marked in the data sheets too. ;-) It's probably up there with
assuming the pinout is the same as the 78xx far as common mistakes go.
Why is it that the neg regulators (and LDO regulators, in general) need
output bypassing to be stable, while 78xx are stable with no bypassing on
the output?
Best regards,
--
Spehro Pefhany --"it's the network..." "The Journey is the reward"
sp...@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
Winfield Hill
>
> John Larkin <jjlarkin@highlandsnip_thistechnology.com> wrote:
>
>> The negative regulators - 79xx, LM337 - will oscillate if
>> insufficiently bypassed. I've bypassed them with just a few hundred
>> nF of ceramics, and that didn't work... nice sawtooth oscillators.
>
> Clearly marked in the data sheets too. ;-) It's probably up there with
> assuming the pinout is the same as the 78xx far as common mistakes go.
>
> Why is it that the neg regulators (and LDO regulators, in general) need
> output bypassing to be stable, while 78xx are stable with no bypassing
> on the output?
That's easy to understand. Ordinary regulators have the equivalent
of emitter-follower or source follower outputs, with a stage gain
of near unity more or less independent of load. There's only a
moderate phase lag associated with the output capacitor.
In sharp contrast, LDO and negative regulator output stages are like
common-emitter amplifiers, with the output capacitance acting as the
load. This means the stage gain is rather high (especially high for
low load conditions) and falls with frequency, due to the output load
capacitor's falling reactance. Furthermore there's a large phase lag
associated with the output capacitor, in fact the feedback circuit can
be thought of as type of brute-force compensated amplifier. So we see
the output capacitor is a critical element in the loop's compensation,
which is not the case for ordinary 78xx type regulators.
Thanks,
- Win
Winfield Hill
Rowland Institute for Science
100 Edwin Land Blvd
Cambridge, MA 02142
Spehro Pefhany
> That's easy to understand. Ordinary regulators have the equivalent
> of emitter-follower or source follower outputs, with a stage gain
> of near unity more or less independent of load. There's only a
> moderate phase lag associated with the output capacitor.
> In sharp contrast, LDO and negative regulator output stages are like
> common-emitter amplifiers, with the output capacitance acting as the
> load. This means the stage gain is rather high (especially high for
> low load conditions) and falls with frequency, due to the output load
> capacitor's falling reactance. Furthermore there's a large phase lag
> associated with the output capacitor, in fact the feedback circuit can
> be thought of as type of brute-force compensated amplifier. So we see
> the output capacitor is a critical element in the loop's compensation,
> which is not the case for ordinary 78xx type regulators.
Thanks, that makes perfect sense. I note that the LM2940 is much noisier
than the 78M05, 150uV typical (Co = 22uF) vs. 40uV typical (Co = 0.1uF).
Mike Monett
[...snip my stuff]
Hi Win,
Thanks for your explanation. It is not clear from reading the data
sheet that the output impedance is inductive, or why ESR plays such
an important role.
NatSem has a new app note that might be of interest. It explains the
Bode plot of conventional and LDO regulators, and discusses ESR in
some detail. It's at
http://www.national.com/an/AN/AN-1148.pdf
Your explanation is good, and may explain why the rms noise
increases when tantalums are used at the output.
The article I am searching for actually measured the noise using
different types of capacitors.
I suspect it was EDN, and got over 400 hits. Going through them
one-by-one is taking a long time :)
Regards,
Mike Monett
Paul M. Jaeger
There was a note published in Electronic Design long ago, which
now appears as Appendix C in Bob Pease "Troubleshooting Analog
Circuits": Understanding and Reducing Noise Voltage on 3-Terminal
Regulators" by Errol H. Dietz. Has a plot of noise spectra with an
assortment of different bypass caps on an LM317.
PJ
Mike Monett
> Hi Mike,
>
> There was a note published in Electronic Design long ago, which
> now appears as Appendix C in Bob Pease "Troubleshooting Analog
> Circuits": Understanding and Reducing Noise Voltage on 3-Terminal
> Regulators" by Errol H. Dietz. Has a plot of noise spectra with an
> assortment of different bypass caps on an LM317.
>
> PJ
Thanks Paul, that's the one. It was a long time ago and doesn't seem
to appear in the web archives for Electronic Design or Bob Pease.
I've been trying to keep my paper library to a minimum, but I guess
there's some books you just can't do without :)
Regards,
Mike Monett
mrmo...@yahoo.com
Clifton T. Sharp Jr.
> Yes, Win 3.11. No worries about viruses or trojans, since they won't
> run. In fact, the virus checking programs won't run either, so I save
> a lot of time not having to keep up with the latest versions :)
>
> Windows loads in less than 4 seconds on a K6-450 MHz, so I get back
> online faster after it crashes. And I don't have to reformat my hard
> disk and reinstall it every three months :)
I steadfastly refused to go past 3.11 myself; I refused Win9x entirely.
Eventually my nephew shamed me into converting to linux, where I've been
happy ever since.
Epilogue: then the wife comes home needing Win98 for her real-estate
applications. *sigh*
--
Remember, "close" counts in horse-shoes, hand-grenades and nuclear warfare,
but in spamming, it's considered unnecessary precision. -- Alun Jones
Win Hill
>
> Ulrich Rohde shows a neat trick for reducing oscillator flicker
> noise in Fig. 15 of "Oscillator Basics and Low-Noise Techniques for
> Microwave Oscillators and VCOs"
>
> http://www.synergymwave.com/publications/PDF/Oscillators.pdf
>
> "Analyze VCOs And Fractional-N Synthesizers", which used to be at
>
> http://www.mwrf.com/2000/aug1500/057-078.html
>
> but that url is no longer valid.
Strange, Microwaves & RF has every issue from Aug 1999 available
online, except the Aug 2000 issue. It must be a conspiracy! :-)
Mike Monett
Win,
Your sense of humor is priceless!
FWIW, Matjaz Vidmar describes a technique he published in 1985 that
sounds very similar to Rohde's feedback scheme:
"The phase noise can be reduced by a carefully designed bias
regulator, to stabilise the current through the bipolar
transistor, so that the impedances and phase shifts do not
change."
http://www.vhfcomm.co.uk/s53mvvco.htm
If my guess is true, Rohde's patent may be invalid due to prior art.
Regards,
Mike Monett
mrmo...@yahoo.com
John Miles
>
> I steadfastly refused to go past 3.11 myself; I refused Win9x entirely.
> Eventually my nephew shamed me into converting to linux, where I've been
> happy ever since.
>
> Epilogue: then the wife comes home needing Win98 for her real-estate
> applications. *sigh*
>
The ironic thing is that even the beta releases of Win95 were so much
better than Win 3.1x it's not even funny. Most professional DOS/Windows
developers (like myself) installed the spring '95 beta release of
Chicago and never looked back. You and Mike, on the other hand, appear
to have barricaded yourself in a roomful of snakes just to avoid dealing
with the roomful of worms next door. :)
It's perfectly reasonable to go with Linux over Win9x if that's your
thing, but using Windows 3.1 in 2002 just to be contrary is, to say the
least, self-defeating.
Bill Kirkland
For cleaning up the DDS he ran the DDS output at 10.7 MHz and ran it through
readily available crystal filters, (Digi-Key has them).
For the Oscillator he showed that it was better to get rid of the
traditional
gate to ground diode. This improves phase noise performance.
His low noise oscillator for 74 - 105 MHz uses a 2 tap inductor.
The 1st tap goes to the fet gate, the 2nd tap went to the fet source, the
bottom of the inductor went to ground.
He also paralleled multiple vari-cap diodes together to reduce the
noise from these diodes, the idea being if noise is positive going on
one diode, another diode could be negative going and the two help to
cancel each other.
QST May, June 1994, Key Components of Modern Receiver Design
I've built his Low Noise Oscillator/PLL for 74 - 105 MHz. My main
work is programmming a micro-controller to control it.
Check out the Elecraft designs as well.
Bill Kirkland
VE3JHU
PCS ELECTRONICS
he is a genius.
--
Best regards,
Marko - PCS Electronics
--------------------------------------------------------
Turn your PC into a FM radio station!
http://www.pcs-electronics.com
tel +386 31 318 236
"Mike Monett" <mrmo...@yahoo.com> wrote in message
news:7e4a2a11.02013...@posting.google.com...
PCS ELECTRONICS
> He also paralleled multiple vari-cap diodes together to reduce the
> noise from these diodes, the idea being if noise is positive going on
> one diode, another diode could be negative going and the two help to
> cancel each other.
Since you've build the circuit, have you observed this to be actually true?
It doesn't sound right.
John Miles
>
> > He also paralleled multiple vari-cap diodes together to reduce the
> > noise from these diodes, the idea being if noise is positive going on
> > one diode, another diode could be negative going and the two help to
> > cancel each other.
>
> Since you've build the circuit, have you observed this to be actually true?
> It doesn't sound right.
>
It's true about multiple diodes reducing noise, but I don't think Bill's
explanation is correct. The idea is to use parallel combinations of
low-capacitance diodes to reduce their equivalent resistance. That
improves the tank-circuit Q, and anything that improves the Q will
automatically improve noise performance.
The part about "negative and positive biases cancelling each other" is
the reason why you put each individual pair of varactor diodes
back-to-back. Since they can't both be forward-biased at once, they
can't clip the RF voltage across the tank circuit, an effect Rohde
previously showed to be bad for noise performance.
PCS ELECTRONICS
This thread was/is a good read, I plan to work on DDS in the
future myself.
--
Best regards,
Marko - PCS Electronics
--------------------------------------------------------
Turn your PC into a FM radio station!
http://www.pcs-electronics.com
tel +386 31 318 236
"John Miles" <jmi...@pop.removethistomailme.net> wrote in message
news:3C5AE2...@pop.removethistomailme.net...
Bill Kirkland
Bill Kirkland
We can improve the noise performance of a VCO by using multiple tuning
diodes in the antiparallel arrangement of Fig 15. The improvement arises
from two causes. First, the individual parallel diodes each have a smaller
capacitance value than a single diode would need. This helps because
small-cpapacitance diodes have less noise (lower equivalent noise resistances)
than larger-capacitance diodes, due to the fabrication technology. Second,
because the noise voltages from the individual dioes are uncorrelated, they do
not directly sum together. Thus the effective noise is less than that of a single
diode. While this scheme increases the cost of the circuit, it can reduce the
diode noise contribution by as much as 15 or 20 dB compared to using a single
diode.
(sorry, I can't include Fig 15. but it shows 2 sets of 6 pairs of BB809 diodes)
Regarding Q, from the same paper.
When we extend our design to become a VCO, by adding a tuning diode, we must also
consider the phase noise introduced by that diode. Contrary to what you may have
read elsewhere, this noise is not due solely to Q reduciton from the added diode.
The diode itself introduces noise that modulates the VCO frequency.
The easiest way to analyze this noise is to treat the diode's noise contributions
as that of an equivalent resistance R. This resistor can then be considered to be
generating the thermal noise voltage that any resistance exhibits:
Vn = sqrt (4 KToR deltaf)
Rhode not me.
The equivalent resistance is solely to model the noise not the loading effect
on Q. (Not to say that the diode doesn't alter Q, just that the purpose of the
equivalent resistance is to model the noise.)
Bill Kirkland
VE3JHU.
Bill Kirkland
October 1994.
From a later paper
A High-Performance Hybrid Frequency Synthesizer, QST March 1995
A key factor in the synthesizer's relative simplicity is that it uses a single,
wide range LO VCO rather than several switched VCOs. Achieving low phase noise
with this arrangement requires taht the loop's tuning diodes, and therefore the
associated loop-filter op amp, operate at a considerably higher voltage than
the system's 5 and 10-V buses.
He uses +28 Vcc and generates a small negative voltage for Vee off of the PLL
chip for the OP AMP power rails
Bill Kirkland
VE3JHU
PCS ELECTRONICS
some day. Appreciated.
How is the PCB for the DDS coming along? Perhaps I could
help there.
--
Best regards,
Marko - PCS Electronics
--------------------------------------------------------
Turn your PC into a FM radio station!
http://www.pcs-electronics.com
tel +386 31 318 236
"Bill Kirkland" <kirk...@sympatico.ca> wrote in message
news:3C5B79F5...@sympatico.ca...
Win Hill
>
> Clifton T. Sharp Jr. wrote:
>>
>> I steadfastly refused to go past 3.11 myself; I refused Win9x entirely.
>> Eventually my nephew shamed me into converting to linux, where I've been
>> happy ever since.
>>
>> Epilogue: then the wife comes home needing Win98 for her real-estate
>> applications. *sigh*
>
> The ironic thing is that even the beta releases of Win95 were so much
> better than Win 3.1x it's not even funny. Most professional DOS/Windows
> developers (like myself) installed the spring '95 beta release of
> Chicago and never looked back. You and Mike, on the other hand, appear
> to have barricaded yourself in a roomful of snakes just to avoid dealing
> with the roomful of worms next door. :)
>
> It's perfectly reasonable to go with Linux over Win9x if that's your
> thing, but using Windows 3.1 in 2002 just to be contrary is, to say
> the least, self-defeating.
Mike, you could at least graduate to Windows-for-Workgroups,
that was the final improved Windows 3 version! Actually, my
suggestion is to get serious and jump straight to Windows 2000
with a set of new computer hardware. $650 will get you a new
box with an everything-on-the-board mobo with a say 1.5GHz AMD
Athlon and 512M of DDR memory: one screaming Spice machine.
Add $150 for a hard drive plus $150 more in tax to Microsoft...
OK, maybe Linux doesn't sound so bad, keep that last $150 and
save some more money by just getting 256M of DDR ram.
- Win
Bill Kirkland
As for the PCB I built it a year or so ago. My problem is that I have too many
things on the go. Moving from an apartment to house caused quite an
interruption.
The tricky part I found is writing the micro-controller code. Coming up with
32-bit numbers to program the DDS with and cover the tuning range from 70
to 100 is slowing me down. If the micro does all the calculations it involves
doing divisions. As I am writing in assembler this gets to be "fun".
I actually got the code working but then I moved. I have to get back to it and
interface a shaft encoder. Here I am thinking of using a mouse. I took one
apart
and it looks like a crude shaft encoder. For tuning purposes we don't need
great angular resolution, just lots of increments over 360 deg.
Anyone taken a PS-2 mouse apart and understand the interface to the PC?
I still have to work on the rest of the radio as well :).
Bill
VE3JHU
Mike Monett
Thanks, Win.
Actually, the main reason for staying with Win 3.x is I have my own
file management system that runs in DOS. It keeps a list of the files
in each directory along with a comment that I can edit to include key
words that describe the contents. The comment is attached to the file
and stays with it when I copy or move the file to different
directories.
Another program collects all the directory lists and makes a single
index. Unlike most indexing programs that run overnight, this takes a
little over one minute.
Using the index, I can search the entire contents of my 8 gig hard
disk in less than two seconds, and find all the files that meet the
search criteria.
With a single keypress, I can go to the directory that contains the
file, and the cursor is automatically placed on the target file.
Then comes the magic. I have five or six keys assigned to do different
things depending on the file extension. I can edit the file, view it
in various DOS graphics viewers, edit images using Windows programs,
view PDF files using Acrobat that runs under Windows, view HTML files
using Opera, Netscape, or MSIE under Windows, etc.
This technique reverses the normal opertation of GUI programs where
you first pick the program you wish to use, then try to find the file.
It may be in any of thousands of directories on the disk, and may be
among tens of thousands of files. I cringe when I watch someone try to
find a file in Windows or Linux. The waste of time is horrible.
The key is to be able to load Windows or DOS programs as needed. A DOS
program can call W95/98 programs, but it is painful. It is very easy
with Win 3.x
I actually have three Windows installations. I use WFWG on drive C,
and two separate Windows 3.11 installations on drives F and G.
The one on drive F is strictly for internet use, since Opera,
Netscape, and MSIE regularly crash, and sometimes crosslink all the
files on drive F. I have a backup computer that duplicates all the
files so restoring is easy (but slow).
WFWG on drive C is for fast loading of a few Windows programs like
Opera and Acrobat from my DOS file manager. The one on drive G is the
largest and slowest installation, and is used for general Windows
programs such as Paint Shop Pro, Microcap V, PSPICE, etc.
I believe the approach of finding the file first, then loading the
desired program is from 10 to 100 times faster than GUI programs.
I would be happy to share the code if anyone is interested. It runs in
Borland Pascal and compiles in TP6, TP7, or BP7. Some of the
directories are hard-coded in various places, but I could put them all
in an INI file. It would take a while, but if anyone is serious about
trying it, I would be happy to do it.
You have to be currently running Win 3.x, and be able to program in
Pascal. I could not possibly satisfy all the requests for program
changes for those who could not do it themself.
My next problem is to figure out how to do the same thing in Linux:)
Regards,
Mike Monett
mrmo...@yahoo.com
PCS ELECTRONICS
are
final revision, everything is working. Except the code ;-> since I switched
to AVR for the first time it takes me ages to write a simple subroutine.
And I keep moving it further along into the future :-) Oh, well, perhaps
this
weekend.
As for encoders, I've seen a design by Matjaz Vidmar, he used a small motor
from cassete player. I can supply a circuit for it, basically it gives two
outputs,
up and down. Pretty simple to implement and interface :-)
--
Best regards,
Marko - PCS Electronics
--------------------------------------------------------
Turn your PC into a FM radio station!
http://www.pcs-electronics.com
tel +386 31 318 236
"Bill Kirkland" <kirk...@sympatico.ca> wrote in message
news:3C5C1EA8...@sympatico.ca...
Richard Hosking
This thread seems to have generated a bit of interest since I have been at
the beach
There is no reason why the 9852 could not be used as we are only using one
output
I have done some schematics which I have sent
I can post these as GIF (5 files) if people want
Some comments from the group
Why not use the 9854/2 comparator instead of another chip?
Could the Minicircuits LPF could be replaced with discrete components? This
would be somewhat cheaper and about as simple board wise
I note the comments on the ERA-5 and current sinks to cancel regulator
noise. This citcuit should be used on the supply to the loop integrator
Richard
"John Miles" <jmi...@pop.removethistomailme.net> wrote in message
news:3C5466...@pop.removethistomailme.net...
> Kijoma wrote:
> >
> > Why use the ad9854 agn?, would the 9852 do the job?
> ------------------------------------------------------
John Miles
>
> Regarding Q, from the same paper.
>
> When we extend our design to become a VCO, by adding a tuning diode, we must also
> consider the phase noise introduced by that diode. Contrary to what you may have
> read elsewhere, this noise is not due solely to Q reduciton from the added diode.
> The diode itself introduces noise that modulates the VCO frequency.
> The easiest way to analyze this noise is to treat the diode's noise contributions
> as that of an equivalent resistance R. This resistor can then be considered to be
> generating the thermal noise voltage that any resistance exhibits:
> Vn = sqrt (4 KToR deltaf)
>
> Rhode not me.
Cool, I stand corrected! I would have thought it was just a matter of
improving the Q (which definitely is another benefit of the
multiple-diode-set approach).
John Miles
>
> From a later paper
> A High-Performance Hybrid Frequency Synthesizer, QST March 1995
>
> A key factor in the synthesizer's relative simplicity is that it uses a single,
> wide range LO VCO rather than several switched VCOs. Achieving low phase noise
> with this arrangement requires taht the loop's tuning diodes, and therefore the
> associated loop-filter op amp, operate at a considerably higher voltage than
> the system's 5 and 10-V buses.
That's interesting. I've noticed on my own prototype that the
out-of-band noise performance at 2 GHz is almost as good as it is at 1
GHz, and was wondering why.
I've got the QEX CDs but not the QST ones (yet)... if the .PDF file for
that March 1995 hybrid-synth article were to magically appear in my
inbox, it would be most appreciated. (Or on the fax machine at
425-893-9111). :) I'd like to see what his approach was, having just
'discovered' the Digi-Key crystal filters myself.
Jim Pennell
----- Original Message -----
"Richard Hosking" <zapri...@iinet.net.au(remove the zap)
WROTE:
>> SNIP <<
> I note the comments on the ERA-5 and current sinks
> to cancel regulator noise. This circuit should be
> used on the supply to the loop integrator
I would use the low noise power supply trick on both the loop filter
components and a second one on the VCO itself. It's been my experience that
any wide tuning range VCO is surprisingly sensitive to it's DC feeds and
usually any sort of LC filter is not good enough.
You can use the same ultra low noise source for the loop filter and the
VCO, it's just my habit to separate them so the current pulses of the charge
pump can't sneak into the VCO.
One of the ones I dealt with had 14MHz/Volt sensitivity on the Vcc
line... And of course, there were a hundred microvolts or so of 60 cycle
getting through the normal regulator circuits.
Screwed up the output something fierce....
Jim Pennell
Mike Monett
> John
>
> This thread seems to have generated a bit of interest since I have been at
> the beach
> There is no reason why the 9852 could not be used as we are only using one
> output
> I have done some schematics which I have sent
> I can post these as GIF (5 files) if people want
> Richard
Yes, please post - we have been waiting to see them!
Regards,
Mike Monett
mrmo...@yahoo.com
John Miles
We're still going back and forth on a couple of tweaks, so it might be a
few days before the schematics are fit for public consumption. I just
swapped out the 180 kHz ceramic filter for a 25 kHz crystal filter,
which thinned out the spur population dramatically (see two large
zipfiles at the bottom of http://www.qsl.net/ke5fx/synth.html), and
we'll probably go back and add one or two of Wenzel's power-supply
cleanup tricks to the VCO and loop-filter supply lines. We were also
debating whether to use the AD9852/4's built-in comparator versus the
separate LT1016, which works better with low-level input signals but
needs a separate package.
The preliminary schematics are very well-done, though -- Richard is
doing a great job on them.
Mike Monett
> Mike Monett wrote:
> > Yes, please post - we have been waiting to see them!
> We're still going back and forth on a couple of tweaks, so it might be a
> few days before the schematics are fit for public consumption. I just
> swapped out the 180 kHz ceramic filter for a 25 kHz crystal filter,
> which thinned out the spur population dramatically (see two large
> zipfiles at the bottom of http://www.qsl.net/ke5fx/synth.html), and
> we'll probably go back and add one or two of Wenzel's power-supply
> cleanup tricks to the VCO and loop-filter supply lines. We were also
> debating whether to use the AD9852/4's built-in comparator versus the
> separate LT1016, which works better with low-level input signals but
> needs a separate package.
>
> The preliminary schematics are very well-done, though -- Richard is
> doing a great job on them.
>
> -- jm
>
> ------------------------------------------------------
> http://www.qsl.net/ke5fx
> Note: My E-mail address has been altered to avoid spam
> ------------------------------------------------------
Looks like you are really making progress!
I am still unclear on the overall architecture. You mentioned using a
mixer in a previous post, but I don't have a picture of the overall
block diagram in my mind to see how the loop works and what role the
DDS plays.
The 25KHz filter means the DDS is restricted to a narrow tuning range,
presumably around 10.7MHz. My problem is trying to figure out how the
loop acquires when you do a large frequency step. If the DDS is driven
from the 1 to 2GHz vco through a divide-by-n, the output of the DDS
will fall outside the filter bandpass and you will lose the signal
into the pll. But this does not seem to be the configuration you
described.
I'm sure the schematics will explain the mystery, so I'll be patient
while you dig for those last few dB:)
Best Regards,
Mike Monett
mrmo...@yahoo.com
John Miles
>
> I am still unclear on the overall architecture. You mentioned using a
> mixer in a previous post, but I don't have a picture of the overall
> block diagram in my mind to see how the loop works and what role the
> DDS plays.
The DDS is the loop reference. The worst-case DDS tuning range required
to bridge the gap between N (programmable PLL division factor) steps is
simply DDS_freq / Nmin.
Currently I'm running the ADF4112 with Nmin=654 (the reference divider R
stays at 7), so the required DDS tuning range is about 16 kHz end to
end. Once I bump the DDS down a couple kHz to account for the crystal
filter's behavior in my circuit, transformers, it fits into the response
curve pretty well (http://www.qsl.net/ke5fx/synth/DDSRANGE.GIF).
>
> The 25KHz filter means the DDS is restricted to a narrow tuning range,
> presumably around 10.7MHz. My problem is trying to figure out how the
> loop acquires when you do a large frequency step. If the DDS is driven
> from the 1 to 2GHz vco through a divide-by-n, the output of the DDS
> will fall outside the filter bandpass and you will lose the signal
> into the pll. But this does not seem to be the configuration you
> described.
Nope, the DDS is driven by a fixed clock -- it's used as a real DDS, not
a fractional-N divider. Its output never leaves the range in blue in
the plot above. Inside the PLL loop, there's nothing except the VCO, PD
chip with its programmable N divider, and the OP27-based loop filter
that's required to interface the two. Pretty simple stuff.
Mike Monett
[...]
> Currently I'm running the ADF4112 with Nmin=654 (the reference divider R
> stays at 7), so the required DDS tuning range is about 16 kHz end to
> end. Once I bump the DDS down a couple kHz to account for the crystal
> filter's behavior in my circuit, transformers, it fits into the response
> curve pretty well (http://www.qsl.net/ke5fx/synth/DDSRANGE.GIF).
[...]
> Nope, the DDS is driven by a fixed clock -- it's used as a real DDS, not
> a fractional-N divider. Its output never leaves the range in blue in
> the plot above. Inside the PLL loop, there's nothing except the VCO, PD
> chip with its programmable N divider, and the OP27-based loop filter
> that's required to interface the two. Pretty simple stuff.
>
> -- jm
Hi John,
Thanks for your reply. I finally downloaded the datasheet on the
ADF4112, and everything is clear now.
For those who haven't bought the QEX CD yet, the article "Designing
Low-Phase-Noise Oscillators," by Ulrich L. Rohde, QEX, October 1994
is at
http://www2.arrl.org/ard/files/rohde94.pdf
Figure 15 shows massively-parallel varactors used in a tapped
Hartley FET vco.
I found Ulrich L. Rohde is Chairman of Synergy Microwave Corp.,
Paterson, NJ 07504. Some of his articles are available at
http://www.synergymwave.com/publications/Index.htm
Here is a brief description of some interesting points in the
articles:
--------------------------------------------------------------------
"Synthesizers design for microwave applications"
http://www.synergymwave.com/publications/PDF/Synthesizers.pdf
Figure 28 shows a custom-built phase detector with a noise floor of
better than -168dBc/Hz. However, the schematic has errors. The 'D'
input for FD3 has no connection to the output of any gate or flop.
As the caption for figure 36 shows, the crossover point between the
multiplied phase noise and the 4GHz oscillator determines the best
loop bandwidth.
--------------------------------------------------------------------
"Oscillator basics and low-noise techniques for microwave
oscillators and VCO's."
http://www.synergymwave.com/publications/PDF/Oscillators.pdf
"Figure 15. Modified Colpitts oscillator with a dc-stabilizing
circuit that monitors the emitter current of the oscillator
transistor. Since the stabilizing transistor is dc-coupled, it can
be used as a feedback circuit to reduce the phase noise from dc to
about 1 MHz off the carrier. This approach is independent of the
operating frequency and the device itself, and therefore can be
used for FETs as well as bipolar transistors. It solves the fT
nonlinearities pointed out in Figure 7."
--------------------------------------------------------------------
"Recent advances in linear VCO calculations, VCO design and spurious
analyses of Fractional-N synthesizers."
http://www.synergymwave.com/publications/PDF/LinearVco0600.pdf
Figure 7 shows the predicted phase noise of an 880MHz vco with
tuning sensitivity ranging from 10Hz to 100MHz/V.
Rohde states:
"It must be noted that above a certain sensitivity, in this case
10MHz/V, the phase noise is determined only by the circuit's
tuning diodes and is no longer a function of the resonator and
diode Q."
This is extremely significant in the case of octave-bandwidth vco's!
So one path to a low noise floor might be a very low noise vco
operating between 250 and 500 MHz, and a wideband low-N pll to cover
1 to 2 GHz. Just for fun, here is a collection of vfo oscillators:
http://www.pan-tex.net/usr/r/receivers/svfo.htm
Figure 13 shows two methods of dc-stabilization to reduce flicker
noise. Figure 14 shows the improvement, about 15dB.
Rohde covers two of the three pins in a transistor in his bias
stabilization patent. I wonder which pin Matjaz Vidmar used in his
article at
http://www.vhfcomm.co.uk/s53mvvco.htm
Whichever one it is, I like his approach better :)
--------------------------------------------------------------------
"Nonlinear Effects In Oscillators and Synthesizers"
http://www.synergymwave.com/publications/PDF/ims2001.pdf
Repeat of bias stabilization circuits.
Figure 23. 100 MHz VCXO for ultra low phase noise applications. The
HSMS2800 hot carrier diode provides noise reduction. Figure 24 shows
the improvement.
More on spur reduction techniques.
--------------------------------------------------------------------
Best Regards,
Mike Monett
John Miles
>
> John Miles <jmi...@pop.removethistomailme.net> wrote in message news:<3C5DED...@pop.removethistomailme.net>...
> > Mike Monett wrote:
>
> > > Yes, please post - we have been waiting to see them!
>
FYI to all: the current schematics are now posted at
http://www.qsl.net/ke5fx/synth.html, along with my latest parallel-port
control software and (Win32) source.
These diagrams will be used to spin a prototype PC board that should be
ready for testing in a few weeks. More to come!
Mike Monett
> FYI to all: the current schematics are now posted at
> http://www.qsl.net/ke5fx/synth.html, along with my latest parallel-port
> control software and (Win32) source.
>
> These diagrams will be used to spin a prototype PC board that should be
> ready for testing in a few weeks. More to come!
>
> -- jm
Thanks Jim! The schematics look great.
I have a question.
Your phase noise appears much better than the Icom in the first two
plots, but it appears worse in the third plot. Here are the numbers:
Plot 1
Icom IC-R7000 first LO synthesizer: -60 dBc/Hz at 500 Hz
KE5FX hybrid synthesizer: -82 dBc/Hz at 500 Hz
Plot 2
Icom IC-R7000 first LO synthesizer: -78 dBc/Hz at 2 kHz
KE5FX hybrid synthesizer: -82 dBc/Hz at 2 kHz
Plot3
Icom IC-R7000 first LO synthesizer: -105 dBc/Hz at 10 kHz
KE5FX hybrid synthesizer: -98 dBc/Hz at 10 kHz
What happened in the third plot?
J M Noeding
>"Paul M. Jaeger" <n7...@ieee.org> wrote in message news:<3F9FF53841E8375C.0D215169...@lp.airnews.net>...
>> Hi Mike,
>>
>> There was a note published in Electronic Design long ago, which
>> now appears as Appendix C in Bob Pease "Troubleshooting Analog
>> Circuits": Understanding and Reducing Noise Voltage on 3-Terminal
>> Regulators" by Errol H. Dietz. Has a plot of noise spectra with an
>> assortment of different bypass caps on an LM317.
>>
>> PJ
>
>Thanks Paul, that's the one. It was a long time ago and doesn't seem
>to appear in the web archives for Electronic Design or Bob Pease.
>
>I've been trying to keep my paper library to a minimum, but I guess
>there's some books you just can't do without :)
>
>Regards,
>
>Mike Monett
>mrmo...@yahoo.com
got a tip on how to reduce noise from regulators like 78L05 to
oscillator, you just add a saturated transistor with large reservoir
capacitor at base - in series with the voltage from regulator. Voltage
drop of 0.1-0.2V will improve noise sidebands a lot
Jan-Martin
LA8AK
--
remove ,xnd to reply
Mike Monett
Hi John,
I posted a query on the phase noise plots that hasn't appeared in
Google yet but never mind.
I figured it out. The resolution bandwidth is 30Hz in the first two
plots, and 1KHz in the third. This explains why the ICOM is worse in
the first two plots.
In the third plot, both curves overlap until you reach the skirt in
your synthesizer, then the ICOM drops faster. That's ok, it's beyond
the audio range, so yours should give better performance.
Good work!
John Miles
>
> I have a question.
>
> Your phase noise appears much better than the Icom in the first two
> plots, but it appears worse in the third plot. Here are the numbers:
>
> Plot 1
> Icom IC-R7000 first LO synthesizer: -60 dBc/Hz at 500 Hz
> KE5FX hybrid synthesizer: -82 dBc/Hz at 500 Hz
>
> Plot 2
> Icom IC-R7000 first LO synthesizer: -78 dBc/Hz at 2 kHz
> KE5FX hybrid synthesizer: -82 dBc/Hz at 2 kHz
>
> Plot3
> Icom IC-R7000 first LO synthesizer: -105 dBc/Hz at 10 kHz
> KE5FX hybrid synthesizer: -98 dBc/Hz at 10 kHz
>
> What happened in the third plot?
The R7000 uses dual VCOs, each covering significantly less range (260
MHz per VCO instead of 1 GHz per VCO in my design). In general, lower
VCO tuning sensitivity means less noise outside the loop bandwidth.
The other point worth noting is that the R7000 uses a significantly
lower loop bandwidth than I do. They actually have a 4.7 uF capacitor
across the VCOs' varactors, driven by a JFET charge pump through a 1K
(IIRC) resistor. You can see their reference spurs at 5 kHz if you look
closely at the 10 kHz/div and 2 kHz/div plots. Overall, their PLL
circuit doesn't appear to be as clean as mine, so I'm quieter inside my
loop bandwidth (about 1500 Hz calculated) than they are inside theirs
(less than 100 Hz?), at least as far as my analyzer can resolve.
Because their (relatively) narrowband, discrete-component-based VCOs are
quieter than the plug-and-play Mini-Circuits parts I use, they perform
better at offsets that are significantly outside both our respective
loop bandwidths. At about 3 kHz, they start to pull ahead of me, and at
10 kHz and beyond, you are really seeing nothing but VCO noise in both
cases.
Using a better-quality (and more expensive, and physically-larger, and
harder-to-find) VCO would enable me to beat the R7000 across the board.
The current level of performance is good enough for most applications,
though.
John Miles
>
> John Miles <jmi...@pop.removethistomailme.net> wrote in message news:<3C735F...@pop.removethistomailme.net>...
>
> Hi John,
>
> I posted a query on the phase noise plots that hasn't appeared in
> Google yet but never mind.
>
> I figured it out. The resolution bandwidth is 30Hz in the first two
> plots, and 1KHz in the third. This explains why the ICOM is worse in
> the first two plots.
>
Well, the RBW is the same for the pink (Icom) and blue (mine) plots in
each case. The 10 kHz plot had to be made with a wider RBW, or it would
still not be finished. :)
In all cases, composite AM/PM (mostly PM) noise is determined by
subtracting 10*log(RBW) from the plotted values. The real figures on a
spectrum analyzer are typically a dB or two worse due to the analyzer's
filter characteristics, but most users don't sweat that level of detail.
> In the third plot, both curves overlap until you reach the skirt in
> your synthesizer, then the ICOM drops faster. That's ok, it's beyond
> the audio range, so yours should give better performance.
Actually, close-in phase noise is less important for most communications
applications than the far-out noise. The former can make your BER a
little worse for digital signal recovery, but the latter can degrade
adjacent-channel rejection in all narrowband modes.
I'd gladly give up some close-in noise performance in exchange for
better performance at 10-15 kHz offsets, but (as my other reply notes)
that's really not possible with a cheap, off-the-shelf octave-range
VCO. I'm very glad to stand up to the Icom's 10-kHz performance as well
as I do, considering how elaborate their synthesizer is by comparison.
Eamon Skelton
> FYI to all: the current schematics are now posted at
> http://www.qsl.net/ke5fx/synth.html, along with my latest parallel-port
> control software and (Win32) source.
Very nice! Thank you. One minor gripe, the link to the Digi-key filter
is broken.
73, Ed. EI9GQ.
--
Remove 'X' to reply.
http://homepage.eircom.net/~ei9gq
Linux 2.4.17
John Miles
>
> Very nice! Thank you. One minor gripe, the link to the Digi-key filter
> is broken.
>
It's the ECS 10.7-15B (DigiKey part # X704-ND from
http://info.digikey.com/T021/V2/461.pdf).
Their search links use URL-embedded tokens that expire rapidly. I don't
guess a whole lot of brainpower went into that policy... gee, since we
make money by selling stuff, let's make it harder to refer people to
specific products on our site!
Mike Monett
[...]
> Actually, close-in phase noise is less important for most communications
> applications than the far-out noise. The former can make your BER a
> little worse for digital signal recovery, but the latter can degrade
> adjacent-channel rejection in all narrowband modes.
>
> I'd gladly give up some close-in noise performance in exchange for
> better performance at 10-15 kHz offsets, but (as my other reply notes)
> that's really not possible with a cheap, off-the-shelf octave-range
> VCO. I'm very glad to stand up to the Icom's 10-kHz performance as well
> as I do, considering how elaborate their synthesizer is by comparison.
>
> -- jm
I agree. I'm amazed at the level of performance you have achieved.
I notice the vco is not hermetically sealed. Have you given any
thought to bias stabilization to reduce the close-in noise? It should
be reasonably easy to pop the top and look inside.
Thank you for posting the schematics and the results. I'm sure this
gives a lot of encouragement to others, now that you have shown what
can be done with a handful of parts.
Bravo!
John Miles
>
> I notice the vco is not hermetically sealed. Have you given any
> thought to bias stabilization to reduce the close-in noise? It should
> be reasonably easy to pop the top and look inside.
>
> Thank you for posting the schematics and the results. I'm sure this
> gives a lot of encouragement to others, now that you have shown what
> can be done with a handful of parts.
>
No prob! Once the boards are ready, it'll be trivial for anyone to
build a digitally-tunable octave-band source for any range of
frequencies between 100 MHz and 3 GHz. That'll definitely open up some
interesting RF projects to people who previously lacked the inclination
toward the detail work. Hobbyists can stop goofing around with those
CATV tuner hacks and build themselves a REAL spectrum analyzer, for
instance. :)
The next obstacle to making modular wide-range receiver construction
possible is a sharp, easily-reproducible 1st-IF filter design.
Tinkering with VCOs is somewhat farther down my list; I can't imagine
that the Mini-Circuits OEMs haven't already picked all the low-hanging
fruit.
Richard Hosking
A query on the software and the setup of the PLL
I presume if the BW of the filter on the DDS is 15 KHz ie about 0.15% of
10.7 MHz then the PLL steps will be approximately 0.15% of the VCO minimum,
ie about 1.78 MHz to give continuous coverage over the range 1-2 GHz. I
presume the PLL reference will be divided by about 6 and the phase detector
will work at 1.78 MHz with the main divider of the PLL working between 560
and 1120 (or thereabouts, depending on the exact reference frequency) for
1-2 GHz - is this correct? (I have not looked at your C code!)
There will be a bit of number crunching for the controller to do, especially
for rapid steps.
For a given frequency step (say 1 Hz) the DDS will have differing delta
values over the range of the PLL
Is there an algorithm that could be applied to an embedded controller where
the brute force approach (as in a PC) might be difficult?
Richard
"John Miles" <jmi...@pop.removethistomailme.net> wrote in message
news:3C735F...@pop.removethistomailme.net...
John Miles
>
> Their search links use URL-embedded tokens that expire rapidly. I don't
> guess a whole lot of brainpower went into that policy... gee, since we
> make money by selling stuff, let's make it harder to refer people to
> specific products on our site!
>
Turns out they do have a way to create persistent links at the cost of
search speed. Using their 'Send this link via E-Mail' link towards the
bottom of the page, you can generate a non-expiring link, in this case
http://www.digikey.com/scripts/us/dksus.dll?PName?Name=X704-ND.
Apologies to Digi-Key for calling the intelligence behind their search
engine into question. :)
Eamon Skelton
> It's the ECS 10.7-15B (DigiKey part # X704-ND from
> http://info.digikey.com/T021/V2/461.pdf).
>
> Their search links use URL-embedded tokens that expire rapidly. I don't
> guess a whole lot of brainpower went into that policy... gee, since we
> make money by selling stuff, let's make it harder to refer people to
> specific products on our site!
I agree, some of these web-sites are too clever for their own good.
Many thanks to you and Richard for publishing this nice
project.
John Miles
>
> John
> A query on the software and the setup of the PLL
> I presume if the BW of the filter on the DDS is 15 KHz ie about 0.15% of
> 10.7 MHz then the PLL steps will be approximately 0.15% of the VCO minimum,
> ie about 1.78 MHz to give continuous coverage over the range 1-2 GHz. I
> presume the PLL reference will be divided by about 6 and the phase detector
> will work at 1.78 MHz with the main divider of the PLL working between 560
> and 1120 (or thereabouts, depending on the exact reference frequency) for
> 1-2 GHz - is this correct? (I have not looked at your C code!)
> There will be a bit of number crunching for the controller to do, especially
> for rapid steps.
> For a given frequency step (say 1 Hz) the DDS will have differing delta
> values over the range of the PLL
> Is there an algorithm that could be applied to an embedded controller where
> the brute force approach (as in a PC) might be difficult?
>
Well, my parallel-port code allows a lot more flexibility than necessary
in choosing R and P modulus values. In practice these two constants
will be fixed, eliminating a lot of the math that the PC code is doing.
With the LMX2326 (unlike the ADF4112), P is fixed at 32, so the minimum
supported N modulus is 992 (=P^2-P for any dual-modulus prescaler). In
general you want to minimize N for less reference-noise multiplication,
although at higher comparison frequencies the phase detector chip's own
noise starts to dominate.
At the time I was experimenting with the LMX2326, I was using an 11.5
MHz crystal filter on the reference, so the R value choice that
minimized N was 12 (Fc=958 kHz, N=1043 at 1 GHz). This is the R value
that yielded all of my best plots. By the same reasoning, the R value
for the 10.7 MHz filter we're using will be 11.
If you treat R as a constant, then the target comparison frequency can
be precalculated as a constant as well. Almost all of the math in my
SYNTH_calc_DDS_frequency() function can be calculated offline with
knowledge of DDS_CENTER_FREQ (=10.7 MHz), R (=11), and FOUT_MIN (=1
GHz):
center_comparison_freq = DDS_CENTER_FREQ / R =972727
min_N = FOUT_MIN / center_comparison_freq =1028
DDS_bw = center_comparison_freq / min_N * R =10408
DDS_min_freq = DDS_CENTER_FREQ - (DDS_bw / 2) =10694796
Fcomp = DDS_min_freq / R =972254
The first three expressions determine the required DDS tuning range in
hertz. This range needs to remain safely above the comparator's
detection threshold as it passes through the crystal filter.
DDS_min_freq is simply the lower end of the DDS tuning range, based on
the DDS bandwidth previously calculated.
Fcomp is the comparison frequency that, for any output frequency that's
an exact multiple of N, corresponds to the lower end of the DDS tuning
range.
At runtime, Fcomp is the only result we need. This is the "target" PLL
comparison frequency that will be used to determine both N (for the PLL)
and DDS_freq (for the DDS):
N = output_freq / Fcomp
DDS_freq = output_freq * R / N
That's it... those two are only two equations that the microcontroller
needs to solve when changing frequencies. output_freq must be a 32-bit
unsigned integer for 1 Hz resolution from DC to 4 GHz, and DDS_freq can
be a 24.8 fixed-point value that will fit in 32 bits with a larger
(32.8) temporary store for the (output_freq * R) / N calculation. Any
microcontroller should be able to do this with no trouble at all.
The N calculation above is assumed to round by truncation, C-style. We
must round N down to the next-lower integer because Fcomp was calculated
based on the lower end of the DDS tuning range. If your math routines
round differently, you'll have to walk back through the equations to
make sure the DDS tuning range is still centered in the crystal filter's
passband.
Mike Monett
> got a tip on how to reduce noise from regulators like 78L05 to
> oscillator, you just add a saturated transistor with large reservoir
> capacitor at base - in series with the voltage from regulator. Voltage
> drop of 0.1-0.2V will improve noise sidebands a lot
>
> Jan-Martin
> LA8AK
Thanks for the idea, Jan-Martin. Do you have an explanation why it
works, and any figures on the improvement in noise?
Regards,
Mike Monett
J M Noeding
amother friend (LA7MI) mentioned that it wasn't a new idea, it is
mentioned in VCO catalogue from Mini-Circuits
Any impedance will improve, but it is some different opinions whether
it is wise to let the transistor saturate, the gain will also be lower
and effective capcity lower.
Such capacity multiplication is also used in Drake R-4C receiver +12V
power supply, but consumed lot of power since it was current fed from
+125V
Paul Keinanen
This is a really old circuit. I has been used in power supplies long
before the zener diode became a common component. A series pass
transistor with a low resistance resistor from collector to base would
drive the transistor into saturation, however, adding a big capacitor
from base to ground will create a RC network followed by an emitter
follower.
Or looking at it differently, during the peaks of the rectified
100/120Hz ripple, some of the current is required to charge the
capacitor, thus preventing the transistor from going into saturation.
During the low parts of the ripple, the capacitor will supply most of
the base current to the transistor, possibly driving it into
saturation.
I think this circuit was called a capacitance multiplier, since the
ripple rejection was similar to a big capacitor with a capacitance
equivalent to the real capacitor multiplied by the current gain of the
transistor. Thus with a real 220 uF capacitor, you could get a 22000
uF virtual capacitor if the transistor beta was 100.
Unfortunately some misunderstood this circuit and thought that they
could get away with the big storage capacitor and only use this
virtual capacitor :-). However, when the collector voltage drops below
the capacitor voltage on the base during the bottom of the ripple
cycle, the transistor no longer conducts and the charge within the
small capacitor is quickly discharged though the base-emitter diode
and the load and the voltage drops very quickly.
This kind of circuit disappeared very quickly when the zener diode
become popular.
The idea of using this circuit as a low noise oscillator power supply
postregulator is very interesting since a small, low inductance, low
ESR capacitor could be used, thus, you could have a nearly ideal
100-300 uF virtual capacitor.
However, what is the point of driving the transistor into saturation ?
This will reduce the current gain and thus reduce the size of the
virtual capacitor. Keeping the transistor in the linear region by
limiting the base current below saturation will require a larger Vce
voltage drop. If the load current varies, limiting the base current
below saturation will also affect the voltage regulation, but this can
be partly compensated with a resistor from base to ground as was done
in some early designs.
Paul OH3LWR
Win Hill
>
> mrmo...@yahoo.com (Mike Monett) wrote:
>
>> la8a...@online.no (J M Noeding) wrote
>>
The circuit you describe has a drop of Vbe + R*Ib, which may be closer
to 1.0V than to 0.1 or 0.2V as Jan-Martin describes. Jan-Martin must
be thinking of a pnp transistor with its emitter as the input, hence
the saturated operation. Offhand, I don't see how such a scheme could
reduce ripple. The active filter you describe Paul on the other hand
works very well. Of course the transistor base-voltage point must be
low enough not to get C-E saturation from the ripple valleys at maximum
load, but this is easily done by adding a resistor to ground. For high-
voltage supplies I like to use a MOSFET and thereby get an instant 3 to
4V drop, usually solving the problem, while allowing much higher R and
even a smaller C.
Another very useful enhancement is to divide the input resistor in two
and filter that node with a capacitor to the quieted follower output.
This creates a 2-pole filter which further reduces the output ripple,
especially the sharply-rising charging edge which is highly attenuated
by the -12dB/octave rolloff.
As for this circuit disappearing quickly when the zener diode became
popular, hah! the zener has been with us for far longer than the BJT
power transistor, it was the power IC regulator which supplanted this
circuit. However I still use it for the common case where I want all
the output voltage that's practically available from the supply storage
capacitors, and simply want to eliminate any ripple noise.
The main thing it lacks is current-limiting, but I solve this by adding
a series collector (drain) resistor sized to drop 0.5 to 1V under normal
load. This resistor saturates the transistor upon a load fault, so that
no heat sink is required on the pass transistor. Of course this resistor
itself must have a serious power rating (or one may be happy to let it to
go up in smoke, protecting the pass transistor!).
o--+---------/\/\/------------,
| |
'--\/\/\--+-------||-------|-----,
| | |
| D |
'--\/\/\--+--- G |
| S ----+----o
|
===
|
gnd
A further enhancement is to add an output current-sense resistor plus a
small current-limiting transistor, plus two more resistors to create a
foldback current limit, solving the smoking-resistor problem. At this
point a heat sink will no doubt be required for the transistor. A gate
protection zener may be a good idea for the MOSFET. It's at this point
that one looks at all the parts drawn on the sheet of paper and begins
to reconsider a simple IC regulator, with built-in thermal limiting.
:-)
___
Thanks, /.-.\
((( ))
- Win \\\//
\\\
Winfield Hill //\\\
Rowland Institute for Science /// \\\
Cambridge, MA \/ \/
Mike Monett
> It's at this point
> that one looks at all the parts drawn on the sheet of paper and begins
> to reconsider a simple IC regulator, with built-in thermal limiting.
>
> :-)
> ___
> Thanks, /.-.\
> ((( ))
> - Win \\\//
> \\\
> Winfield Hill //\\\
> Rowland Institute for Science /// \\\
> Cambridge, MA \/ \/
Thanks for the excellent post, as usual. Now that we're back to a
conventional ic regulator, how do you reduce the output noise:)
Best Regards,
Mike Monett
John Miles
>
> Thanks for the excellent post, as usual. Now that we're back to a
> conventional ic regulator, how do you reduce the output noise:)
And, more to the point, why doesn't anyone sell a low-noise 3-terminal
regulator? The old-school LM723 is not a very elegant solution
considering the number of pins and amount of support circuitry that chip
requires.... yet it still seems to be the only game in town for
low-noise regulation.
Win Hill
>
> Mike Monett wrote:
>>
>> Thanks for the excellent post, as usual. Now that we're back to a
>> conventional ic regulator, how do you reduce the output noise:)
>
> And, more to the point, why doesn't anyone sell a low-noise
> 3-terminal regulator? The old-school LM723 is not a very elegant
> solution considering the number of pins and amount of support
> circuitry that chip requires.... yet it still seems to be the
> only game in town for low-noise regulation.
One solution is to use a precision voltage reference IC as the
regulator. For example, an LT1021 in the DCN8-10 version costs
only $3.17 (singles), yet has 1% initial accuracy and less than
4uV p-p of 0.1 to 10Hz noise, and 2.2uV rms in a 10Hz to 10kHz
bandwidth. It also specs 105dB of ripple rejection, so 0.5V of
input ripple should create under 2.5uV at the output.
>12.8V 8.2
---+-----------/\/\-------,
| 220 |
+---/\/\---, |e
| RED LED | |/ pnp
'---|>|----+-+-------|
__|__ |\
| | | 10.0V
LT1021 | |------+----+------o 100mA max
DCN8-10 |_____| |+
| === 4.7uF low esr cap
| | solid tant, etc.
gnd gnd
The LED lights up as the circuit current limits. In one variant,
a darlington PNP power transistor with a green LED and 0.25 ohms
of emitter current-limiting resistance would allow up to 2A out.
Linear Technology points out that to achieve a low 1/f noise level
it's necessary to place a plastic-foam insulator around the LT1021
and lead wiring to prevent air-current turbulence with associated
thermoelectric voltage changes. They suggest up to 10X more noise
without an air shield, and show a graph with 30uV p-p excursions in
a few minutes - were they doing some hand waving? :-)
The noise compares to 86uV for an LM723 in its usual configuration.
However the venerable 723 with an RC filter after the zener stage is
claimed by NSC to achieve 2.5uV rms of noise (100Hz to 10kHz), which
the LT1021 only slightly betters, although without the help of an RC
filter! The LT1021 has less 1/f noise and must do better overall;
it's one of the best-rated parts in AoE's table 6.7, page 336.
Hmm, I wonder, do typical 723 chips ever exhibit popcorn noise?
Mike Monett
> And, more to the point, why doesn't anyone sell a low-noise 3-terminal
> regulator? The old-school LM723 is not a very elegant solution
> considering the number of pins and amount of support circuitry that chip
> requires.... yet it still seems to be the only game in town for
> low-noise regulation.
>
> -- jm
Hi John,
I just Googled and got 61,000 hits on low noise regulators. I checked
the majors - Motorola, NatSem, Philips, etc.
It seems they are all on the bandwagon for low noise LDO regulators.
Typical specs are 30uV to 40uV up to 100KHz, and 150mA to 250Ma load
current. All the ones I checked use a PNP to drive the output, which
is what you'd expect for a LDO. Motorola and Philips don't need an
output cap.
The biggest problem is they are all low voltage - 1.5V to 5.0V, and
there is no access to the divider to change the output. So it looks
like the 723 is still the best solution for higher voltages.
Fortunately it still seems to be in volume production, at least at
NatSem.
Now, about those filters. Here's the shape I'd like to see:
http://www.iscointl.com/aboutoverview.html
It's the red curve:)
Best Regards,
Mike Monett
Paul Keinanen
>The biggest problem is they are all low voltage - 1.5V to 5.0V, and
>there is no access to the divider to change the output. So it looks
>like the 723 is still the best solution for higher voltages.
How about putting two LDOs in "series" ?
The lower 5 V regulator would get the full input voltage (say +12V)
and generate +5 V and all output current going into a load resistor.
The upper regulator would be connected between the full 12 V DC input
and the +5V output from the first regulator, thus, voltages up to 10 V
could be generated.
The resistor at the lower +5 V regulator from output to ground must be
capable of sinking the worst case idle current from the upper
regulator, usually a few mA, so a 0.1-1k load resistor should be
sufficient.
Since the noises generated by these regulators have a random phase,
only the noise power is summed, thus, the combined noise voltage is
only 1.41 times the noise voltage for a single unit in a 5+5 V combo.
Paul OH3LWR
Win Hill
>
> Now, about those filters. Here's the shape I'd like to see:
>
> http://www.iscointl.com/aboutoverview.html
>
> It's the red curve:)
Indeed, an ideal draftsman's curve, 1% flat-top pass bandwidth
with 0dB loss, to 90dB attenuation with 0.2% frequency change.
;-)
Win Hill
>> regulator? The old-school LM723 is not a very elegant solution
>> considering the number of pins and amount of support circuitry that
>> chip requires.... yet it still seems to be the only game in town for
>> low-noise regulation.
>
>
> I just Googled and got 61,000 hits on low noise regulators. I checked
> the majors - Motorola, NatSem, Philips, etc.
>
> It seems they are all on the bandwagon for low noise LDO regulators.
> Typical specs are 30uV to 40uV up to 100KHz, and 150mA to 250Ma load
Sadly "low-noise" only by the force of their own claims, in reality
about 10x higher noise than the 723 (with a reference capacitor) and
other truly low-noise regulators.
Mike Monett
> > It seems they are all on the bandwagon for low noise LDO regulators.
> > Typical specs are 30uV to 40uV up to 100KHz, and 150mA to 250Ma load
> > current. All the ones I checked use a PNP to drive the output...
>
> Sadly "low-noise" only by the force of their own claims, in reality
> about 10x higher noise than the 723 (with a reference capacitor) and
> other truly low-noise regulators.
>
> ___
> Thanks, /.-.\
> ((( ))
> - Win \\\//
> \\\
> Winfield Hill //\\\
> Rowland Institute for Science /// \\\
> Cambridge, MA \/ \/
The 7805, LM340, and 723 are not LDO regulators. They might be
comparing their performance against the LM2940, which is spec'd at
700uV from 10Hz-100kHz.
It's good to have something real bad to compare yourself against:)
Best Regards,
Mike Monett
Mike Monett
> One solution is to use a precision voltage reference IC as the
> regulator. For example, an LT1021 in the DCN8-10 version costs
> only $3.17 (singles), yet has 1% initial accuracy and less than
> 4uV p-p of 0.1 to 10Hz noise, and 2.2uV rms in a 10Hz to 10kHz
> bandwidth. It also specs 105dB of ripple rejection, so 0.5V of
> input ripple should create under 2.5uV at the output.
[...snip excellent solution]
> ___
> Thanks, /.-.\
> ((( ))
> - Win \\\//
> \\\
> Winfield Hill //\\\
> Rowland Institute for Science /// \\\
> Cambridge, MA \/ \/
Win,
Did you see how they measure the noise in the LT1021?
"Note 6: RMS noise is measured with a 2-pole highpass filter at
10Hz and a 2-pole lowpass filter at 1kHz. The resulting output is
full-wave rectified and then integrated for a fixed period, making
the final reading an average as opposed to RMS. Correction factors
are used to convert from average to RMS and correct for the
non-ideal bandpass of the filters."
I wonder if this is a valid method of treating Gaussian noise, and
why they didn't use a conventional true-RMS meter like the HP3400A?
Best Regards,
Mike Monett
John Miles
>
> The biggest problem is they are all low voltage - 1.5V to 5.0V, and
> there is no access to the divider to change the output. So it looks
> like the 723 is still the best solution for higher voltages.
> Fortunately it still seems to be in volume production, at least at
> NatSem.
Right... there are plenty of specialty parts, but nothing in the 723's
league that I can simply order from Digi-Key or drive down the street
and buy off the rack at Active.
Just as important, there's nothing I can just substitute for a 78xx.
What I really want is a "78LN05" or a "78LN12."
Win's circuit with the LED is pretty nifty. I may try that next time I
find myself reaching for a Zener.
>
> Now, about those filters. Here's the shape I'd like to see:
>
> http://www.iscointl.com/aboutoverview.html
>
> It's the red curve:)
Can't read the graph legend, unfortunately. 2 dB/division, shyeah!
Terry Ritter
On 25 Feb 2002 11:13:06 -0800, in
<7e4a2a11.02022...@posting.google.com>, in
rec.radio.amateur.homebrew mrmo...@yahoo.com (Mike Monett) wrote:
>[...]
>Win,
>
> Did you see how they measure the noise in the LT1021?
>
> "Note 6: RMS noise is measured with a 2-pole highpass filter at
> 10Hz and a 2-pole lowpass filter at 1kHz. The resulting output is
> full-wave rectified and then integrated for a fixed period, making
> the final reading an average as opposed to RMS. Correction factors
> are used to convert from average to RMS and correct for the
> non-ideal bandpass of the filters."
>
> I wonder if this is a valid method of treating Gaussian noise, and
> why they didn't use a conventional true-RMS meter like the HP3400A?
If the point was to measure "1/f" noise, we expect that to be
negligible above 1kHz anyway.
As a guess, it may be that a conventional RMS voltmeter does not have
a long enough time constant for 1/f work.
Terry Ritter KF5MH
Win Hill
>
> Win's circuit with the LED is pretty nifty. I may try
> that next time I find myself reaching for a Zener.
It is nifty, but it wasn't not my circuit, it was LTC's.
budgie
Only by compromising the internal reg loop characteristics :-(
Ian Buckner
Many years ago I had a need for a low noise reference, with a decent
TC but did not need very high accuracy. I did it using a 2.2V zener
with a TC of -2mV/deg C which compensated for the associated
transistor Vbe drift, resulting in a constant emitter current (and
voltage).
The important thing to note is that at low voltages, Zener diodes are
really Zener diodes, and have very low noise. At higher knee voltages
so-called Zener diodes are actually avalanche diodes, which can be
very
noisy. The transition between the two modes of operation is around
5.6V - the TC of the two modes is opposite in sign, you get
cancellation
when the two modes have about the same contribution.
I'm not sure whether these low voltage zeners are still readily
available,
however.
Ian
"John Miles" <jmi...@pop.removethistomailme.net> wrote in message
news:3C7A9A...@pop.removethistomailme.net...
Win Hill
>
> I missed Win's LED circuit, but I suspect I can guess it.
It wasn't using an LED as a low-voltage reference. Instead the
LED played a current-limiting role in LTC's circuit:
>12.8V 8.2
---+-----------/\/\-------,
| 220 |
+---/\/\---, |e
| RED LED | |/ pnp
'---|>|----+-+-------|
__|__ |\
| | | 10.0V
LT1021 | |------+----+------o 100mA max
DCN8-10 |_____| |+
| === 4.7uF low esr cap
| | solid tant, etc.
gnd gnd
The LED lights up as the circuit current limits. In one variant,
a darlington PNP power transistor with a green LED and 0.25 ohms
of emitter current-limiting resistance would allow up to 2A out.
___
Mike Monett
Win,
I was curious about the correction factor needed to convert an
average-reading voltmeter to rms when measuring a gaussian signal.
Analog Devices shows two different values in their conversion
tables:
Source rms value average %error url
AN268 0.333V 0.266V -20.2% [1]
AD736 0.333V 0.295V -11.496% [2]
AD737 0.333V 0.295V -11.4% [3]
Terry Ritter quotes from the Art of Electronics [4]
"You can use a simple averaging-type ac voltmeter instead . . . ."
"To get the rms voltage of Gaussian noise, multiply the 'rms'
value you read on an averaging ac voltmeter by 1.13 (or add 1dB)."
This corresponds with the information in AD736 and AD737, but it
would be nice to find the derivation.
A derivation is in "Professor Leach's Noise Potpourri" [5], at the
end of Chapter 3 - Characteristics of Noise. [6]
The correction factor is 2 / sqrt(pi) = 1.12837916709551
"Thus the meter reading must be multiplied by 1.128 to obtain the
correct reading with a Gaussian noise voltage."
Rounding 1.128 gives 1.13, which is the value shown in AOE.
Using an average-reading voltmeter instead of a true-rms may give
unpredictable errors. An average-reading voltmeter is usually not
designed to handle a large crest factor, and the correction factors
assume the noise is truly Gaussian. It may not be.
Terry Ritter has done extensive analysis of noise generators, and
shows that a noise generator that is not completely characterized
may have significant errors. [7], [8]
Terry's results show a true-rms measurement may give more repeatable
results than an average-reading with an unknown noise source.
As a side note, Dr. Johnson used a true-rms meter in his July, 1928
Physical Review paper on resistor noise. He used a thermocouple to
measure resistor noise. [9]
Nyquist presented a theoretical analysis in the same issue. [10]
His concept of two resistors separated by a transmission line is
still used to derive Johnson noise. [11]
--------------------------------------------------------------------
URLS
[1]
http://www.analog.com/library/applicationNotes/amplifiersLinear/AN268.pdf
[2]
http://www.analog.com/productSelection/pdf/ad736.pdf
[3]
http://www.analog.com/productSelection/pdf/AD737_c.pdf
[4]
http://www.ciphersbyritter.com/RES/NOISE.HTM
[5]
http://users.ece.gatech.edu/~mleach/ece6416/noisepot/
[6]
http://users.ece.gatech.edu/~mleach/ece6416/noisepot/chap03.pdf
[7] "Random Noise Sources"
http://www.ciphersbyritter.com/NOISE/NOISRC.HTM
[8] "Experimental Characterization of Recorded Noise"
http://www.ciphersbyritter.com/NOISE/NOISCHAR.HTM
[9] J. B. Johnson, "Thermal Agitation of Electricity in Conductors",
Phys. Rev. 32, 97 (1928)
http://faraday.ufbi.ufl.edu/~thmareci/bch6741/further_reading/PR_32_97.pdf
[10] H. Nyquist, "Thermal Agitation of Electric Charge in
Conductors", Phys. Rev. 32, 110-113 (1928)
http://faraday.ufbi.ufl.edu/~thmareci/bch6741/further_reading/PR_32_110.pdf
[11]
http://www.pas.rochester.edu/~dmw/ast203/Lectures/Lect_20.pdf
Best Regards,
Mike Monett
John Miles
>
> ... Once the boards are ready, it'll be trivial for anyone to
> build a digitally-tunable octave-band source for any range of
> frequencies between 100 MHz and 3 GHz. That'll definitely open up some
> interesting RF projects to people who previously lacked the inclination
> toward the detail work. Hobbyists can stop goofing around with those
> CATV tuner hacks and build themselves a REAL spectrum analyzer, for
> instance. :)
>
The initial round of PC boards is back and as usual Richard Hosking (and
his board house) have done a great job. Pics at:
http://209.95.122.40/jm/synth2.jpg
http://209.95.122.40/jm/synth.jpg
The synth is up and running fine on this PCB, and once we make a few
minor tweaks (like simplifying the DDS power supply regulator circuit
and substituting an improved part for the ERA-5 MMIC), the boards should
be ready for purchase via PayPal from Richard within a few weeks. Cost
should be in the neighborhood of $20-$25 per board, similar to his
AD9854-only boards.
Watch this space...
Gary Glaenzer
"John Miles" <jmi...@pop.removethistomailme.net> wrote in message
news:3CAD1F...@pop.removethistomailme.net...
Mike Monett
> The initial round of PC boards is back and as usual Richard Hosking (and
> his board house) have done a great job. Pics at:
>
> http://209.95.122.40/jm/synth2.jpg
> http://209.95.122.40/jm/synth.jpg
>
> The synth is up and running fine on this PCB, and once we make a few
> minor tweaks (like simplifying the DDS power supply regulator circuit
> and substituting an improved part for the ERA-5 MMIC), the boards should
> be ready for purchase via PayPal from Richard within a few weeks. Cost
> should be in the neighborhood of $20-$25 per board, similar to his
> AD9854-only boards.
>
> Watch this space...
>
> -- jm
Looks great - pretty as a Playboy bunny:)
Have you had a chance to look at crosstalk and spurs? If so, do you
see much difference between the pcb and the original?
Thanks for doing this, John. I can see a lot of simple, inexpensive
projects based on these boards. You are providing a new level of
performance and capability at a very inexpensive price, and I expect
to see your boards used in many ways.
For example, this would provide the perfect trigger for an
inexpensive, high-performance sampler I've been working on. You can
see the description at
http://www3.sympatico.ca/add.automation/sampler/intro.htm
Please let us know when the boards are ready!
Best Regards, Mike
John Miles
>
> Looks great - pretty as a Playboy bunny:)
>
Well, I probably wouldn't go THAT far...!
> Have you had a chance to look at crosstalk and spurs? If so, do you
> see much difference between the pcb and the original?
>
The PCB's broadband noise floor seems to be a couple dB worse, but
in-band noise appears to be pretty much the same.
http://209.95.122.40/jm/compare.gif shows an early prototype (not the
same as the ADF4112-based unit on my web page) in purple, with the new
PCB in blue.
The open point-to-point layout of the prototype has less broadband noise
(presumably from the digital section), but it's picking up 15.7 kHz junk
from a TV in a neighboring apartment. The PCB has better self-shielding
properties but also worse intra-circuit coupling. Not unexpected.
Overall noise performance, both in-band and out-of-band, is still
superior in the ADF4112 synthesizer at
http://www.qsl.net/ke5fx/synth.html. But the loop on the PCB uses an
easier-to-obtain chip and locks up quite a bit faster.
> Thanks for doing this, John. I can see a lot of simple, inexpensive
> projects based on these boards. You are providing a new level of
> performance and capability at a very inexpensive price, and I expect
> to see your boards used in many ways.
>
> For example, this would provide the perfect trigger for an
> inexpensive, high-performance sampler I've been working on. You can
> see the description at
>
> http://www3.sympatico.ca/add.automation/sampler/intro.htm
>
Neat stuff... very nicely documented!
John Miles
>
> fine looking work, John
>
Thanks -- this is the first surface-mount project I've ever done. I'm
pretty much sold on it.
Richard Hosking
Would shielding sections of the board and/or separating parts of the ground
plane make any difference?
Also the close in phase noise of the ICOM LO was much worse but the noise at
10 KHz was much better than the point to point version. Was this due to loop
filter design or could you identify some other reason - eg VCO performance
etc?
Richard
"John Miles" <jmi...@pop.removethistomailme.net> wrote in message
news:3CAE3E...@pop.removethistomailme.net...
John Miles
>
> John
> Would shielding sections of the board and/or separating parts of the ground
> plane make any difference?
> Also the close in phase noise of the ICOM LO was much worse but the noise at
> 10 KHz was much better than the point to point version. Was this due to loop
> filter design or could you identify some other reason - eg VCO performance
> etc?
As I noted in my earlier reply (to Mike Monett?), the Icom's strength is
its twin-discrete VCO design. They use a very low loop bandwidth, less
than 100 Hz as far as I can tell, and much higher-quality VCOs that
cover only half the range (770-1290 MHz as opposed to 1000-2000). There
is no way to make an inexpensive off-the-shelf integrated VCO compete
with theirs -- I'm doing well to get as close to their performance as I
am.
It's possible that some type of shielding arrangement could buy another
dB or so in the broadband noise arena, but I doubt it would be worth it.