Variable inductor in LTSpice

[Piotr Wyderski]

How do I define a voltage (or current)-dependent inductor in LTSpice?
In the case of a resistor I simply write R=100*V(Vkey), but the
simulator refuses to accept L=... I don't care about hysteresis, pure
reactance is all I want to simulate now. The non-linear effects need
to wait.

Bets regards, Piotr

[Jim Thompson]

See "Inductor_with_Saturation.zip" on the Device Models & Subcircuits
page of my website for the basics of making a variable inductor. This
particular model is current dependent but can be adapted to voltage
control.

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

[Jim Thompson]

On Sun, 22 Nov 2015 07:53:22 -0700, Jim Thompson
<To-Email-Use-Th...@On-My-Web-Site.com> wrote:

>On Sun, 22 Nov 2015 13:06:19 +0100, Piotr Wyderski
><pete...@neverland.mil> wrote:
>
>>How do I define a voltage (or current)-dependent inductor in LTSpice?
>>In the case of a resistor I simply write R=100*V(Vkey), but the
>>simulator refuses to accept L=... I don't care about hysteresis, pure
>>reactance is all I want to simulate now. The non-linear effects need
>>to wait.
>>
>> Bets regards, Piotr
>
>See "Inductor_with_Saturation.zip" on the Device Models & Subcircuits
>page of my website for the basics of making a variable inductor. This
>particular model is current dependent but can be adapted to voltage
>control.
>
> ...Jim Thompson

"VControlledCap.zip" on that same page may give you further
information on how to make a voltage-controlled inductor.

[Piotr Wyderski]

Jim Thompson wrote:

> "VControlledCap.zip" on that same page may give you further
> information on how to make a voltage-controlled inductor.

Thank you. It doesn't solve my problem, but at least I know where
to start. In the case of a resistor it is very simple, but the
solution does not apply to the remaining passive components. Why
is it so damn hard?

My goal is to simulate magamps in the far future, but after
the initial experience with the saturable core reactor I am
not even sure that LTSpice is the correct tool. Do you know
of something better suited for this task and still free, as
it is pure hobby?

Best regard, Piotr

[o pere o]

An inductor gives v=L*di/dt. Now, I suppose you want a box where the
proportionality constant is L=L(Vc).

*---i->--| |
+ | |
v |BOX|
- | |
*--------| |

The idea is as follows:

1. Create a circuit where V1=1*di/dt. This means, measure i, copy it
with a CCCS to another place, feed it to an 1H inductor and measure the
voltage V1 across its terminals.

3. Copy this voltage to the box port with a VCVS with the desired gain:
V= (Ao*Vc+A1*Vc^2+...)*V1 (Assuming a polynomial is ok for you, a POLY
statement is the way to go)

You may apply this creatively!

Pere

[Jim Thompson]

On Mon, 23 Nov 2015 10:05:32 +0100, Piotr Wyderski
<pete...@neverland.mil> wrote:

>Jim Thompson wrote:
>
>> "VControlledCap.zip" on that same page may give you further
>> information on how to make a voltage-controlled inductor.
>
>Thank you. It doesn't solve my problem, but at least I know where
>to start. In the case of a resistor it is very simple,

That's only because Mike Engelhardt made a special resistor model in
LTspice that performs that function.

>but the
>solution does not apply to the remaining passive components. Why
>is it so damn hard?

It's not. "o pere o" is sort of on the right track (Message-ID:
<n2un4h$b6k$1...@dont-email.me>)...

Stack an inductor and a voltage-controlled voltage source which has
two inputs: the voltage across the inductor and a control input such
that the output is K*V(L). Thus acts as an inductor of value (K+1)*L

I'll post a model to my website later today.

>
>My goal is to simulate magamps in the far future, but after
>the initial experience with the saturable core reactor I am
>not even sure that LTSpice is the correct tool. Do you know
>of something better suited for this task and still free, as
>it is pure hobby?
>
> Best regard, Piotr

[Jim Thompson]

See "VoltageControlledInductor.pdf" on the Device Models & Subcircuits
page of my website.

[Jim Thompson]

On Mon, 23 Nov 2015 08:15:25 -0700, Jim Thompson
<To-Email-Use-Th...@On-My-Web-Site.com> wrote:

>On Sun, 22 Nov 2015 13:06:19 +0100, Piotr Wyderski
><pete...@neverland.mil> wrote:
>
>>How do I define a voltage (or current)-dependent inductor in LTSpice?
>>In the case of a resistor I simply write R=100*V(Vkey), but the
>>simulator refuses to accept L=... I don't care about hysteresis, pure
>>reactance is all I want to simulate now. The non-linear effects need
>>to wait.
>>
>> Bets regards, Piotr
>
>See "VoltageControlledInductor.pdf" on the Device Models & Subcircuits
>page of my website.
>
> ...Jim Thompson

Oooops! Left off 2*pi :-(

[Tim Williams]

For saturation, you might start with something like this:

* Saturable Core Model, copied from:
* _SPICE Models For Power Electronics_, Meares and Hymowitz.
*
.SUBCKT INDSAT 1 2 PARAMS: VSEC=1e-4 LMAG=1e-5 LSAT=1e-7 FEDDY=1e6
F1 1 2 VM1 1
G2 2 3 1 2 1
E1 4 2 3 2 1
VM1 4 5 0
RX 3 2 1E12
CB 3 2 {VSEC/500} IC=0
RB 5 2 {LMAG*500/VSEC}
RS 5 6 {LSAT*500/VSEC}
VP 7 2 250
VN 2 8 250
D1 6 7 DCLAMP
D2 8 6 DCLAMP
.MODEL DCLAMP D(CJO={3*VSEC/(6.28*FEDDY*500*LMAG)} VJ=25)
.ENDS

It might be reasonable to add some sort of current steering function to
the input, so that it has hysteresis.

Typical usage of this model is: specify the PARAMS as for one winding of a
transformer, then build the rest of the transformer using ideal
transformers and leakage inductors.

Playing funny business with the core geometry (orthogonal loops of core,
CM/diff winding arrangements) might be possible using two of these and
appropriate coupling, or may need additional modeling, I'm not sure.

Tim
--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Contract Design
Website: http://seventransistorlabs.com


"Piotr Wyderski" wrote in message news:n2uksv$l4$1...@node2.news.atman.pl...

[Jim Thompson]

On Mon, 23 Nov 2015 15:40:33 -0600, "Tim Williams"
<tiw...@seventransistorlabs.com> wrote:

>For saturation, you might start with something like this:
>
>* Saturable Core Model, copied from:
>* _SPICE Models For Power Electronics_, Meares and Hymowitz.
>*
>.SUBCKT INDSAT 1 2 PARAMS: VSEC=1e-4 LMAG=1e-5 LSAT=1e-7 FEDDY=1e6
>F1 1 2 VM1 1
>G2 2 3 1 2 1
>E1 4 2 3 2 1
>VM1 4 5 0
>RX 3 2 1E12
>CB 3 2 {VSEC/500} IC=0
>RB 5 2 {LMAG*500/VSEC}
>RS 5 6 {LSAT*500/VSEC}
>VP 7 2 250
>VN 2 8 250
>D1 6 7 DCLAMP
>D2 8 6 DCLAMP
>.MODEL DCLAMP D(CJO={3*VSEC/(6.28*FEDDY*500*LMAG)} VJ=25)
>.ENDS

See... "Inductor_with_Saturation.zip" on the Device Models &
Subcircuits page of my website. Highly accurate and easy to fit to
measured data. I developed that model a few years ago when I
encountered such a beast being used as a spacing sensor for a heavy
truck clutch ;-)

>
>It might be reasonable to add some sort of current steering function to
>the input, so that it has hysteresis.

So far modeling the hysteresis has evaded me.

>
>Typical usage of this model is: specify the PARAMS as for one winding of a
>transformer, then build the rest of the transformer using ideal
>transformers and leakage inductors.
>
>Playing funny business with the core geometry (orthogonal loops of core,
>CM/diff winding arrangements) might be possible using two of these and
>appropriate coupling, or may need additional modeling, I'm not sure.
>
>Tim

[Piotr Wyderski]

Jim and all, thank you very much for your help!

Best regards, Piotr

[Jim Thompson]

You are quite welcome!