Designer needs pointer to picosecond domain
Gerry Schneider
wisdom.
I'm fairly familiar with nanosecond design and
pitfalls, but now I've let myself get talked into a
TDR-style application that requires sub-100 picosecond
generation and detection. The first is OK - I've been
experimenting and actually getting decent results,
thanks in a large part to the on-going 100pSec thread
on this group (tip of the hat to all the real experts
out there!). But how the heck do you detect (and
store) a pattern of smallish 35pSec edges in a 100nSec
time period? Nice thing is they're totally repetitive,
so some kind of undersampling/correlation/sliding gate
method seems indicated (I'm just babbling, now), but
what about the aperture time? This is getting scary!
Is it too much to hope that the detector component
cost (25 qty) will be under $500 US? BTW, I've
absorbed all of the Bob Pease and Jim Williams info,
although I'm certainly not in their class. Anybody
else write about this kind of stuff? Pointers to
appropriate literature, especially the practical kind,
will be greatly appreciated. I've unblocked my address
for this post if you want to reply directly, although
a group post is always good.
Cheers,
Gerry
John Larkin
Gerry,
Do you need to timestamp a number of clean, distinct edges, or do you actually
need to digitize the analog TDR waveform?
What sort of net TDR time resolution do you need? How much can you afford to
undersample (ie, how many repetitions are you willing to expend to acquire the
entire waveform?) If the answer is 'very many', there are some truly evil
tricks to build an effective sampling oscilloscope without a lot of parts.
John
Mike Monett
[...]
> Gerry,
> Do you need to timestamp a number of clean, distinct edges, or do you actually
> need to digitize the analog TDR waveform?
>
> What sort of net TDR time resolution do you need? How much can you afford to
> undersample (ie, how many repetitions are you willing to expend to acquire the
> entire waveform?) If the answer is 'very many', there are some truly evil
> tricks to build an effective sampling oscilloscope without a lot of parts.
>
> John
John,
That would be *very* interesting - do you have the time to explain
further?
How do you get a sampling bridge without taking a Tek or HP scope apart?
Best Regards,
Michael R. Monett
mailto:mkmo...@hotmail.com
John Larkin
wrote:
Mike,
it's actually not all that hard to make a real
equivalent-timesampling-scope-type sampler using surface-mount parts,
but the nasty trick is this:
Connect the analog input signal and a feedback signal (resistive sum)
into the D input of a fast (EclipsPlus?) flipflop. Clock the FF using
a normal sampling-scope sort of delay timebase. After each clock, if
the FF sets, reduce the feedback a little, and if it doesn't, increase
it a little. This is a 'slideback sampler'; it keeps the ff D input
just at the 1/0 threshold. It's slow in the sense that you need LOTS
of samples since you only get, basicly, one bit of information per
sample. Since most ff's have some internal hysteresis, it's best to
clear the ff before the next shot.
I don't know what sort of risetime can be had using EP logic, but I'd
guess that 100ps is in the ballpark, maybe much less. As regards input
levels and impedances, it's not nearly so nice as a real diode
sampler, but might be OK in a TDR situation where everything's fairly
well controlled.
I did this once (using tunnel diodes) as a school project, and
somebody did a commercial version (but only a couple of hundred MHz)
as an ISA card a while back; they used a strobed comparator, I think.
John
==
A little nonsense now and then,
is cherished by the wisest men.
- Willy Wonka
russell shaw
Split the signal to two paths, and connect each path to the
opposite end of a slotted transmission line, using a 6dB
attenuator on each end. Now measure the pulse shape using
a sliding diode probe. This shows a pattern caused by opposite
travelling waves. Its not all that useful for seeing an exact
pulse shape :( .
--
*******************************************
* Russell Shaw, B.Eng, M.Eng(Research) *
* Electronics Consultant *
* email: rus...@webaxs.net *
* Australia *
*******************************************
Gerry Schneider
russell shaw wrote:
> One rough way to find some kind of rise time estimate is:
>
> Split the signal to two paths, and connect each path to the
> opposite end of a slotted transmission line, using a 6dB
> attenuator on each end. Now measure the pulse shape using
> a sliding diode probe. This shows a pattern caused by opposite
> travelling waves. Its not all that useful for seeing an exact
> pulse shape :( .
Thanks, Russell - I'll stick that concept in the old "neat ideas"
file. Could you elaborate a bit on what the expected waveform will
be?
Cheers,
Gerry
Gerry Schneider
John Larkin wrote:
> Gerry,
>
> Do you need to timestamp a number of clean, distinct edges, or do you actually
> need to digitize the analog TDR waveform?
I preferrably would like to digitize and display a TDR waveform, consisting of many
thousands of repetitive samples, all the same. Any kind of averaging/correlation
scheme is acceptable AFAIK. If this isn't readily possible, then the timestamp
method (time occurence plus height and polarity info) is probably acceptable..
> What sort of net TDR time resolution do you need? How much can you afford to
> undersample (ie, how many repetitions are you willing to expend to acquire the
> entire waveform?) If the answer is 'very many', there are some truly evil
> tricks to build an effective sampling oscilloscope without a lot of parts.
Thousands to hundreds of thousands of samples are available for processing. This is
a non-real-time monitoring situation that can accumulate for minutes if necessary.
I'd like to get below 100pSec resolution (35pSec is the target rise/fall time limit
of the stored information).
Any great suggestions (I hope)???
Regards,
Gerry
Mike Monett
Thanks for your remarks. I have just a few questions...
>> John Larkin wrote:
[...]
> Mike,
> it's actually not all that hard to make a real
> equivalent-timesampling-scope-type sampler using surface-mount
> parts, but the nasty trick is this:
> Connect the analog input signal and a feedback signal (resistive
> sum) into the D input of a fast (EclipsPlus?) flipflop.
> Clock the FF using a normal sampling-scope sort of delay timebase.
I assume you mean a stable variable delay circuit, which is driven
from an accurate trigger. Any comments or recommendations on the
best way to do this?
> After each clock, if the FF sets, reduce the feedback a little,
> and if it doesn't, increase it a little.
This is a good trick! A FF is extremely sensitive when the 'D' input
is near the threshold.
I know it is very difficult to get a ECLinPS 'D' flop to go into a
metastable state by changing the timing of the signal at the 'D'
input: the transition window is much narrower than the jitter on any
signal I can generate. I do see metastable states, but it's only by
chance.
It appears you actually want to measure the pulse amplitude for each
delay step so you can follow the leading and trailing edges, and any
potential ringing.
It would seem a binary search would speed things up - with an 8-bit
dac, it should take 8 samples at the beginning, and with a bit of
clever programming, fewer steps after the signal amplitude is known.
Do you have a better method?
> This is a 'slideback sampler'; it keeps the ff D input just at the
> 1/0 threshold. It's slow in the sense that you need LOTS of
> samples since you only get, basicly, one bit of information per
> sample.
> Since most ff's have some internal hysteresis, it's best to clear
> the ff before the next shot.
Is hysteresis actually built into the device, or is this a
consequence of a master-slave architecture?
But it's a good idea to reset the FF anyway...
> I don't know what sort of risetime can be had using EP logic, but
> I'd guess that 100ps is in the ballpark, maybe much less. As
> regards input levels and impedances, it's not nearly so nice as a
> real diode sampler, but might be OK in a TDR situation where
> everything's fairly well controlled.
> I did this once (using tunnel diodes) as a school project, and
> somebody did a commercial version (but only a couple of hundred
> MHz) as an ISA card a while back; they used a strobed comparator,
> I think.
> John
This certainly sounds like a simple solution that might give pretty
good results. Thanks for explaining it!
John Larkin
1. The timebase is just a variable delay circuit; a capacitive linear
ramp and a fast comparator (DAC on the other side) works fine. The
MAX9690 is the best comparator for this.
2. The EL flipflops I've tested have a setup/hold boundary (or maybe a
D-input logic threshold, not sure which) that seems to depend on the
ff's current state, to the tune of a couple of picoseconds.
3. Yes, the ff can be used as the comparator for a
successive-approximation digitization of the instantaneous voltage at
the sample time. I haven't tried this, but it should work. The
'advantage' of using an up-down (tracking?) feedback scheme is that
the noise level should be lower at the expense of equivalent-time
sweep speed. The tracking feedback has the advantage of basing the new
sampled value on the old one (just like a modern feedback sampler*)
whereas a pure successive approximation thing throws away this
information. If the sampling density is high, the up/down is probably
just as good as something fancier. Successive approximation would be a
good way to start things after the sweep retrace.
4. Metastability is 'actively pursued' by this circuit, but probably
won't be of much practical concern, as resolution time can be very
long. Most equivalent-time sampling scopes take 100K or fewer samples
per second.
If you do play with this, please let me know what you discover.
John
* the 'modern' 2-diode, SRD-pulsed feedback sampler was invented by HP
(for the 185 sampling scope) around 1960; it, like the 9100 scientific
calculator, was a technological milestone. The 185 achieved 5 GHz
bandwidth and something like 50 ps jitter with *tubes* in many of the
circuits. Tek's first sampler, the type 'N' plugin, was absolutely
barbaric by comparison.
= = = = = = = = = = = = = =
Don't assume malice when incompetance will do.
Bill Sloman
John Larkin <jjla...@highlandSnipSniptechnology.com> wrote in article
<Kfd4OMhAq6VFJR=WrnalT...@4ax.com>...
> Mike,
>
> 1. The timebase is just a variable delay circuit; a capacitive linear
> ramp and a fast comparator (DAC on the other side) works fine. The
> MAX9690 is the best comparator for this.
This can work well, but you have to be very careful about keeping
electrical interference out of the comparator inputs.
Signal Processing Technologies also have a very fast comparator -
one more of the many variants on the old AM685 - I think
their part number is SP9687, but I'm a long way from home
at the moment and can't check.
You can also look at the Motorola MC100E196 programmable
delay generator, where most of the delay (down to about
20psec) is generated digitally, by selecting the appropriate
path through the chip, and you have a couple of hundred
psec of analog delay controlled by a built-in ramp generator
and comparator. Maximum guaranteed range is 2nsec -
including the ditigal part, and there is a fairly serious
temperature dependence.
In an a planned application for the MC100E195, we were going to
automatically recalibrate all 128 delays every few minutes
- it was only going to take about a millisecond. Project is now
shelved - $10,000 was too expensive for the customer. The
automatic calibration was just a small part of a fairly
elaborate project, and wasn't even the last straw.
I've seen multi-tapped lumped constant delay lines
used in this sort of application but they tend to lead
to rather clumsy solutions.
<snipped the rest - good stuff>
Bill Sloman, Nijmegen (but in Melbourne, Australia, right now)
russell shaw
constant 10VDC from the probe over the whole line.
Two "colliding" asymetrically shaped waves will produce a symmetrical
standing-wave profile that you see with the probe. I haven't figured
out if you could ever deduce the shape of each wave.
--
Bill Sloman
Gerry Schneider <ger...@sympatico.ca> wrote:
> Hi all, here's hoping somebody has a bit of sage
> wisdom.
>
> I'm fairly familiar with nanosecond design and
> pitfalls, but now I've let myself get talked into a
> TDR-style application that requires sub-100 picosecond
> generation and detection. The first is OK - I've been
> experimenting and actually getting decent results,
> thanks in a large part to the on-going 100pSec thread
> on this group (tip of the hat to all the real experts
> out there!). But how the heck do you detect (and
> store) a pattern of smallish 35pSec edges in a 100nSec
> time period? Nice thing is they're totally repetitive,
> so some kind of undersampling/correlation/sliding gate
> method seems indicated (I'm just babbling, now), but
> what about the aperture time? This is getting scary!
> Is it too much to hope that the detector component
> cost (25 qty) will be under $500 US?
Sorry to be so slow responding, but you may be interested in using the
latch function on an Am 685 -style ECL comparator as your aperture
generator.
I published the circuit for a cheap gated constant fraction
discriminator in the (British) Jounral of Physics E: Scientific
Instruments, back in about 1976 - e-mail me if you what the full
reference - using the latch function on the original AMD Am685
comparator, which had 100MHz bandwidth and 6nsec propagation delay.
The latch function actually worked on the input stage, so the
hold and set-up times on the latch function were a lot shorter,
and I was vastly surprised to be able to open the latch for just
500psec.
Modern versions of the 685 are much faster - the Signal Processing
Technologies SP-9867 (?) dual has a propagation delay of less than a
nanosecond, and the Maxim MAX9685 is not too far behind.
Sergio Cova recently published a circuit for driving a single photon
(Geiger-mode) avalanche photo-diode detector using some variant of
the 685 - I think it was the Analog Devices AD99685 - which exploited
the latch function. He found that very narrow "unlatch" pulses inter-
acted with the input signal, as you might expect, and he used a
relatively wide pulse (from my point of view). I think the paper was in
Review of Scientific Instruments, and I'll wander over to the Melbourne
University Physics Library to see if I can find it.
In short, I'd recommend looking at the latchable ECL output comparators
from Signal Processing Technologies and Maxim as possible narrow
apperture detectors. Gallium arsenide diode bridge samplers are probably
going to be faster but harder to drive and more expensive.
--
Bill Sloman, Nijmegen
Sent via Deja.com http://www.deja.com/
Before you buy.
m_mo...@my-deja.com
Gerry Schneider <ger...@sympatico.ca> wrote:
> Hi all, here's hoping somebody has a bit of sage
> wisdom.
>
> I'm fairly familiar with nanosecond design and
> pitfalls, but now I've let myself get talked into a
> TDR-style application that requires sub-100 picosecond
> generation and detection. The first is OK - I've been
> experimenting and actually getting decent results,
> thanks in a large part to the on-going 100pSec thread
> on this group (tip of the hat to all the real experts
> out there!). But how the heck do you detect (and
> store) a pattern of smallish 35pSec edges in a 100nSec
> time period? Nice thing is they're totally repetitive,
[...]
> Cheers,
>
> Gerry
Gerry,
Sounds like you are partway there. How are you generating the 35 ps
signals?
Are you using tunnel diodes? If so, where do you get them and how
much do they cost?
I've been looking at various solutions, as I have a similar problem.
I use a Tek 7854 with dual sampling plug-ins, but these only go to 6
GHz and downloading the data over the GPIB is painfully slow.
I've looked at step-recovery diodes driving a sampling bridge, but
the commercial ones are extremely sensitive to ESD.
This would not last long in the rough-and-tumble debugging sessions
I go through.
The fastest ecl logic device I can find only goes to 3 Ghz, which is
probably not fast enough to catch a 35 ps edge.
So, I don't have a solution for you.
But, I have come across an extremely interesting solution to a
related problem, fast 3D electromagnetic simulation, with full
source code (in Fortran).
I contacted the author to find out how to get a copy, and will
report as soon as I get an answer.
For those who might be interested, search
for the word "qfdtd90"
Best Regards,
Mike Monett
mailto:mkmo...@hotmail.com
add automation
> Mike,
> 1. The timebase is just a variable delay circuit; a capacitive
> linear ramp and a fast comparator (DAC on the other side) works
> fine. The MAX9690 is the best comparator for this.
I have used this approach for delays in the 50 to 200 ns range, but
when I tried going to shorter delays, I ran into problems with
ringing at the start of the ramp, nonlinearity, temperature drift,
and jitter.
It might be worthwhile to revisit this approach using Miller
feedback to improve linearity, and better layout and bypassing to
reduce jitter due to external noise.
Recall if we want 8-bit accuracy with a 35 ps risetime, we need a
timing accuracy on the order of 35/256 or 130 femtoseconds.
I had fairly good results with the Sony CXB1159/1559 for delays in
the 20 ns range, but I'm sure they would not meet the jitter
requirement. I don't know if they are still available.
I also tried using a tapped delay line into a 100E163 dual 8-bit
multiplexer with a separate vernier adjust.
This failed miserably due to the delay/risetime ratio of the delay
line: the first few taps were ok, but after that, the risetime was
so poor the signal suffered from severe noise and crosstalk. Also,
the tap-to-tap linearity was poor.
Incidentally, the HP 5327B timer/counter was the best time interval
averaging counter made by HP. Later generations sacrificed the
timing resolution, making them useless for this work.
> 2. The EL flipflops I've tested have a setup/hold boundary (or
> maybe a D-input logic threshold, not sure which) that seems to
> depend on the ff's current state, to the tune of a couple of
> picoseconds.
I seem to recall Sony or NEC offered an ecl flop with a max toggle
rate in the 4-5 GHz region. I did a search but could only find the
Motorola and Synergy parts, which max out at 3 GHz.
As you pointed out in an earlier post, these parts might be useful
to about 100 ps, but not much past that.
Do you know of any faster flip-flops?
> 3. Yes, the ff can be used as the comparator for a
> successive-approximation digitization of the instantaneous voltage
> at the sample time. I haven't tried this, but it should work. The
> 'advantage' of using an up-down (tracking?) feedback scheme is
> that the noise level should be lower at the expense of
> equivalent-time sweep speed. The tracking feedback has the
> advantage of basing the new sampled value on the old one (just
> like a modern feedback sampler*) whereas a pure successive
> approximation thing throws away this information. If the sampling
> density is high, the up/down is probably just as good as something
> fancier. Successive approximation would be a good way to start
> things after the sweep retrace.
Once we have a few samples, we can start predicting the next sample
based on the previous ones and the rate of change. It might need
only a small portion of the full binary search, until the slope
changed direction.
> 4. Metastability is 'actively pursued' by this circuit, but
> probably won't be of much practical concern, as resolution time
> can be very long. Most equivalent-time sampling scopes take 100K
> or fewer samples per second.
It would be nice to speed this up and use averaging to improve the
snr.
> If you do play with this, please let me know what you discover.
I plan to. Thanks for bringing up the good ideas.
> John
> * the 'modern' 2-diode, SRD-pulsed feedback sampler was invented
> by HP (for the 185 sampling scope) around 1960; it, like the 9100
> scientific calculator, was a technological milestone. The 185
> achieved 5 GHz bandwidth and something like 50 ps jitter with
> *tubes* in many of the circuits. Tek's first sampler, the type 'N'
> plugin, was absolutely barbaric by comparison.
John,
You mentioned using a tunnel diode as a sampler in your high school
project. This may be the only solution that is fast enough and
rugged enough for ordinary lab use.
Can you explain how you can sample a signal using a tunnel diode?
Best Regards,
Michael R. Monett
mailto:add.aut...@sympatico.ca
Mike Monett
John,
Sorry to double-post, but I may have a solution.
Your comment on "chasing the metastability point" triggered an idea.
As you pointed out, the metastability window is very narrow on an
EclinPs part: on the order of picoseconds. We might be able to use
this to our advantage.
If the input signal is a step, or at least wide enough to satisfy
the hold time, we could use your idea of a D-flop and averaging to
make a fast equivalent time sampler.
Assume the signal has jitter - assume it is gaussian.
The clock into the D-flop also has jitter - assume it is gaussian.
Both these signals have an average value. All we have to do is find
the average value of the distributions.
We can do this by finding the point where the flop has a 50%
probability of switching.
For each time step, we can adjust either the offset voltage at the D
input, or add a small vernier to the clock, until the probability of
switching is at 50%
We could feed the output to two current sources feeding a cap, and
integrate the result. This could be fed back to the vernier to keep
it centered on the distribution.
We could allow the system enough time to take say 1,000 samples
after it reached the equilibrium point. This would give high
confidence that the data point is valid.
We then read the vernier voltage, combine it with the main step
value, add any corrections for non-linearity, and move on to the
next data point.
It seems this could easily be done at a sampling clock of 10 MHz or
higher. This might allow us to find each data point in one
millisecond or less, which may allow a full 1024-point sweep in a
second.
There would be some issues with the rate-of-rise of the signal into
the D input, but it might be possible to add a correction after the
data is taken.
Any thoughts?
Best Regards,
Michael R. Monett
mailto:mkmo...@hotmail.com
Gerry Schneider
Bill Sloman wrote:
> In short, I'd recommend looking at the latchable ECL output comparators
> from Signal Processing Technologies and Maxim as possible narrow
> apperture detectors. Gallium arsenide diode bridge samplers are probably
> going to be faster but harder to drive and more expensive.
Thanks, Bill! I've sent off for a couple of Maxim samples. I'm currently
using the slower MAX913 10nSec part to get a feel for the method.
Cheers,
Gerry
Gerry Schneider
m_mo...@my-deja.com wrote:
> Sounds like you are partway there. How are you generating the 35 ps
> signals?
A 1-1.5 nSec edge from 74AC logic driving an SRD. I've yet to verify the
edge time (I know it's faster than 1nSec) - need to take a trip to an old
client with lots of test equipment bucks!
> Are you using tunnel diodes? If so, where do you get them and how
> much do they cost?
From what I can (or can't) find, pretty scarce. Have you tried American
Microsemiconductor or M-pulse Microwave? .
> I've been looking at various solutions, as I have a similar problem.
>
> I use a Tek 7854 with dual sampling plug-ins, but these only go to 6
> GHz and downloading the data over the GPIB is painfully slow.
>
> I've looked at step-recovery diodes driving a sampling bridge, but
> the commercial ones are extremely sensitive to ESD.
>
> This would not last long in the rough-and-tumble debugging sessions
> I go through.
>
> The fastest ecl logic device I can find only goes to 3 Ghz, which is
> probably not fast enough to catch a 35 ps edge.
Since my requirement isn't for absolute timing (1 nSec is OK) but mainly
for progressive height analysis, and since the signal tends to be a step
which remains at the new level for least 500pSec before the level begins
to change, a ramp-biased ECLPS Plus latch may do the trick for me. Bill
Sloman also mentioned a 1 nSec Maxim latched ECL comparator as a
possibility. Either of these parts should hopefully contribute less than
100pSec timing jitter, maybe as low as 20pSec?
At the moment I'm pondering which is better - a fast scan in the X (delay
time) direction which triggers the latch and a slow scan in the Y
(amplitude) which ramps the amplitude comparison, or vice versa. Somehow I
feel that the delay time will have more random variation in the long term,
so I should make this the fast variable - 5000 "steps" of 20pSec amplitude
(not even hoping for monotonic, but who knows?) at a 50kHz rate to give a
0-100nSec delay in 100mSec). This would be done for each of 600 amplitude
comparison levels (using a 10-bit DAC), to get a "raster" of 3 million
stored points in 1 minute. Luckily, the target is normally stable for
minutes or even hours, so this is feasible. Selective fast scanning of
important areas will be an option eventually, along with data reduction
before transmission to the monitoring center - minor details if only the
basic measurement works!
Good luck on your project and thanks for the info,
Gerry
Bill Sloman
Bill Sloman <bill_...@my-deja.com> wrote:
<snip>
> Sergio Cova recently published a circuit for driving a single photon
> (Geiger-mode) avalanche photo-diode detector using some variant of
> the 685 - I think it was the Analog Devices AD99685 - which exploited
> the latch function. He found that very narrow "unlatch" pulses inter-
> acted with the input signal, as you might expect, and he used a
> relatively wide pulse (from my point of view). I think the paper was
> in Review of Scientific Instruments, and I'll wander over to the
> Melbourne University Physics Library to see if I can find it.
"True constant fraction trigger circuit for picosecond photon timing
with ultrafast microchannel plate photomultipliers" Rev. Sci. Instrum.
volume 68 pages 2228-37 (1997). Pity I forgot to write down the rest of
the authors.
They prefer the Plessey SP 9685 to the Analog Devices part. The single
photon avalanche photo-diode detector paper was earlier, and might have
been in Applied Optics or Rev. Sci. Instrum. Worth digging out and
reading if you are interested in that sort of stuff.
--
Bill Sloman, Nijmegen
Joseph H Allen
Gerry Schneider <ge...@ympatico.ca> wrote:
>m_mo...@my-deja.com wrote:
>> Sounds like you are partway there. How are you generating the 35 ps
>> signals?
>A 1-1.5 nSec edge from 74AC logic driving an SRD. I've yet to verify the
>edge time (I know it's faster than 1nSec) - need to take a trip to an old
>client with lots of test equipment bucks!
>Since my requirement isn't for absolute timing (1 nSec is OK) but mainly
>for progressive height analysis, and since the signal tends to be a step
>which remains at the new level for least 500pSec before the level begins
>to change, a ramp-biased ECLPS Plus latch may do the trick for me. Bill
>Sloman also mentioned a 1 nSec Maxim latched ECL comparator as a
>possibility. Either of these parts should hopefully contribute less than
>100pSec timing jitter, maybe as low as 20pSec?
Take a look at AD9500 for the time delay generator. It is a single-chip
ramp+comparitor+8-bit DAC with 10ps resolution & jitter when used at 2.5ns
full-scale. You could try two of them in series for 100ns, but with worse
jitter, or maybe use some digital solution- use a counter clocked at 400MHz
to generate the trigger for this and your radar pulse.
I don't see jitter specs on the the AD96685 2.5ns comparitor, so perhaps it
is not speced on the Maxim part either. If this uses the same technology as
the AD9500, I would expect the jitter to also be 10ps (or less since it's
simpler).
I wonder if there is some kind of non-linear analog time-stretching delay
device which could help with this problem... perhaps something with group
delay varying along its length...
--
/* jha...@world.std.com (192.74.137.5) */ /* Joseph H. Allen */
int a[1817];main(z,p,q,r){for(p=80;q+p-80;p-=2*a[p])for(z=9;z--;)q=3&(r=time(0)
+r*57)/7,q=q?q-1?q-2?1-p%79?-1:0:p%79-77?1:0:p<1659?79:0:p>158?-79:0,q?!a[p+q*2
]?a[p+=a[p+=q]=q]=q:0:0;for(;q++-1817;)printf(q%79?"%c":"%c\n"," #"[!a[q-1]]);}
Mike Monett
<..>
> "True constant fraction trigger circuit for picosecond photon timing
> with ultrafast microchannel plate photomultipliers" Rev. Sci. Instrum.
> volume 68 pages 2228-37 (1997). Pity I forgot to write down the rest of
> the authors.
>
> They prefer the Plessey SP 9685 to the Analog Devices part. The single
> photon avalanche photo-diode detector paper was earlier, and might have
> been in Applied Optics or Rev. Sci. Instrum. Worth digging out and
> reading if you are interested in that sort of stuff.
>
> Bill Sloman, Nijmegen
Bill,
The minimum latch enable, or strobe, for the AD96685 is spec'd at
2.0 ns. This does not seem suited for measuring picosecond
risetimes.
Sure, you can push the spec and get it to work with narrower
strobes, but there has to be a point where it no longer functions as
a latch. I doubt it would reach the sub-100 ps range.
Do the authors use the 9685 merely to gate out noise, or is it
actually part of a circuit that measures the risetime of a fast
pulse?
If so, how fast are the risetimes, and what tricks do they use to
overcome the minimum strobe width specification?
Best Regards,
Michael R. Monett
mailto:mkmo...@hotmail.com
Mike Monett
<...>
> As an example they deal with a 700ps input pulse width, and they don't
> violate the minimum strobe width. So if you're looking for some secret 9685
> parameter that the government doesn't want you to know about then you're out
> of luck here. Have I been vague enough?
> <g><g><g> to you too!
Well, Robert, that was a very excellent reply, and you didn't reveal any
military secrets. I guess I'll have to try to get a copy of the article
to see.
Robert
fraction trigger [ CFT] circuit for precise resolution of time-of-arrival
(TOA)of the photon. The application of the comparator is common-place. The idea
behind the CFT is that the trigger circuit accepts a relatively large range of
input pulse amplitudes and triggers at the same percentage point on the pulse
rise- usually the 50% point- for each pulse. This is done by using the input
pulse and a delayed version of the input pulse to drive a differential input
comparator. There are problems involving triggering due to noise with no pulse
present and handling DC bias errors which skew the measurement. In this
particular paper the basic architecture of the CFT is modified by driving the
differential comparator with 1) the original pulse delayed, 2) a linear pulse
stretcher version of the input pulse, and 3) a strobe to the comparator LE. The
authors claim that the resulting error in TOA estimate is within 8ps over a 1:14
input amplitude range and 25ps over a 1:20 amplitude range. So you see that the
purpose of their circuit is to minimize the TOA error as a function of input
pulse amplitude. The use of the SP9685 is quite ordinary as the stretching and
delays allowed a 20ns LE strobe and it was selected on the basis of slightly
superior Tpd invariance with input overdrive - even though their circuit is not
particularly sensitive to this parameter as they go on to state-in addition to
the obvious requirement that the output can follow a subnanosecond input pulse
when unlatched. If this is what you think is needed then the paper will be useful
as it includes detailed circuit diagrams and waveforms as well as an excellent
explanation of the design.
Good Luck, -Robert :)
Robert wrote:
> Mike,
>
> Mike Monett wrote:
>
> >
> >
> > Bill,
> >
> > The minimum latch enable, or strobe, for the AD96685 is spec'd at
> > 2.0 ns. This does not seem suited for measuring picosecond
> > risetimes.
>
> Well it is suited for this purpose and they did not select this part for a
> minimum LE strobe width; it was selected for an entirely different reason. In
> fact, the authors state that their experience with this part is that the
> Latch Enable requires 15ns strobes for reliable operation and go on to design
> their circuit using 20ns for good measure. Go figure that one out [ hint: the
> answer is in the title ].
>
> > Sure, you can push the spec and get it to work with narrower
> > strobes, but there has to be a point where it no longer functions as
> > a latch. I doubt it would reach the sub-100 ps range.
>
> Yes- you're right about that.
>
> > Do the authors use the 9685 merely to gate out noise, or is it
> > actually part of a circuit that measures the risetime of a fast
> > pulse?
>
> Yes and no.
>
> >
> > If so, how fast are the risetimes, and what tricks do they use to
> > overcome the minimum strobe width specification?
>
Robert
assumption about the particular pulse shape (roughly) the CFT will be dealing with.
Pulse shaping for optimum equivalent noise charge, Campbell's Theorem, and invariance
of some parameter with respect to another such as Tpd relative to amplitude, comprise
a well developed area in particle counting applications. If you do use this circuit
then this will be a consideration as it cannot handle everything like a general
purpose sampler and there will be restrictions on input pulse duration that are fixed
by the delay lines..
Gerry Schneider
paper (from Canada)? Is there a web supplier?
Cheers,
Gerry
Mike Monett
<... to save bandwidth>
Robert,
Thank you for the information. Once you defined the term CFT, I was
able to find many links on the web. One example is for the LeCroy
Model 3420 CAMAC Constant Fraction Discriminator, at
http://www.lecroy.com/lrs/dsheets/3420.htm
The basic requirement sounds similar to the problem of
peak-detection used in the old MFM hard disk drives (and 1.44Meg
floppies.)
One complication is we had to detect pulses of either polarity, and
discriminate against extraneous pulses caused by defects or
shouldering in low-frequency data patterns.
We also needed accurate measurements of the zero crossing despite
large variations in signal amplitude, for example during a long,
gradual disk defect. I believe the comparable CFT term is "time
walk".
There are numerous solutions to the problem - some work better than
others. But the industry eliminated the need for differentiation and
the resulting degradation in snr when it adopted PRML read channels.
Bill Sloman
Mike Monett <mkmo...@hotmail.com> wrote in article
<387CF1...@hotmail.com>...
> Bill Sloman wrote:
>
> <..>
>
>
> > "True constant fraction trigger circuit for picosecond photon timing
> > with ultrafast microchannel plate photomultipliers" Rev. Sci. Instrum.
> > volume 68 pages 2228-37 (1997). Pity I forgot to write down the rest of
> > the authors.
M.Ghioni, S. Cova, C. Samori and F.Zappa
> > They prefer the Plessey SP 9685 to the Analog Devices part. The single
> > photon avalanche photo-diode detector paper was earlier, and might have
> > been in Applied Optics or Rev. Sci. Instrum. Worth digging out and
> > reading if you are interested in that sort of stuff.
> >
> > Bill Sloman, Nijmegen
>
> Bill,
>
> The minimum latch enable, or strobe, for the AD96685 is spec'd at
> 2.0 ns. This does not seem suited for measuring picosecond
> risetimes.
>
> Sure, you can push the spec and get it to work with narrower
> strobes, but there has to be a point where it no longer functions as
> a latch. I doubt it would reach the sub-100 ps range.
The 2nsec minimum latch width is the minimum for which the
manufacturer guarantees the performance of every part.
I wasn't talking about the width of the pulse you have to apply
to the latch input in order to guarantee that the latch condition is
released, but about the minimum time unlatched time - 500psec
- I'd seen with the original Am685 6nsec propagation delay latch.
One might hope that more recent version sof the part might offer
a narrower window.
> Do the authors use the 9685 merely to gate out noise, or is it
> actually part of a circuit that measures the risetime of a fast
> pulse?
As the title of the paper says, the application is in a constant fraction
discriminator. The latch input on the comparator that generates the
amplitude-independent signal is used to disable this comparator in the
absence of a pulse - it isn't in the critical timing path
> If so, how fast are the risetimes, and what tricks do they use to
> overcome the minimum strobe width specification?
In fact they used a rather wide stobe pulse - 10 to 15nsec - to avoid
influencing the action of the input stage as a comparator, more or
less as I mentioned in my original response.
The circuit is actually used to look at pulse with a 700psec full
width at half max (IIRR) and teh author's claim an
amplitude-dependent walk of about 8psec over a 14:1
range of pulse heights.
I'd be a bit nervous about using even an SP9687 on a pulse
much narrower than 700psec - my guess is that the gain
rolls off rapidly (18dB per octave) above something like
700MHz, and narrower pulses would just vanish.
A trick with this sort of circuit it to walk the 2nsec wide
unlatch window across the pulse you are detecting - something
like the MC100E195 or MC100E196 can be used to move the
position of the unlatch pulse in increments of 20psec or less -
which makes the comparator a crude sample and hold.
Repeat the exercise with a range of voltages on the reference
input of the comparator, and you have a rather less crude
picture of the pulse.
There is a fair amount of published literature on this sort
of work.
Bill Sloman, Nijmegen
John Larkin
<add.aut...@sympatico.ca> wrote:
|J
| John,
|
| You mentioned using a tunnel diode as a sampler in your high school
| project. This may be the only solution that is fast enough and
| rugged enough for ordinary lab use.
|
| Can you explain how you can sample a signal using a tunnel diode?
|
|Best Regards,
|
|Michael R. Monett
|mailto:add.aut...@sympatico.ca
Michael,
the TD thing was also a slideback sampler. The input signal is applied
to one TD (D1) through a resistor, along with some DC bias and a
capacitor connected to a second TD, D2. The delayed timebase switches
D2 into its high stste, and that injects a short current pulse into
D1, which switches or not, depending on the sum of the input and bias
currents. The TDs are reset and the DC bias on D1 is adjusted stepwise
depending on the outcome of the prievious pulse... just like the
comparator thing.
One minor glitch is that nobody makes TDs any more. Germanium Power
Devices used to make the old GE line, but I think they finally gave it
up (the fabrication scheme was incredible). The few 'tunnel diodes'
being made these days are actually back diodes, good RF detectors but
useless as switches.
John Larkin
wrote:
|January 11, 2000
| Best Regards,
|
| Michael R. Monett
| mailto:mkmo...@hotmail.com
Mike,
the slideback/feedback sampler does indeed drive the comparator device
toward its metastability point. The comparator can be an actual
strobed ECL comparator, or better yet a D-type flipflop (a
differential-input EclipsPlus would be ideal here... input signal on
one D input, DC servo feedback on the other). Has ON released the EP51
yet?
I think it's probably best to use an up/down feedback correction
scheme (up/down counter+feedback DAC) for the servo feedback, take
lots of shots at each delay setting, and sweep the timebase delay
slowly. This system automatically servos the flipflop to its 50%
probability point.
I think timebase jitter just reduces the effective risetime of the
system, so you really want as little jitter as possible. A simple
capacitor/current source ramp driving a good comparator can get close
to 1 ps RMS jitter for a 50 ns sweep if you're real careful.
The only constraint on the input signal is that it stay within the
common-mode range of the comparator (or flipflop). There's no
consideration of setup/hold, when we're intentionally trying to annoy
the flipflop!
Send me a picture if it works!
Joe
jjla...@highlandSnipSniptechnology.com "John Larkin" writes:
>|J
>| John,
>|
>| You mentioned using a tunnel diode as a sampler in your high school
>| project. This may be the only solution that is fast enough and
.. if you are prepared to use Q switched laser techniques, femto-second
control can be achieved - for techniques
look at http://www.stellar.demon.co.uk/stellar.htm (err... the subject
in that page is different from the topic discussed although
technique may be valid).
o------------> http://www.stellar.demon.co.uk <------------o
: Digital Matter Control Ultra-Science Web Site :
The future is bright
*------ Read it all before making judgements -------*
m_mo...@hotmail.com
m_mo...@my-deja.com wrote:
> In article <38778048...@sympatico.ca>,
> Gerry Schneider <ger...@sympatico.ca> wrote:
> > Hi all, here's hoping somebody has a bit of sage
> > wisdom.
> >
> > I'm fairly familiar with nanosecond design and
> > pitfalls, but now I've let myself get talked into a
> > TDR-style application that requires sub-100 picosecond
> > generation and detection. The first is OK - I've been
> > experimenting and actually getting decent results,
> > thanks in a large part to the on-going 100pSec thread
> > on this group (tip of the hat to all the real experts
> > out there!). But how the heck do you detect (and
> > store) a pattern of smallish 35pSec edges in a 100nSec
> > time period? Nice thing is they're totally repetitive,
>
> [...]
>
> > Cheers,
> >
> > Gerry
>
> Gerry,
<...>
> So, I don't have a solution for you.
On the other hand, maybe I do. Check out the page I just posted at
http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
Let me know what you think.
Mike Monett
mailto:mkmo...@hotmail.com
Sent via Deja.com http://www.deja.com/
Before you buy.
John Devereux
m_mo...@hotmail.com wrote:
>> So, I don't have a solution for you.
>
>On the other hand, maybe I do. Check out the page I just posted at
>
>http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
>
>Let me know what you think.
>
> Mike Monett
> mailto:mkmo...@hotmail.com
Great stuff. Its makes me want to build one, even
though I have absolutely no use for it :) Thanks
for taking the trouble to write it up.
-- John Devereux
Gerry Schneider
m_mo...@hotmail.com wrote:
> On the other hand, maybe I do. Check out the page I just posted at
>
> http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
>
> Let me know what you think.
>
> Mike Monett
> mailto:mkmo...@hotmail.com
Thanks, Mike, great job! This is very similar to what I'm currently
breadboarding using a latched ECL comparator (suggested by Bill
Sloman), actually as soon as Maxim delivers the samples. The
trigger/delay circuit appears to be the most critical block, haven't
got a good design for one yet. I'm currently reviewing the CFT
(constant fraction trigger) information that was discussed as part of
this thread to see if that'll help. BTW, I'll be adding a "DVM" loop
to the circuit, which will be used to track the absolute voltage value
during a forced zero input, in an attempt to compensate for the offset
drift of the front end; something similar could be used to accomodate
the imprecise threshold of the "D" input.
Cheers,
Gerry
Robert
m_mo...@hotmail.com wrote:
> On the other hand, maybe I do. Check out the page I just posted at
>
> http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
>
> Let me know what you think.
>
> Mike Monett
> mailto:mkmo...@hotmail.com
Mike, Have you compared your linear feedback approach to the
conventional sampler using the FF outputs for a counter up/ down
control with counter driving DAC driving feedback to FF input summer?
This may have several advantages:
1) counter contains digitized output;
2) probability of metastability is vastly reduced to coincidence with
a finite number of discrete values rather than actively sought out as
in linear case;
3) eliminates high speed analog circuit effects such as FF propagation
delay skew, coupling through the LPF parasitic capacitances, finite
ESL of caps, input feedthrough to error amp output, and probably lots
of yet-to-be-discovered stuff.
4)provides some control over allowing FF output to settle before
clocking counter-DAC combo further stabilizing circuit operation.
...maybe plenty more advantages.
Please keep us posted. This is a nice project and when you've
conquered this, we can move on to the programmable gain front end.
Good Luck, -Robert
m_mo...@my-deja.com
John Devereux <jo...@devereux.demon.co.uk> wrote:
> On Sun, 16 Jan 2000 04:18:01 GMT,
> m_mo...@hotmail.com wrote:
>
> >> So, I don't have a solution for you.
> >
> >
> >http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
> >
> >Let me know what you think.
> >
> > Mike Monett
> > mailto:mkmo...@hotmail.com
>
> though I have absolutely no use for it :) Thanks
> for taking the trouble to write it up.
>
> -- John Devereux
>
> jo...@devereux.demon.co.uk
>
Thanks John - that made my day!
I tried updating the section on metastability, but the file got trashed. We
are experiencing high winds, which must be playing havoc with the dish
alignment on the microwave towers.
I put a mirror at
http://www3.sympatico.ca/add.automation/circuits/hfsamp.htm
and will fix the geocopies version after the winds die down.
I can see other related postings, but I cannot retrieve them. I'll try later
when the weather settles.
Best Regards,
Mike Monett
John Larkin
|
|
|m_mo...@hotmail.com wrote:
|
|> On the other hand, maybe I do. Check out the page I just posted at
|>
|> http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
|>
|> Let me know what you think.
|>
|> Mike Monett
|> mailto:mkmo...@hotmail.com
|
|Mike, Have you compared your linear feedback approach to the
|conventional sampler using the FF outputs for a counter up/ down
|control with counter driving DAC driving feedback to FF input summer?
|This may have several advantages:
|1) counter contains digitized output;
|2) probability of metastability is vastly reduced to coincidence with
|a finite number of discrete values rather than actively sought out as
|in linear case;
|3) eliminates high speed analog circuit effects such as FF propagation
|delay skew, coupling through the LPF parasitic capacitances, finite
|ESL of caps, input feedthrough to error amp output, and probably lots
|of yet-to-be-discovered stuff.
|4)provides some control over allowing FF output to settle before
|clocking counter-DAC combo further stabilizing circuit operation.
|...maybe plenty more advantages.
|Please keep us posted. This is a nice project and when you've
|conquered this, we can move on to the programmable gain front end.
|
|
|Good Luck, -Robert
|
Mike,
Robert has a good point. In your circuit, the amount of feedback
depends on the RC filtering time constants versus the realtime trigger
rate, so it only works well (and simulates well!) at one trigger rate.
I think the feedback should be quantized, at a fixed, constant step
size, to make this a general-purpose gadget. The up/down counter way
does this, and gives you a free digital output.
The whole thing is, actually, an equivalent-time delta-sigma ADC!
John Larkin
wrote:
|From what i see, the only limit is that the triggering point is advanced
|*slowly* over the waveform being measured, so that the RC timeconstants
|don't show any noticeable lag effects. When measuring signals in the GHz
|range and getting outputs in the kHz range, this shouldn't be a problem.
|
Russel,
(We are referring to Mike's website circuit): consider a slow realtime
trigger rate. The opamp output is driven, for a *long* time now, by
the differential Q/~Q flipflop outputs, so the opamp slams
rail-to-rail. This is not good.
John
-----------------
"If anybody ever marries you, it will be for the pleasure
of hearing you talk piffle," said Harriet, severely.
russell shaw
*slowly* over the waveform being measured, so that the RC timeconstants
don't show any noticeable lag effects. When measuring signals in the GHz
range and getting outputs in the kHz range, this shouldn't be a problem.
John Larkin wrote:
>
> Robert has a good point. In your circuit, the amount of feedback
> depends on the RC filtering time constants versus the realtime trigger
> rate, so it only works well (and simulates well!) at one trigger rate.
> I think the feedback should be quantized, at a fixed, constant step
> size, to make this a general-purpose gadget. The up/down counter way
> does this, and gives you a free digital output.
>
> The whole thing is, actually, an equivalent-time delta-sigma ADC!
>
> John
>
> ==
>
> A little nonsense now and then,
> is cherished by the wisest men.
>
> - Willy Wonka
--
*******************************************
* Russell Shaw, B.Eng, M.Eng(Research) *
* Electronics Consultant *
* email: rus...@webaxs.net *
* Australia *
*******************************************
Win Hill
>
> In article <85eq60$mj3$1...@nnrp1.deja.com>,
> m_mo...@my-deja.com wrote:
>> In article <38778048...@sympatico.ca>,
>> Gerry Schneider <ger...@sympatico.ca> wrote:
>>>
>>> ... But how the heck do you detect (and store) a pattern of
>>> smallish 35pSec edges in a 100nSec time period? Nice thing
>>
>> So, I don't have a solution for you.
>
>
> http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
>
> Let me know what you think.
>
> Mike Monett
> mailto:mkmo...@hotmail.com
"A Simple, High-Performance Sampler" by Michael R. Monett, January 15,
2000 ... Very nice indeed.
A TDR app generates its own clock. But the rest of us need "A Simple,
High-Performance Trigger" to run your sampler.
How about it Mike?
- Win
Winfield Hill
Rowland Institute for Science
100 Edwin Land Blvd
Cambridge, MA 02142-1297
Mike Monett
<...>
> "A Simple, High-Performance Sampler" by Michael R. Monett, January 15,
> 2000 ... Very nice indeed.
>
> A TDR app generates its own clock. But the rest of us need "A Simple,
> High-Performance Trigger" to run your sampler.
>
> How about it Mike?
> - Win
>
> Winfield Hill
> Rowland Institute for Science
> 100 Edwin Land Blvd
> Cambridge, MA 02142-1297
Win,
Thanks for the delightful comment. Coming from you, that is pure
gold.
Triggering from a noisy arbitrary waveform is not easy, as you well
know. The only thing I can think of right now is to take my Tek
sampling scope apart again and see how they do it. If you or anyone
else has any good ideas, I'd sure like to hear them.
Actually, I wasn't quite ready for you to look at this yet, Win. The
metastability issue took a lot more time to think through, but I
think I finally got it sorted out, and have revised that section. I
also added sections on the triggering circuit and smoothing.
The Geocities site seems to be the only one working this morning, so
the latest version is available at
http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
Mike Monett
<...>
> Russel,
>
> (We are referring to Mike's website circuit): consider a slow realtime
> trigger rate. The opamp output is driven, for a *long* time now, by
> the differential Q/~Q flipflop outputs, so the opamp slams
> rail-to-rail. This is not good.
>
> John
John,
Are you certain? I'm not sure how anyone could come to that
conclusion. The loop constrains the output error to be within
one/half the ripple voltage at all times, except when you are
sweeping though the waveform too fast and exceed the slew rate.
Take another look at the circuit. The waveforms in Figure 3
illustrate a similar condition. See how the loop follows the sine
wave through the sine wave on both sides of the zero crossing.
You can sweep through the waveform as slow as you like, and even
stop at any point. The circuit responds down to dc.
As I mentioned in a reply to Win's post, I have updated the section
on metastability and added sections on triggering and smoothing. You
can view the latest version at
Mike Monett
> Take another look at the circuit. The waveforms in Figure 3
> illustrate a similar condition. See how the loop follows the sine
> wave through the sine wave on both sides of the zero crossing.
This should read:
Take another look at the circuit. The waveforms in Figure 3
illustrate a similar condition. See how the loop follows the sine
wave on both sides of the zero crossing.
Best Regards,
Chuck Parsons
m_mo...@hotmail.com wrote:
>
> On the other hand, maybe I do. Check out the page I just posted at
>
> http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
>
> Let me know what you think.
>
Very nice Mike.
Can someone say a few words or give a pointer on sampling bridges?
I infer these are used in high speed scopes. How do they work?
Do they require the control pulse width to equal the sample interval, or
just the trailing/leading (pick one) edge to be in the right place?
Chuck
Mike Monett
>
> From what i see, the only limit is that the triggering point is advanced
> *slowly* over the waveform being measured, so that the RC timeconstants
> don't show any noticeable lag effects. When measuring signals in the GHz
> range and getting outputs in the kHz range, this shouldn't be a problem.
> *******************************************
> * Russell Shaw, B.Eng, M.Eng(Research) *
> * Electronics Consultant *
> * email: rus...@webaxs.net *
> * Australia *
> *******************************************
Hi Russel,
Yes, you are correct. The idea is to clock the 'D' flop at as high a
rate as permitted by the recovery time of the variable delay
circuit. This gives the shortest time to acquire each data point.
For example, the AD9500 has a maximum repletion rate of 60 MHz. If
1,000 samples are averaged for each data point, the throughput is
60K samples/sec.
From what I see, the only problem is to avoid exceeding the slew
rate of the loop.
The same problem exists in commercial sampling scopes, and they
require the user to choose a sweep rate consistent with the
waveforms they wish to measure.
In other words, the user is entirely responsible for this problem.
But it might be possible to detect if the flip-flop stays in one
state without switching for some period of time. This would be an
indication the slew rate has been exceeded, and the circuit could
automatically slow down through these regions of the waveform.
Ha! I don't know if Tek and HP can do that!
Mike Monett
Thanks, Chuck
I did a bit of work in sampling bridges back at Memorex in the 70's, but
didn't like them at all. They are very tricky things, and it is almost
impossible to eliminate all the second and third-order effects that
control the accuracy.
Basically, the bridge is turned on and off very fast. The voltage on the
input signal is transferred to a small capacitor as in a conventional
sample-and-hold circuit.
The capacitor must be as small as possible to avoid loading the circuit
under test, but it has to be large enough to hold the charge long enough
to read the voltage.
The stray capacity, delay and storage time effects, rise and fall time of
the sampling strobe, pulse kickback into the circuit under test, and a
host of other problems are enough to drive anyone insane.
Spehro Pefhany
> http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
> Let me know what you think.
Very interesting, Mike!
--
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
Spehro Pefhany "The Journey is the reward"
sp...@interlog.com
Fax:(905) 271-9838 (small micro system devt hw/sw + mfg)
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
Terry Harris
>John Larkin wrote:
>
><...>
>
>> Russel,
>>
>> (We are referring to Mike's website circuit): consider a slow realtime
>> trigger rate. The opamp output is driven, for a *long* time now, by
>> the differential Q/~Q flipflop outputs, so the opamp slams
>> rail-to-rail. This is not good.
>>
>> John
>
> John,
>
> Are you certain?
Well I think he is right.
>I'm not sure how anyone could come to that
> conclusion. The loop constrains the output error to be within
> one/half the ripple voltage at all times, except when you are
> sweeping though the waveform too fast and exceed the slew rate.
But thr ripple voltage depends on the RC time constants and the trigger
rate (that is trigger rate - nothing to do with sweep rate). When the
trigger rate is low enough the ripple attempts to exceed the supply rails
which as he said, 'is not good'.
Cheers Terry...
Mike Monett
Thanks, Spehro.
I'd like to continue the discussion we started before Xmas, but I got
bogged down trying to give you my credentials. Still interested?
Metastability is one tough nut to crack, but I think I finally plugged
all the loopholes. If you are interested, there is yet another attempt,
this time on both sites. I sure would appreciate your thoughts on this
problem.
The sites are
http://www3.sympatico.ca/add.automation/circuits/hfsamp.htm
http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
John Larkin
>John Larkin wrote:
>
><...>
>
>> Russel,
>>
>> (We are referring to Mike's website circuit): consider a slow realtime
>> trigger rate. The opamp output is driven, for a *long* time now, by
>> the differential Q/~Q flipflop outputs, so the opamp slams
>> rail-to-rail. This is not good.
>>
>> John
>
> John,
>
> Are you certain? I'm not sure how anyone could come to that
> conclusion. The loop constrains the output error to be within
> one/half the ripple voltage at all times, except when you are
> sweeping though the waveform too fast and exceed the slew rate.
>
> Take another look at the circuit. The waveforms in Figure 3
> illustrate a similar condition. See how the loop follows the sine
> wave through the sine wave on both sides of the zero crossing.
>
> You can sweep through the waveform as slow as you like, and even
> stop at any point. The circuit responds down to dc.
>
> As I mentioned in a reply to Win's post, I have updated the section
> on metastability and added sections on triggering and smoothing. You
> can view the latest version at
>
> http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
>
>Best Regards,
>
>Michael R. Monett
>mailto:mkmo...@hotmail.com
Mike,
I'm certain. The DC gain of the opamp is near-infinite. As the trigger rate
is reduced, the output ripple amplitude increases without limit so the opamp
eventually rails. If the trigger rate is constant (as in a TDR application)
the RCs can be optimized for that rate, but this circuit is not well suited
to general-purpose oscilloscope-type use.
I refer to the *realtime* trigger rate here, not the equivalent-time sweep
speed. Try it.
John
John Larkin
<Ch...@CatenaryScientific.com> wrote:
>
>
>m_mo...@hotmail.com wrote:
>
>>
>> On the other hand, maybe I do. Check out the page I just posted at
>>
>> http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
>>
>> Let me know what you think.
>>
>
>Very nice Mike.
>
> Can someone say a few words or give a pointer on sampling bridges?
>I infer these are used in high speed scopes. How do they work?
>Do they require the control pulse width to equal the sample interval, or
>
>just the trailing/leading (pick one) edge to be in the right place?
>
>Chuck
Chuck,
classic sampling circuits are 4-diode bridges (only good to 1 ghz or so) and
2-diode halfbridges (into the 10's of ghz) and 6-diode traveling-wave
samplers, also good to 10's of ghz. Tektronix published a very good
'Concepts Series' book on samplers which discusses them all, and you can
sometimes find a copy on e-bay.
The 2 and 4-diode samplers are driven by short bipolar impulses which
briefly turn the diodes on, so they need very narrow strobe pulses. The
6-diode sampler only relies on the turnoff edge to determine speed.
Both the 2 and 6-diode samplers have problems with capacitive feedthrough
('blowby') which must be compensated for.
Old Tektronix manuals are good to study here: 1S1, 1S2, S1, S2, S3, 7S14,
stuff like that.
John
Boris Mohar
wrote:
>Hi all, here's hoping somebody has a bit of sage
>wisdom.
>
>I'm fairly familiar with nanosecond design and
>pitfalls, but now I've let myself get talked into a
>TDR-style application that requires sub-100 picosecond
Did anybody try using two high speed photo diodes and triggering them with a
short laser pulse? Would a turn off be a problem?
Boris Mohar
russell shaw
then there will be a large ripple effect. By this time, the input frequency
will be in the kHz range, so one could switch the signal directly thru to
the deflection circuits.
John Larkin wrote:
>
> On Mon, 17 Jan 2000 13:29:18 +1100, russell shaw <rus...@webaxs.net>
> wrote:
>
> |From what i see, the only limit is that the triggering point is advanced
> |*slowly* over the waveform being measured, so that the RC timeconstants
> |don't show any noticeable lag effects. When measuring signals in the GHz
> |range and getting outputs in the kHz range, this shouldn't be a problem.
> |
>
> Russel,
>
> (We are referring to Mike's website circuit): consider a slow realtime
> trigger rate. The opamp output is driven, for a *long* time now, by
> the differential Q/~Q flipflop outputs, so the opamp slams
> rail-to-rail. This is not good.
>
> John
>
> -----------------
>
> "If anybody ever marries you, it will be for the pleasure
> of hearing you talk piffle," said Harriet, severely.
--
russell shaw
external sweeper gen. Anyway, i had a look in an old sampler head
(it had two N connector inputs). The diode bridges consisted of
two diodes mounted from the wall of solid line (line same diameter
as type N connector, with the type-N thread on the end) to the
center conductor. The diodes were driven with a balun thing (which
i couldn't see) from a single-ended srd pulse generator.
The srd pulse gen. was really simple. Simply a few 10s or 100s of MHz
high level rf driving the diode which creates fast edges on a piece of
sheetmetal overlaying a microstrip line. There was some mica (or something)
dielectric between the diode and line (only a fraction of pf probably).
The idea is that this is a series cap and shunt 25ohm (50ohm line in
both directions) resistance which forms a differentiator. The output
is thus narrow spikes, travelling left and right away from the diode
to the two samplers on each end of the line. Some small series resistors
in the line were dampeners. Old gear is worth getting to see this kind
of stuff.
IIRC, sampler bridges often have DC feedback from the captured output,
to make the bias voltages of the bridge follow the signal. I'm not sure
of the details of why its done. Tektronix put out a series of books on
sampling cros which are worth seeing.
Chuck Parsons wrote:
>
> m_mo...@hotmail.com wrote:
>
> >
> > On the other hand, maybe I do. Check out the page I just posted at
> >
> > http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
> >
> > Let me know what you think.
> >
>
> Very nice Mike.
>
> Can someone say a few words or give a pointer on sampling bridges?
> I infer these are used in high speed scopes. How do they work?
> Do they require the control pulse width to equal the sample interval, or
>
> just the trailing/leading (pick one) edge to be in the right place?
>
> Chuck
--
russell shaw
An RS flip-flop is initially held in its reset state. A command pulse
enables the rsff to be triggered by the trigger signal amplifier. The
rsff gets set by a trigger and turns on an rc ramp generator. The ramp.
gen. crosses the thresh-hold of a comparator whose reference is set by
a capacitor stair-case generator. The comparator switches and drives the
sampler bridge pulse gen. A sample is thus captured. The switched comparator
also 'jumps' the staircase reference up a notch (this could also be done
with a counter and dac). The rsff is reset and the ramp.gen. is reset.
The captured signal (held in a sample/hold cap) is fed back to the sampler
bridge, so that when it is triggered, the signal input voltage is always
near the same point relative to the bridge. This minimizes nonlinearities
and keeps the bridge impedance (that the pulse gen sees) constant etc.
The cro trace x axis is the staircase value, and the captured signal is
the y axis.
Because the D flip-flop sampler is not a single-shot sampler, but requires
many samples to do averaging, the staircase granualarity would need to be
much finer so that the sampling point is swept much slower over the input
signal period.
Instead of a staircase reference, another timed ramp gen. could also be
used.
Win Hill wrote:
>
> > On the other hand, maybe I do. Check out the page I just posted at
> >
> > http://www.geocities.com/Athens/Atlantis/1798/circuits/hfsamp.htm
> >
> > Let me know what you think.
> >
> > Mike Monett
> > mailto:mkmo...@hotmail.com
>
> "A Simple, High-Performance Sampler" by Michael R. Monett, January 15,
> 2000 ... Very nice indeed.
>
> A TDR app generates its own clock. But the rest of us need "A Simple,
> High-Performance Trigger" to run your sampler.
>
> How about it Mike?
> - Win
>
> Winfield Hill
> Rowland Institute for Science
> 100 Edwin Land Blvd
> Cambridge, MA 02142-1297
--
Mike Monett
<...>
> But thr ripple voltage depends on the RC time constants and the trigger
> rate (that is trigger rate - nothing to do with sweep rate). When the
> trigger rate is low enough the ripple attempts to exceed the supply rails
> which as he said, 'is not good'.
>
> Cheers Terry...
Terry,
In normal operation, you want to keep the clock rate as high as possible
to reduce the time required to take each sample. The maximum rate depends
on how long it takes the variable delay circuit to recover after each
clock pulse.
The AD9500 has a maximum repetition rate of 60 MHz. We would want to try
to stay reasonably close to that figure.
If there is no input signal and no clock, the output will rail. But we
are not measuring anything then. The same problem occurs in conventional
sampling scopes. With no trigger, the trace disappears.
We could add a "keep-alive" clock just to display a trace on the scope,
but more likely, the output would go to an a/d for transfer to a pc.
Terry Harris
>Yes, if the triggering rate is below the opamp filter cutoff frequency,
>then there will be a large ripple effect. By this time, the input frequency
>will be in the kHz range, so one could switch the signal directly thru to
>the deflection circuits.
One could if it were a kHz range sinewave, one wouldn't see much if it were
a 500ps spike with a kHz range repetition rate.
Cheers Terry...
Chuck Parsons
Boris Mohar wrote:
I general (to first order) this will tell you the amplitude of the
laser pulse not the applied signal. X photons produce 0.6X charge
pairs...
If you saturate the diode at low voltage turnoff times will somewhat
worse than a schotcky diode. ;-)
That means if you stick a resistor in to limit the current the charge pairs
will wait for the resistor and you will still measure the light not the applied
signal.
Chuck
m_mo...@my-deja.com
Win Hill <wh...@mediaone.net> wrote:
[...]
> "A Simple, High-Performance Sampler" by Michael R. Monett, January 15,
> 2000 ... Very nice indeed.
>
> A TDR app generates its own clock. But the rest of us need "A Simple,
> High-Performance Trigger" to run your sampler.
>
> How about it Mike?
> - Win
>
> Winfield Hill
> Rowland Institute for Science
> 100 Edwin Land Blvd
> Cambridge, MA 02142-1297
John Larkin informed me in a very nice email that a similar idea appeard in a
National Semiconductor app note in the 70's.
Perhaps the idea lay dormant for so long because a good Tek 7000-series scope
could easily outperform the TTL and early MECL of the era.
But the idea is worth investigating today if it can supply the 7 GHz
bandwidth implied by the 50 ps hold time of the EL52.
I will try to National to find the old app note and convert it to pdf so I
can attach it to the article. It would be a nice historical note.
Roy McCammon
> John Larkin informed me in a very nice email that a similar idea appeard in a
> National Semiconductor app note in the 70's.
Do you know the app note number?
Opinions expressed herein are my own and may not represent those of my employer.
John Larkin
wrote:
|On Sat, 08 Jan 2000 18:22:38 GMT, Gerry Schneider <ger...@sympatico.ca>
|wrote:
|
|>Hi all, here's hoping somebody has a bit of sage
|>wisdom.
|>
|>I'm fairly familiar with nanosecond design and
|>pitfalls, but now I've let myself get talked into a
|>TDR-style application that requires sub-100 picosecond
|
|Did anybody try using two high speed photo diodes and triggering them with a
|short laser pulse? Would a turn off be a problem?
|
| Boris Mohar
|
|
Boris,
fast photoresistors have been used as optically-gated electrical
samplers, with risetimes of a few picoseconds. Use is limited here,
because the femtosecond lasers required are big and expensive, and
because such lasers can't be triggered without lots of jitter.
HP and Tek samplers are both topping out at 50 GHz bandwidth, which is
about all anybody can use in a coaxial signal environment; it's hard
to conduct a 50 GHz signal more than a couple of inches. Experimental
2-diode samplers have been done to 200 GHz and more.
John
= = = = = = = = = = = = = =
Don't assume malice when incompetance will do.
Mike Monett
>
> m_mo...@my-deja.com wrote:
>
> > John Larkin informed me in a very nice email that a similar idea appeard in a
> > National Semiconductor app note in the 70's.
>
> Do you know the app note number?
It is not in the current listing, but I asked NatSem to see if they can
find it and email me a copy. If they can, I will post it to my web site.
Mike Monett
[..]
> Boris,
>
> fast photoresistors have been used as optically-gated electrical
> samplers, with risetimes of a few picoseconds. Use is limited here,
> because the femtosecond lasers required are big and expensive, and
> because such lasers can't be triggered without lots of jitter.
>
> HP and Tek samplers are both topping out at 50 GHz bandwidth, which is
> about all anybody can use in a coaxial signal environment; it's hard
> to conduct a 50 GHz signal more than a couple of inches. Experimental
> 2-diode samplers have been done to 200 GHz and more.
>
> John
And Schottky-Collector Resonant Tunnel Diodes can reach 0.5-2 THz.
http://penine.ece.ucsb.edu/RTDs/SRTD_part.htm
Roy McCammon
> It is not in the current listing, but I asked NatSem to see if they can
> find it and email me a copy. If they can, I will post it to my web site.
But do you have the app note number?
Some of us keep old things.
Mike Monett
>
> Mike Monett wrote:
>
>
> > It is not in the current listing, but I asked NatSem to see if they can
> > find it and email me a copy. If they can, I will post it to my web site.
>
> But do you have the app note number?
>
> Some of us keep old things.
Good point, but I don't have any information on the title, keywords,
date, author, or app number.
John only mentioned it exists. That's all the information I have.