charging the bootstrap cap

[John Larkin]

Lots of half-bridge and full-bridge mosfet gate drivers use a
bootstrap capacitor to make the necessary gate drive for the upper
n-fet. The upper-fet gate needs to swing maybe 10 volts above the
drain supply, which is generally the biggest voltage around.

But the first time the driver is enabled, the boot cap may not be
charged. And it will eventually discharge, given a long enough
positive output pulse. I've never seen a data sheet mention this.

I think I recall some driver that has a charge pump, but that's rare.

Halfway driving a fet is a good way to blow it up. I haven't done that
this week, but it is a concern.

[Lasse Langwadt Christensen]

some have UVLO on both high and low side voltage

[John Larkin]

I don't think that helps the bootstrap problem.

It does help to pull the output node down to ground with some
resistors or something... in some cases.

[Lasse Langwadt Christensen]

it stops it from trying to turn on the high side when it can't and forces you
to do the right things which is, charge the bootstrap cap before you start
switching and keep the duty cycle in a range that keeps the bootstrap cap charged

[Klaus Kragelund]

UVLO for both high and low side is essential for robust design

About the bootstrap, you always turn the low side on at startup to charge the cap. Some even apply small duty cycle to limit the inrush current

Common for bootstrapped half bridge is that 100% duty cycle is not allowed, at least not for many longer periods

--
Klaus Kragelund

[Piotr Wyderski]

John Larkin wrote:

> But the first time the driver is enabled, the boot cap may not be
> charged. And it will eventually discharge, given a long enough
> positive output pulse.

Right, but this approach is not intended for "long enough output
pulses". Use an SN6501 and a tiny trafo wound on a 6-10mm toroidal core
and there will be no low frequency limit.

> I've never seen a data sheet mention this.

Isn't it kind of obvious?

> I think I recall some driver that has a charge pump, but that's rare.

No high-performance driver I know of has this feature. SN6501 is dirt
cheap and can power more than one driver.

Best regards, Piotr

[Gerhard Hoffmann]

Am 13.01.21 um 21:52 schrieb John Larkin:

> Lots of half-bridge and full-bridge mosfet gate drivers use a
> bootstrap capacitor to make the necessary gate drive for the upper
> n-fet. The upper-fet gate needs to swing maybe 10 volts above the
> drain supply, which is generally the biggest voltage around.
>
> But the first time the driver is enabled, the boot cap may not be
> charged. And it will eventually discharge, given a long enough
> positive output pulse. I've never seen a data sheet mention this.

I had good results with these when biasing a GaASFET:

<
https://www.digikey.de/product-detail/de/vishay-semiconductor-opto-division/VOM1271T/VOM1271TTR-ND/3588700
>

A LED and some photo cells. Does not create any noise.

Gehard

[legg]

If the controller is counting on the upper driver to perform in
response to a falling charge pump voltage in a predictable way,
adding an external source could open a new can of worms.

I don't see an inhibit line . . . .

RL

[Jon Elson]

John Larkin wrote:


> I don't think that helps the bootstrap problem.
>
> It does help to pull the output node down to ground with some
> resistors or something... in some cases.

You really want the low-side transistor on when possible to keep the
bootstrap cap charged. And, then, the low-side needs to be turned on some
of the time, when the PWM is off, to keep it charged.

Jon

[jla...@highlandsniptechnology.com]

On Fri, 15 Jan 2021 18:59:41 -0600, Jon Elson <el...@pico-systems.com>
wrote:

One resistor is a lot easier than adding more logic.



--

John Larkin Highland Technology, Inc

The best designs are necessarily accidental.