"Vladimir Vassilevsky" <
nos...@nowhere.com> wrote in message
news:GKKdnT9P56jJyDvN...@giganews.com...
>> I recently had to implement a PWM LED brightness controller in an FPGA.
>> For my application I only needed 16 brightness steps, but my FPGA needs
>> a
>> timing resolution of at least 256 steps. The first non-zero brightness
>> level (i.e. step 1 in the range 0-15) only needs the LED to be on with
>> a duty cycle of 1 in 256. The last step before fully-on (i.e.
>> brightness 14
>> in the range 0-15) has a duty cycle of 217 in 256. Values in between
>> are suitably spaced in a non-linear way using a look-up-table. This
>> gives 16 brightness steps that "appear" pretty equal.
>
> Wow. FPGA for LED control. Incredible.
I know, right? I did that on a frickin' Z80, with enough cycles to spare
that I put in animations and a tone generator!
http://www.youtube.com/watch?v=_L6BNZXwMxg
(This one displaying just the intensity modulation, but the "8's" can be
scrolling text; meanwhile, a one-shot digital timer was used to generate
chiptunes.)
The exact profile used in that animation was,
wave .byte 4, 14, 28, 64, 255, 64, 28, 14 ; waviness
.byte 4, 14, 28, 64, 255, 64, 28, 14
wave2 .byte 3, 3, 10, 40, 144, 144, 40, 10 ; halfway interpolation
.byte 3, 3, 10, 40, 144, 144, 40, 10
So the full sequence was 3, 4, 10, 14, 28, 40, 64, 144, 255, and back
down, which as I recall, I approximated from an A*exp(sin(t) + 1) type
function. Obviously, the pulse width here is 0-255 out of 255, as in
Simon's case.
Tim
--
Deep Friar: a very philosophical monk.
Website:
http://seventransistorlabs.com