Google Groups no longer supports new Usenet posts or subscriptions. Historical content remains viewable.
Dismiss
Are 2N7002s somehow fragile?
228 views
Skip to first unread message
LM
Apr 9, 2015, 6:35:06 PM4/9/15
to
I have had two 2N7002 broken for no apparent reason. I used them for
shifting logic levels, and thought that they are not very critical
(until they stopped working that is). I used 100n capacitors as
shields in drain and gate.
I thought that with 2N700x you just put them in place and forgot them.
Now it seems i have to use some really large power fet. Static should
not kill those.
shifting logic levels, and thought that they are not very critical
(until they stopped working that is). I used 100n capacitors as
shields in drain and gate.
I thought that with 2N700x you just put them in place and forgot them.
Now it seems i have to use some really large power fet. Static should
not kill those.
John Larkin
Apr 9, 2015, 8:49:12 PM4/9/15
to
--
John Larkin Highland Technology, Inc
picosecond timing laser drivers and controllers
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
Phil Hobbs
Apr 9, 2015, 8:49:32 PM4/9/15
to
has no gate protection. It's great for all sorts of hi-Z tricks such as
JL's oscillating light switch, but is a bit delicate for the usual sorts
of sub-watt MOSFET jobs.
What did you do with yours?
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics
160 North State Road #203
Briarcliff Manor NY 10510
hobbs at electrooptical dot net
http://electrooptical.net
LM
Apr 10, 2015, 6:50:34 AM4/10/15
to
On Thu, 09 Apr 2015 20:49:26 -0400, Phil Hobbs
<pcdhSpamM...@electrooptical.net> wrote:
>On 4/9/2015 6:34 PM, LM wrote:
>> I have had two 2N7002 broken for no apparent reason. I used them for
>> shifting logic levels, and thought that they are not very critical
>> (until they stopped working that is). I used 100n capacitors as
>> shields in drain and gate.
>>
>> I thought that with 2N700x you just put them in place and forgot them.
>> Now it seems i have to use some really large power fet. Static should
>> not kill those.
>>
>
>Depends which kind. There's the 2N7002E, recently discontinued, which
>has no gate protection. It's great for all sorts of hi-Z tricks such as
>JL's oscillating light switch, but is a bit delicate for the usual sorts
>of sub-watt MOSFET jobs.
>
>What did you do with yours?
>
>Cheers
>
>Phil Hobbs
Mine is from NXP
<pcdhSpamM...@electrooptical.net> wrote:
>On 4/9/2015 6:34 PM, LM wrote:
>> I have had two 2N7002 broken for no apparent reason. I used them for
>> shifting logic levels, and thought that they are not very critical
>> (until they stopped working that is). I used 100n capacitors as
>> shields in drain and gate.
>>
>> I thought that with 2N700x you just put them in place and forgot them.
>> Now it seems i have to use some really large power fet. Static should
>> not kill those.
>>
>
>Depends which kind. There's the 2N7002E, recently discontinued, which
>has no gate protection. It's great for all sorts of hi-Z tricks such as
>JL's oscillating light switch, but is a bit delicate for the usual sorts
>of sub-watt MOSFET jobs.
>
>What did you do with yours?
>
>Cheers
>
>Phil Hobbs
http://www.nxp.com/products/mosfets/standard_mosfets/2N7002.html
Gate capacitance is around 30pF.
There is no mention of ESD or protection. Someone called mosfets
without gate protection as three legged fuses. Hopefully there are
some protection.
A 3.3V cpu feeds gate via 220 ohm resistance and drain is connected
12V via 10k and to a slip ring input. Both gate and drain have 100n to
ground, simplest esd protection i could think.
I am beginning to think that those fets are somewhat esd sensitive,
and they were initially broken during assembly.
Leif M
LM
Apr 10, 2015, 7:29:59 AM4/10/15
to
was a sw problem. Probably forgot to inilitialize the io port because
the processor is new to him. But I am relieved no matter what the bug
was.
Winfield Hill
Apr 10, 2015, 8:39:08 AM4/10/15
to
LM wrote...
MOSFETs do need to be treated as static-sensitive items. In the
days gone by we'd get MOSFETs in metal cans, with a wire wrapped
around them, which we'd remove after assembly, remember that?
--
Thanks,
- Win
> Phil Hobbs wrote:
>> On 4/9/2015 6:34 PM, LM wrote:
>>> I have had two 2N7002 broken for no apparent reason. I used them for
>>> shifting logic levels, and thought that they are not very critical
>>> (until they stopped working that is). I used 100n capacitors as
>>> shields in drain and gate.
>>>
>>> I thought that with 2N700x you just put them in place and forgot them.
>>> Now it seems i have to use some really large power fet. Static should
>>> not kill those.
>>
>> Depends which kind. There's the 2N7002E, recently discontinued, which
>> has no gate protection. It's great for all sorts of hi-Z tricks such as
>> JL's oscillating light switch, but is a bit delicate for the usual sorts
>> of sub-watt MOSFET jobs.
>
>> On 4/9/2015 6:34 PM, LM wrote:
>>> I have had two 2N7002 broken for no apparent reason. I used them for
>>> shifting logic levels, and thought that they are not very critical
>>> (until they stopped working that is). I used 100n capacitors as
>>> shields in drain and gate.
>>>
>>> I thought that with 2N700x you just put them in place and forgot them.
>>> Now it seems i have to use some really large power fet. Static should
>>> not kill those.
>>
>> Depends which kind. There's the 2N7002E, recently discontinued, which
>> has no gate protection. It's great for all sorts of hi-Z tricks such as
>> JL's oscillating light switch, but is a bit delicate for the usual sorts
>> of sub-watt MOSFET jobs.
>
> Mine is from NXP
> http://www.nxp.com/products/mosfets/standard_mosfets/2N7002.html
> Gate capacitance is around 30pF.
>
> There is no mention of ESD or protection. Someone called mosfets
> without gate protection as three legged fuses. Hopefully there are
> some protection.
Well, Leif reports they were OK after all, but yes, these small
> http://www.nxp.com/products/mosfets/standard_mosfets/2N7002.html
> Gate capacitance is around 30pF.
>
> There is no mention of ESD or protection. Someone called mosfets
> without gate protection as three legged fuses. Hopefully there are
> some protection.
MOSFETs do need to be treated as static-sensitive items. In the
days gone by we'd get MOSFETs in metal cans, with a wire wrapped
around them, which we'd remove after assembly, remember that?
--
Thanks,
- Win
Phil Hobbs
Apr 10, 2015, 9:19:56 AM4/10/15
to
MOSFETs are, gate protection or no gate protection.
I have some old metal can FETs (3N163) that came with tiny brass springs
wound round their leads to make them safer to handle.
There's an old rule, one of JL's faves, that says never to connect a
wire from off the board directly to silicon. (Things like voltage
regulators and big power transistors are obviously exceptions.) So a
bit of resistance and a couple of diodes on the wire to the slip ring
would probably increase robustness.
John Devereux
Apr 10, 2015, 11:32:31 AM4/10/15
to
> So a
> bit of resistance and a couple of diodes on the wire to the slip ring
> would probably increase robustness.
>
> Cheers
>
> Phil Hobbs
--
Phil Hobbs
Apr 10, 2015, 11:56:36 AM4/10/15
to
I'm a chicken.
John Larkin
Apr 10, 2015, 12:08:40 PM4/10/15
to
that connect silicon to the outside world, when I can.
I tested a few various mosfets, 2N7000s and some bigger stuff, with an
HV power supply and blown out the gates. Most die at around 70 volts.
rickman
Apr 10, 2015, 12:36:52 PM4/10/15
to
"correctly" working computer was. On the list of requirements was that
no instruction be capable of causing unrepairable damage. I asked if
that implied that repairable damage was ok?
Why does poor initialization of the I/O port cause the FETs to blow up?
--
Rick
LM
Apr 10, 2015, 1:07:17 PM4/10/15
to
may look like a blown fet.
I may sometimes accidentally believe what I am told.
What happened was something like this: We have had two blown fets.
First was when the machine was on my desk. I have seen these kind of
problems, made some of my self too. So I must have checked the io pin.
Changed the fet and thought those fets are bad. And forgot the whole
thing. (I added the capacitors for esd protection though)
When the fet broke second time, the computer was inaccessible. But now
the problem was in the sw.
I wonder what really was the problem first time.
rickman
Apr 10, 2015, 1:47:37 PM4/10/15
to
you reset the computer before making that determination? Cycled power?
If the problem survived cycling power that is a pretty impressive feat
if the FET wasn't blown. BTW, do the input ESD caps have resistors
bypassing them? If not, how does an input charge leak off? I guess
when it is connected to a signal that is not an issue, but neither is
ESD really.
Just out of curiosity, why use a FET for level shifting rather than a
BJT? Are you stepping the voltage range up or down? Does the input
swing to ground?
I just came up with a circuit that would shift an input 5V to 3V swing
to a 0V to 3V swing without any chance of going (much) above the 3.3
volt rail for the MCU. I used a PNP with an emitter resistor about half
the value of the collector resistor with the 5 volt rail as the common
point. As the input drops toward 3 volts the output rises to 3 volts.
If the input drops below 3 volts which might make the output rise above
3.5 volts, the emitter leg drops below 3.5 volts saturating the BJT
limiting the voltage on the output. To make the input robust to
voltages above the 5 volt rail I could add a diode while the BJT already
conducts for inputs below ground. This is a hard circuit to do damage to.
--
Rick
John Devereux
Apr 10, 2015, 2:07:00 PM4/10/15
to
--
John Devereux
Habib Bouaziz-Viallet
Apr 10, 2015, 2:41:05 PM4/10/15
to
On 10/04/2015 00:34, LM wrote:
> I have had two 2N7002 broken for no apparent reason.
>
> I have had two 2N7002 broken for no apparent reason.
>
> I used 100n capacitors as
> shields in drain and gate.
If FET's gates are accessible on PCB/System boundaries, it's better to
> shields in drain and gate.
provide efficient ESD protection, a capacitor Gate-Source has never been
a role for protection against ESD aggressions ... and will not be in the
future.
H.
John Larkin
Apr 10, 2015, 3:18:39 PM4/10/15
to
the gate, ESD is divided by 1000:1. 10 KV becomes 10 volts.
Many repeated zaps could accumulate voltage, which is why some
resistance to ground is a good idea, too.
--
John Larkin Highland Technology, Inc
Phil Hobbs
Apr 10, 2015, 3:54:17 PM4/10/15
to
Littelfuse (formerly Harris) SP720.
Habib Bouaziz-Viallet
Apr 10, 2015, 4:10:29 PM4/10/15
to
On 10/04/2015 21:18, John Larkin wrote:
> Why not? If a human body is 100 pF, and you put a 100 nF cap across
> the gate, ESD is divided by 1000:1. 10 KV becomes 10 volts.
Don't know about the hypothetic 100nF G-S capacitor behavior on IEC
> Why not? If a human body is 100 pF, and you put a 100 nF cap across
> the gate, ESD is divided by 1000:1. 10 KV becomes 10 volts.
61000-4-2 tests (With A discharge surge gun) and i did not want to know
more aboout it ;-) And i'm not speaking about PCB implementation ...
2n7002 Vpeak GS = 30V or something ...
I'm not a physicist, i use a efficient IEC 61000-4-2 protection (NXP)
and it is very efficient to get things working with proper PCB
implementation :-)
Habib.
John Larkin
Apr 10, 2015, 4:29:02 PM4/10/15
to
On Fri, 10 Apr 2015 15:54:13 -0400, Phil Hobbs
On our wall-wart or USB powered boxes, we generally have a polyfuse
and a unipolar TVS and a couple big ceramic caps.
and a unipolar TVS and a couple big ceramic caps.
LM
Apr 10, 2015, 5:02:34 PM4/10/15
to
On Fri, 10 Apr 2015 13:47:21 -0400, rickman <gnu...@gmail.com> wrote:
>
>I'm not totally clear on this. When the first FET appeared blown, had
>you reset the computer before making that determination? Cycled power?
> If the problem survived cycling power that is a pretty impressive feat
>if the FET wasn't blown.
I am not 100% sure because it seemed to be random error and I just
>
>I'm not totally clear on this. When the first FET appeared blown, had
>you reset the computer before making that determination? Cycled power?
> If the problem survived cycling power that is a pretty impressive feat
>if the FET wasn't blown.
forgot it, but usually it is best to check with suitable test sw if
there is some gate signal on the gate. If gate swings from 0-3.3V and
drain voltage does not change, it is a sign of hw problem.
> BTW, do the input ESD caps have resistors
>bypassing them? If not, how does an input charge leak off? I guess
>when it is connected to a signal that is not an issue, but neither is
>ESD really.
They should be have but now there "should be" always be an output to
>bypassing them? If not, how does an input charge leak off? I guess
>when it is connected to a signal that is not an issue, but neither is
>ESD really.
drive them.
>
>Just out of curiosity, why use a FET for level shifting rather than a
>BJT? Are you stepping the voltage range up or down? Does the input
>swing to ground?
Input is 0 or 3.3V. Fet gates take only dynamic current.
>Just out of curiosity, why use a FET for level shifting rather than a
>BJT? Are you stepping the voltage range up or down? Does the input
>swing to ground?
M Philbrook
Apr 10, 2015, 5:05:03 PM4/10/15
to
In article <7pcfiadpce8r93ou3...@4ax.com>,
sala...@mail.com says...
if the IO on the uC has open collectors like most do until you
initiate them to include the internal pullup/down, the gate of the
fet can be stuck floating aronnd and maybe in a damgerous zone or not
in a working zone.
Jamie
sala...@mail.com says...
initiate them to include the internal pullup/down, the gate of the
fet can be stuck floating aronnd and maybe in a damgerous zone or not
in a working zone.
Jamie
LM
Apr 10, 2015, 5:06:09 PM4/10/15
to
made of steel.
LM
Apr 10, 2015, 5:09:54 PM4/10/15
to
John Larkin
Apr 10, 2015, 6:25:16 PM4/10/15
to
for a 2N7002, especially over temperature. You might consider a "logic
level" fet.
rickman
Apr 10, 2015, 6:25:39 PM4/10/15
to
for any logic family up to and including 5 volts unless it is true CMOS.
The current needed to control a BJT can be made very, very tiny. Is
this a battery powered app?
--
Rick
dagmarg...@yahoo.com
Apr 10, 2015, 9:33:34 PM4/10/15
to
one after another building "hobby" breadboards, until I got really serious
about static control for that one part.
I was thinking about that this morning, coincidentally, as I designed a
non-critical power-up delay for a toy:
Q1
FMMT717
+4.5V >--+-----+----. .----+------------>
| | \ ^ |
| | ----- |
.-. .-. | .-.
R1 | | | |R2 | | | R4
1M | | | |10K .-. | |100K
'-' '-' | |R3 '-'
| | | |1K |
| | '-' |
| | | |
| '------+ |
| | |
| | |
| Q2 ||-' |
| 2N7002 ||<-. |
+---------||--+ |
| | |
| === |
4.7 --- |
uF --- |
| |
+--------------------'
|
.-.
R5 | |
10K | |
'-'
|
===
Cheers,
James Arthur
krw
Apr 10, 2015, 10:33:13 PM4/10/15
to
krw
Apr 10, 2015, 10:39:23 PM4/10/15
to
inductor and a couple of thousand uF. ;-)
Winfield Hill
Apr 11, 2015, 9:05:32 AM4/11/15
to
dagmarg...@yahoo.com wrote...
>+4.5V >--+-----+----. .----+------------>
> | | v / |
rearm it quickly at power-off? I fixed Q1. Could be
a p-MOS. R3 could be smaller, depending on I-load.
--
Thanks,
- Win
>
>
> The 2n7002 is *the* most static sensitive part I've ever handled.
> I blew one after another building "hobby" breadboards, until I
> got really serious about static control for that one part.
>
> I was thinking about that this morning, coincidentally, as I
> designed a non-critical power-up delay for a toy:
>
> Q1
> FMMT717 pnp
>
> The 2n7002 is *the* most static sensitive part I've ever handled.
> I blew one after another building "hobby" breadboards, until I
> got really serious about static control for that one part.
>
> I was thinking about that this morning, coincidentally, as I
> designed a non-critical power-up delay for a toy:
>
> Q1
>+4.5V >--+-----+----. .----+------------>
> | | v / |
> | | ----- |
> .-. .-. | .-.
> R1 | | | |R2 | | | R4
> 1M | | | |10K .-. | |100K
> '-' '-' | |R3 '-'
> | | | |1K |
> | | '-' |
> | | | |
> | '------+ |
> | | |
> | | |
> | Q2 ||-' |
> | 2N7002 ||<-. |
> +---------||--+ |
> | | |
> | === |
> 4.7 --- |
> uF --- |
> | |
> +--------------------'
> |
> .-.
> R5 | |
> 10K | |
> '-'
> |
> ===
>
> Cheers,
> James Arthur
Power-up delay, yes, nice! With a diode across R1 to
> .-. .-. | .-.
> R1 | | | |R2 | | | R4
> 1M | | | |10K .-. | |100K
> '-' '-' | |R3 '-'
> | | | |1K |
> | | '-' |
> | | | |
> | '------+ |
> | | |
> | | |
> | Q2 ||-' |
> | 2N7002 ||<-. |
> +---------||--+ |
> | | |
> | === |
> 4.7 --- |
> uF --- |
> | |
> +--------------------'
> |
> .-.
> R5 | |
> 10K | |
> '-'
> |
> ===
>
> Cheers,
> James Arthur
rearm it quickly at power-off? I fixed Q1. Could be
a p-MOS. R3 could be smaller, depending on I-load.
--
Thanks,
- Win
John Devereux
Apr 11, 2015, 10:14:58 AM4/11/15
to
*really* cheap. E.g. AP22802A, $0.05 each on reels. This part is so
cheap I feel I have to consider it for every power switch.
http://diodes.com/datasheets/AP22802.pdf
Controls slew-rate, current limit, thermal cutout, UVLO, logic level
enable input. 50mOhm, 2 amps. All for the price of the similarly rated
P-FET. 5V only though.
--
John Devereux
rickman
Apr 11, 2015, 2:36:47 PM4/11/15
to
V max and the internal UVLO is 2.4 max and recommended operation
conditions is down to 2.7 V. They even give specs for switch resistance
at Vin = 3.3 V. Funny, the current limit spec has a foot note
indicated, but no foot note.
--
Rick
dagmarg...@yahoo.com
Apr 11, 2015, 6:32:18 PM4/11/15
to
reel of the FMMT717's, and two reels of the 2n7002s.:-)
This is a two-off demo, so simplicity and stock were the key motivators.
A uC will do the job in real life.
John Devereux's load switch looks pretty sweet...
I hadn't intended to permit quick reset, but now that you mention it, it
might be a nice feature. Load current is perhaps 200mA peak, pulsing.
Cheers,
James Arthur
rickman
Apr 11, 2015, 9:20:54 PM4/11/15
to
for hysteresis to prevent oscillation or sensitivity to noise?
--
Rick
Tim Williams
Apr 12, 2015, 12:19:52 AM4/12/15
to
"rickman" <gnu...@gmail.com> wrote in message
news:mgch7q$2f6$1...@dont-email.me...
some dV/dt. It would be defeatable by a very large capacitive load, or a
short; but it would seem, it's not intended to be (and certainly is not
capable of) short circuit conditions for very long, so the lack of
hysteresis under that condition wouldn't seem to matter.
Personally, I'd put R2 across Q1 E-B, and maybe a 5V zener for Q2, just in
case (hey, then it's good for almost any input voltage!).
You could continue by adding more common-emitter stages to handle logic
functions (like the missing on/off / set/reset function), active current
limit, self reset and so on. (Or go out and buy the $0.02 integrated
switch version. :) )
Tim
--
Seven Transistor Labs
Electrical Engineering Consultation
Website: http://seventransistorlabs.com
news:mgch7q$2f6$1...@dont-email.me...
>>>> Q1
>>>> FMMT717 pnp
>>>> +4.5V >--+-----+----. .----+------------>
>>>> | | v / |
>>>> | | ----- |
>>>> .-. .-. | .-.
>>>> R1 | | | |R2 | | | R4
>>>> 1M | | | |10K .-. | |100K
>>>> '-' '-' | |R3 '-'
>>>> | | | |1K |
>>>> | | '-' |
>>>> | | | |
>>>> | '------+ |
>>>> | | |
>>>> | | |
>>>> | Q2 ||-' |
>>>> | 2N7002 ||<-. |
>>>> +---------||--+ |
>>>> | | |
>>>> | === |
>>>> 4.7 --- |
>>>> uF --- |
>>>> | |
>>>> +--------------------'
>>>> |
>>>> .-.
>>>> R5 | |
>>>> 10K | |
>>>> '-'
>>>> |
>>>> ===
>>>>
>
>>>> FMMT717 pnp
>>>> +4.5V >--+-----+----. .----+------------>
>>>> | | v / |
>>>> | | ----- |
>>>> .-. .-. | .-.
>>>> R1 | | | |R2 | | | R4
>>>> 1M | | | |10K .-. | |100K
>>>> '-' '-' | |R3 '-'
>>>> | | | |1K |
>>>> | | '-' |
>>>> | | | |
>>>> | '------+ |
>>>> | | |
>>>> | | |
>>>> | Q2 ||-' |
>>>> | 2N7002 ||<-. |
>>>> +---------||--+ |
>>>> | | |
>>>> | === |
>>>> 4.7 --- |
>>>> uF --- |
>>>> | |
>>>> +--------------------'
>>>> |
>>>> .-.
>>>> R5 | |
>>>> 10K | |
>>>> '-'
>>>> |
>>>> ===
>>>>
>
> Why is the pulldown resistor R4 tied to R5 rather than ground? Is this
> for hysteresis to prevent oscillation or sensitivity to noise?
Yes, R4-R5 gives 10% +FB to help everything snap on once the output sees
> for hysteresis to prevent oscillation or sensitivity to noise?
some dV/dt. It would be defeatable by a very large capacitive load, or a
short; but it would seem, it's not intended to be (and certainly is not
capable of) short circuit conditions for very long, so the lack of
hysteresis under that condition wouldn't seem to matter.
Personally, I'd put R2 across Q1 E-B, and maybe a 5V zener for Q2, just in
case (hey, then it's good for almost any input voltage!).
You could continue by adding more common-emitter stages to handle logic
functions (like the missing on/off / set/reset function), active current
limit, self reset and so on. (Or go out and buy the $0.02 integrated
switch version. :) )
Tim
--
Seven Transistor Labs
Electrical Engineering Consultation
Website: http://seventransistorlabs.com
John Devereux
Apr 12, 2015, 7:07:34 AM4/12/15
to
very useful ideal for switching 5V supplies from a 3.3V micro. I use it
e.g. to gracefully power-up off-board daughter modules in an instrument.
--
John Devereux
dagmarg...@yahoo.com
Apr 12, 2015, 9:02:24 AM4/12/15
to
On Sunday, April 12, 2015 at 12:19:52 AM UTC-4, Tim Williams wrote:
Yep. Without it the slew rates are painful.
>It would be defeatable by a very large capacitive load, or a
> short; but it would seem, it's not intended to be (and certainly is not
> capable of) short circuit conditions for very long, so the lack of
> hysteresis under that condition wouldn't seem to matter.
The main current is drawn by LEDs, so the load is pretty light until the
output hits Vf(LED).
> Personally, I'd put R2 across Q1 E-B, and maybe a 5V zener for Q2, just in
> case (hey, then it's good for almost any input voltage!).
>
> You could continue by adding more common-emitter stages to handle logic
> functions (like the missing on/off / set/reset function), active current
> limit, self reset and so on. (Or go out and buy the $0.02 integrated
> switch version. :) )
Yes,we could add all those things. But, sometimes a switch is just a switch.
Cheers,
James Arthur
>It would be defeatable by a very large capacitive load, or a
> short; but it would seem, it's not intended to be (and certainly is not
> capable of) short circuit conditions for very long, so the lack of
> hysteresis under that condition wouldn't seem to matter.
output hits Vf(LED).
> Personally, I'd put R2 across Q1 E-B, and maybe a 5V zener for Q2, just in
> case (hey, then it's good for almost any input voltage!).
>
> You could continue by adding more common-emitter stages to handle logic
> functions (like the missing on/off / set/reset function), active current
> limit, self reset and so on. (Or go out and buy the $0.02 integrated
> switch version. :) )
Cheers,
James Arthur
0 new messages