What is collector-emmiter sustaining voltage?
Adam Yudelman
Min(V) ] , as spec'd by a BJT datasheet? How does it differ from
collector-emitter breakdown voltage [alternately given by VCEO(sus)
Max(V) ], and what parameters affect it?
Am I correct in assuming that VCEO is collector-emitter voltage with an
open (floating) base?
Adam
Arthur Harrison
voltage that a bipolar junction transistor will sustain from the collector
to emitter, indefinitely, with the base not connected. This is usually
specified at 25 degrees C, and can be affected by temperature.
-Art
"Adam Yudelman" <yude...@home.com> wrote in message
news:U9q47.190849$Mf5.51...@news3.rdc1.on.home.com...
Watson A.Name
The RCA manual says that :
"As the resistance in the base-to-emitter circuit decreases, the
collector characteristic develops two breakdown points. After the
initial breakdown, the collector-to-emitter voltage decreases with
increasing collector current until another breakdown occurs, at a lower
voltage. This minimum collector-to-emitter breakdown voltage is called
the sustaining voltage."
Looking at the graph, the sustaining voltage is about the same as Vceo.
But of course this sustaining voltage is at a higher current.
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Adam Yudelman
collector voltage can drop to Bceo(sus) before a second breakdown.
What happens during/after this second breakdown?
Also, with high voltage BJTs these two voltages are sometimes hundreds of
volts apart, but I take your information to mean that the device can be
subjected safely to Vceo(sus) as long at is has not undergone the first
breakdown?
Jim Thompson
wrote:
A transistor with a floating base breaks down at BVceo, then folds
back in a fashion not unlike a neon bulb to Vceo(sus).
(If replying by E-mail please observe obscure method of anti-spam.)
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| Jim-T@analog_innovations.com Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
For proper E-mail replies SWAP "-" and "_".
Watson A.Name
>
> The "sus" means "sustained," not "sustaining." Vceo is the reverse-bias
> voltage that a bipolar junction transistor will sustain from the collector
> to emitter, indefinitely, with the base not connected. This is usually
> specified at 25 degrees C, and can be affected by temperature.
>
> -Art
I think you're confusing things by saying 'reverse-bias'. This implies
that the base has to have some reverse bias on it. But according to
RCA, the Vceo(sus) is not the point where the voltage is highest when
the base is reverse biased.
> "Adam Yudelman" <yude...@home.com> wrote in message
> news:U9q47.190849$Mf5.51...@news3.rdc1.on.home.com...
> > What is Collector-Emitter Sustaining Voltage [sometimes given as VCEO(sus)
> > Min(V) ] , as spec'd by a BJT datasheet? How does it differ from
> > collector-emitter breakdown voltage [alternately given by VCEO(sus)
> > Max(V) ], and what parameters affect it?
> > Am I correct in assuming that VCEO is collector-emitter voltage with an
> > open (floating) base?
> >
> > Adam
--
Watson A.Name
>
> So when Vbceo is exceeded the collector becomes a negative resistance, and
> collector voltage can drop to Bceo(sus) before a second breakdown.
Vceo just slides into Vceo(sus) without the negative resistance. But
whern the BJT has the base connected to emitter with a resistance,
short, or reverse bias, then the Vcer, Vces, or Vcex is higher than
Vceo, and the negative resistance appears between it and Vce(sus).
> What happens during/after this second breakdown?
> Also, with high voltage BJTs these two voltages are sometimes hundreds of
> volts apart, but I take your information to mean that the device can be
> subjected safely to Vceo(sus) as long at is has not undergone the first
> breakdown?
As long as the transistor doesn't go into secondary breakdown, and
sufffere damage, then nothing happens, it just sustains the voltage,
sort of like a zener.
> Adam
I think the only easy way to visualize this is to show the graphs.
Watson A.Name
>
> On Mon, 16 Jul 2001 00:01:56 GMT, "Adam Yudelman" <yude...@home.com>
> wrote:
>
> |What is Collector-Emitter Sustaining Voltage [sometimes given as VCEO(sus)
> |Min(V) ] , as spec'd by a BJT datasheet? How does it differ from
> |collector-emitter breakdown voltage [alternately given by VCEO(sus)
> |Max(V) ], and what parameters affect it?
> | Am I correct in assuming that VCEO is collector-emitter voltage with an
> |open (floating) base?
> |
> |Adam
> |
>
> A transistor with a floating base breaks down at BVceo, then folds
> back in a fashion not unlike a neon bulb to Vceo(sus).
According to the RCA manual, with an open pase, there is no foldback,
the foldback only occurs when the base to emitter is shorted, or thru a
resistance, ir reverse biased. The Vceo just sort of merges into
Vceo(sus) without the neg resistance region.
> ...Jim Thompson
> --
> | James E.Thompson, P.E. | mens |
> | Analog Innovations, Inc. | et |
> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
> | Phoenix, Arizona Voice:(480)460-2350 | |
> | Jim-T@analog_innovations.com Fax:(480)460-2142 | Brass Rat |
> | http://www.analog-innovations.com | 1962 |
>
> For proper E-mail replies SWAP "-" and "_".
Adam Yudelman
What do you mean slides into, and in what situation would this occur? (open
base?)
But
>whern the BJT has the base connected to emitter with a resistance,
>short, or reverse bias,
How about a slight forward bias, with the transistor in the active region?
Would this situation be applicable in say a common-emitter amp or emitter
follower with base biased from a divider?
then the Vcer, Vces, or Vcex is higher than
>Vceo, and the negative resistance appears between it and Vce(sus).
I don't know what Vcer (collector emitter reverse voltage?) and Vcex are.
Can I imagine this negative resistance as a gas discharge tube paralled with
the device, and assume that if the striking voltage (Vcer) is never exceeded
I can ignore it? IE if I'm using the BUH150
(http://onsemi.com/pub/Collateral/BUH150-D.PDF) with a Vceo(sus) of
400V(min) and a Vces of 700V and I clamp it at 600V, can I assume it will
not break down?
Also, what causes the transistor to undergo the second breakdown?
>I think the only easy way to visualize this is to show the graphs.
>
I suppose that there is no online source for this info, and I should start
looking for the RCA book?
Adam
Adam Yudelman
>looking for the RCA book?
Has RCA published a transistor manual since 1964? Is this the manual you
referred to?
I have found old RCA technical manuals very useful in the past but I was
thinking of something more modern in this case.
Adam
Jim Thompson
wrote:
|>Vceo just slides into Vceo(sus) without the negative resistance.
BVces...short base-to-emitter
BVcer...with resistance base-to-emitter
BVcex...reverse bias base-to-emitter
BVceo...base open
BVcbo...collector-to-base breakdown, emitter open
(If replying by E-mail please observe obscure method of anti-spam.)
...Jim Thompson
JOHN PHIPPS
If you plot Vce vs Ic with the base open, essentially zero current flows
until the device reaches BVceo. The collector-emitter voltage then falls
fairly rapidly until it begins to bottom out; the lowest Vce reached is
called Vceo(sus). This is the maximum voltage that can be impressed,
collector to emitter, in actual operation.
Why? Figure it. The base of the transistor in operation will be driven by
varying base-emitter current. If the base current is zero, that means to
the transistor that the base is open and the transistor should be in the
off state - not passing any significant CE current. Consequently for safe
design, the maximum power supply voltage should not exceed Vceo(sus) -
which is why it's specified for most BJT's.
There are other problems. If you terminate the base to its emitter with a
resistor, the following can happen. As the collector emitter voltage
rises, collector leakage current flows. Some component of this current can
exit the base through the resistor. If the resistor is a high value, a
point will be reached at which the base becomes forward-biased relative to
the emitter; the collector-emitter voltage then falls very rapidly. A plot
of Vcex vs Ic will show a family of VE(sus) voltages depending on the value
of R.
If the base is biased negatively with respect to the emitter, there will be
a small depletion region extending into the base from the emitter-base
junction. If the collector is biased positively with respect to the base,
a similar depletion region will extend into the base from the
collector-base junction. If these two regions meet, there will be a
depletion region that extends from emitter to collector: this is called
"punch-thru" and amounts to a short between collector and emitter. Most
BJT's are designed to minimize the possibility of this occuring, with
sufficiently wide base regions and sufficiently heavy base doping that
punch-thru doesn't occur.
Second breakdown, however, can be a serious problem for the BJT. There are
several forms it can take, the most common being generation of lots of
hole-electron pairs thermally, due to inadequate heat sinking or an
unfavorable thermal environment. Aother form is through the phenomenon of
what I believe is called Avalanche Injection. This is a high current effect
that is too arcane to describe here; suffice it to say that it occurs if
the current density in the base region reaches a critical value depending
on base doping density and a lot of other parameters. The effect spreads in
nanoseconds and generally results in destruction of the device.
The safe thing to remember is, keep your collector-emitter voltage below
Vce(sus). If you're switching inductive loads, be sure there is appropriate
protection of the collector-emitter as CE voltages can fly up really
quickly when an inductive load is switched off rapidly.
You will excuse me if I'm a bit muddled in this posting; I haven't thought
about this subject in about 7 years.
--
Adam Yudelman
>about this subject in about 7 years.
>--
Not at all, thank you for an excellent post.
Adam
JD
"Watson A.Name" <NOS...@postoffice.pacbell.net> wrote in message
news:3B52E6AF...@postoffice.pacbell.net...
> Jim Thompson wrote:
> >
> > On Mon, 16 Jul 2001 00:01:56 GMT, "Adam Yudelman" <yude...@home.com>
> > wrote:
> >
> > |What is Collector-Emitter Sustaining Voltage [sometimes given as VCEO(sus)
> > |Min(V) ] , as spec'd by a BJT datasheet? How does it differ from
> > |collector-emitter breakdown voltage [alternately given by VCEO(sus)
> > |Max(V) ], and what parameters affect it?
> > | Am I correct in assuming that VCEO is collector-emitter voltage with an
> > |open (floating) base?
> > |
> > |Adam
> > |
> >
> > A transistor with a floating base breaks down at BVceo, then folds
> > back in a fashion not unlike a neon bulb to Vceo(sus).
>
> According to the RCA manual, with an open pase, there is no foldback,
> the foldback only occurs when the base to emitter is shorted, or thru a
> resistance, ir reverse biased. The Vceo just sort of merges into
> Vceo(sus) without the neg resistance region.
>
well as a relaxation oscillator... It is VERY HARD on the transistor, but it works.
John
JOHN PHIPPS
In a previous article, yude...@home.com ("Adam Yudelman") says:
Thanks for your remark. To add to the comments on Avalanche Inhection:
This effect was first described for a structure called an n+ n n++ "diode";
the theory also applies to p+ n n+ diodes, BJT's, and power MOSFETs. I
believe the rapid collapse of sustaining voltage with current is applied in
the operation of the Gunn Diode, used in microwave generation applications.
--