I'm pretty new to PSpice and I am trying to simulate a 74121 non
retriggerable monostable.
I have the datasheet form the real device...
http://focus.ti.com/docs/logic/catalog/products/productlist.jhtml?familyId=3
02&techFamId=22&tfsection=product_list
...and I am trying to apply an external timing capacitor and resistor to
control the pulse width. The problem is no matter what I apply as C and R
then I get the minimum pulse width of app 30ns after the clock edge.
The first problem I had was that I got the green DRC washers on the
Rext/Cext, Cext, and Rint pins saying that they were unmodelled so I changed
the pin FLOAT properties for them to Uniquenet. This did not work.
I have connected R between Rext/Cext and Vcc and C between Cext and
Rext/Cext
Can anyone suggest what the problem is?
Thanks in advance
Graham
--
**********************************************
Graham Macpherson
University of Strathclyde
2nd Year Electrical and Mechanical Engineering
graham.m...@strath.ac.uk
**********************************************
CUH! Just when I finally decide to post a question (after *hours* of
struggling) I spot the small "Pulse" property in Capture for the 74121 - I
can get the width of pulse I want from this but does that mean that I can't
use the external components to control it? - Seems to defeat the purpose of
simulating it as a distinct chip if so.
I think I still as confused.
Graham
|Hello,
|
|I'm pretty new to PSpice and I am trying to simulate a 74121 non
|retriggerable monostable.
|
|I have the datasheet form the real device...
|
|http://focus.ti.com/docs/logic/catalog/products/productlist.jhtml?familyId=3
|02&techFamId=22&tfsection=product_list
|
|...and I am trying to apply an external timing capacitor and resistor to
|control the pulse width. The problem is no matter what I apply as C and R
|then I get the minimum pulse width of app 30ns after the clock edge.
|
|The first problem I had was that I got the green DRC washers on the
|Rext/Cext, Cext, and Rint pins saying that they were unmodelled so I changed
|the pin FLOAT properties for them to Uniquenet. This did not work.
|
|I have connected R between Rext/Cext and Vcc and C between Cext and
|Rext/Cext
|
|Can anyone suggest what the problem is?
|
|Thanks in advance
|
|Graham
Post the error message you are getting, as well as the model
(subcircuit) of the 74121.
(If replying by E-mail please observe obscure method of anti-spam.)
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| Jim-T@analog_innovations.com Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
For proper E-mail replies SWAP "-" and "_".
"Things turn out best for those who make the best of how things turn out."
>CUH! Just when I finally decide to post a question (after *hours* of
>struggling) I spot the small "Pulse" property in Capture for the 74121 - I
>can get the width of pulse I want from this but does that mean that I can't
>use the external components to control it? - Seems to defeat the purpose of
>simulating it as a distinct chip if so.
The reason for this is that if you are simulating digital (on the
whole), analogue will just slow you down. So simulating a monostable
as a digital delay is faster. Also if you want to know the limits of
the pulse period then you can't beat getting out your calculator and
using the data book equations - far faster, and probably more accurate
to boot :-).
...malcolm
--
Malcolm Reeves BSc CEng MIEE MIRSE, Full Circuit Ltd, Chippenham, UK
(mre...@fullcircuit.com, mre...@fullcircuit.co.uk or mre...@iee.org).
Design Service for Analogue/Digital H/W & S/W Railway Signalling and Power
electronics. More details plus freeware, Win95/98 DUN and Pspice tips, see:
http://www.fullcircuit.com or http://www.fullcircuit.co.uk
NEW - VHDL test bench tool
Model? The "PSpice Template" is:
X^@REFDES %A1 %A2 %B %RINT %CEXT %REXT/CEXT %Q %Q\ %VCC %GND @MODEL
PARAMS:\n+ PULSE=@PULSE IO_LEVEL=@IO_LEVEL MNTYMXDLY=@MNTYMXDLY
and the error message I was getting before I changed the pin status was:
"WARNING: [NET0079]
Unmodeled pin shouldn't be in template
U3 pin 'CEXT' "
Thanks for your help.
Graham
[snip]
|>
|> Post the error message you are getting, as well as the model
|> (subcircuit) of the 74121.
|>
|> (If replying by E-mail please observe obscure method of anti-spam.)
|>
|> ...Jim Thompson
|
|Model? The "PSpice Template" is:
|
|X^@REFDES %A1 %A2 %B %RINT %CEXT %REXT/CEXT %Q %Q\ %VCC %GND @MODEL
|PARAMS:\n+ PULSE=@PULSE IO_LEVEL=@IO_LEVEL MNTYMXDLY=@MNTYMXDLY
|
|and the error message I was getting before I changed the pin status was:
|
|"WARNING: [NET0079]
|Unmodeled pin shouldn't be in template
|U3 pin 'CEXT' "
|
|Thanks for your help.
|
|Graham
|
Couple of questions:
1) If a pin name is "Qbar" the correct notation is "\Q\"
2) "%REXT/CEXT" puzzles me, the marker for continuing text is "\", so
it appears that PSpice may be balking at an improper pin name.
Sheeeesh! I just pulled up the part (1_shot.lib) library and found
the problem, it is some *SCREWY* digital model (Charlie, Mohi, Brian,
please comment):
* Notes:
* 1. The RINT, CEXT, and REXT/CEXT pins are not functional.
^^^^^^^^^^^^^^^^^^^^^^^
* The output pulse width, tw(out), is controlled with the PULSE
* subcircuit parameter. Note that this means that the pulse width is
* FIXED for the duration of the simulation. You can specify this
* value in the subcircuit call, e.g. X1 ... 74121 PARAMS: PULSE=1us
* 2. Instead of a fixed minimum input pulse width (50ns), this model
* requires the input pulse to be at least as long as the propagation
* delay through the device. Input pulses which are shorter than this
* value produce an X which is tw(out) in duration.
My advice would be to study up on behavioral modeling and spin your
own model :-(
(If replying by E-mail please observe obscure method of anti-spam.)
...Jim Thompson
Most of the digital one-shots were designed to be completely DIGITAL parts.
As such, they don't have an analog component to model the external R and C
components.
If someone want to take on the task of CORRECTLY modeling that oscillator
using the external R and C, more power to them! It is definitely one of the
non-trivial tasks!
For know, you connect the R's and C's appropriately, and then set the pulse
width you want.
Charlie
Edmondson Engineering
Unique Solutions to Unusual Problems
I will leave building my own model for the moment - it sounds a bit beyond
the time and skill of a harassed undergraduate :o)
Graham
|My thanks to all three of you.
You are quite welcome!
|
|I will leave building my own model for the moment - it sounds a bit beyond
|the time and skill of a harassed undergraduate :o)
|
|Graham
|
Modeling is nasty even for us old farts ;-)