Singular matrix in LTSpice

Stuart Brorson

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Apr 26, 2003, 5:57:09 PM4/26/03

to

Hi guys --

I'm back. Now my problem is that when I try running my netlist using
LTSpice, I get a pop-up box saying "doAnalysis: Matrix is singular".
So my question is now: what does it mean when the matrix is singular?
And how do I fix the problem & simulate my circuit?

Yes, I know -- mathematically speaking -- what a singular matrix is.
The question is: what kind of circuit problems give rise to a
singular matrix?

I have put the SPICE netlist and images of the circuit on:

http://www.brorson.com/gEDA/index.html

Any and all suggestions are welcome.

Thanks! You guys are like a college education!

Stuart

Jim Thompson

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Apr 26, 2003, 6:42:05 PM4/26/03

to

On Sat, 26 Apr 2003 21:57:09 -0000, Stuart Brorson <s...@cloud9.net>
wrote:

We're *better* than a college education ;-)

For proper E-mail replies SWAP "-" and "_"

Democrats, The Axis of the Evil Empire

Stuart Brorson

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Apr 26, 2003, 6:57:03 PM4/26/03

to

Jim Thompson <Jim-T@analog_innovations.com> wrote:
: On Sat, 26 Apr 2003 21:57:09 -0000, Stuart Brorson <s...@cloud9.net>
: wrote:

:>Thanks! You guys are like a college education!
:>
:>Stuart

: We're *better* than a college education ;-)

: ...Jim Thompson

Well . . . . how about fixing my problem *before* patting yourself on
the back?!?!

:-)

Stuart

Tim Stinchcombe

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Apr 26, 2003, 7:19:31 PM4/26/03

to

> I'm back.

So soon too!

Now my problem is that when I try running my netlist using
> LTSpice, I get a pop-up box saying "doAnalysis: Matrix is singular".
> So my question is now: what does it mean when the matrix is singular?
> And how do I fix the problem & simulate my circuit?

This normally occurs due to a circuit error - shorting voltage sources,
floating nodes on capacitors, that sort of thing. Numerically it is trying
to do something so extreme it can't cope. Unfortunately in this case it
seems to run OK in SIMetrix, which suggests that something in your circuit
is just a little too much for LTSpice. There are parameters that you can
alter, PIVTOL and PIVREL, but it's not something I'm overly familiar with:
does the documentation have give any indication? Look for help on
'non-convergence'. Since it could be something due to the way you are trying
to run the circuit, if I were you (if you haven't done so already) alter the
PWL source, and make the slopes less steep, i.e. give spice an easier time.

There also an article here that may help, and contains typical stuff on what
to do when spice don't do what you want it too!:

http://www.e-insite.net/ednmag/archives/1994/030394/05df3.htm

--
__________________________________________________________
Tim Stinchcombe

Cheltenham, Glos, UK

Jim Thompson

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Apr 26, 2003, 7:23:20 PM4/26/03

to

On Sat, 26 Apr 2003 22:57:03 -0000, Stuart Brorson <s...@cloud9.net>
wrote:

>Jim Thompson <Jim-T@analog_innovations.com> wrote:
>: On Sat, 26 Apr 2003 21:57:09 -0000, Stuart Brorson <s...@cloud9.net>
>: wrote:
>
>:>Thanks! You guys are like a college education!
>:>
>:>Stuart
>
>: We're *better* than a college education ;-)
>
>: ...Jim Thompson
>
>Well . . . . how about fixing my problem *before* patting yourself on
>the back?!?!
>
>:-)
>
>Stuart

I added two command lines to your .CIR file:

.TRAN 100n 100n 0 100p
.PROBE

and commented out your .INCLUDE (your LTSpice commands).

Runs just ducky in PSpice.

(Just like you'd expect :)

Helmut Sennewald

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Apr 26, 2003, 7:23:48 PM4/26/03

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"Stuart Brorson" <s...@cloud9.net> schrieb im Newsbeitrag
news:vam3lvq...@corp.supernews.com...

Hello Stuart,
I tried it and had the same problem. When I reduced Gmin to 1e-10
and used method=Gear, it doesn't show the error message but simulates
very slowly. I tried the OP177A alone and it has shown now problem.
So it could be a problem of your circuit file too.

It is really very difficult to fix bugs with net lists only.
I felt back in Stone Age with your netlists and I am shure
some people would investigate more if you provide a LTSPICE schematic.

Best Regards
Helmut

> Stuart

Jim Thompson

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Apr 26, 2003, 7:29:17 PM4/26/03

to

On Sat, 26 Apr 2003 16:23:20 -0700, Jim Thompson
<Jim-T@analog_innovations.com> wrote:

>On Sat, 26 Apr 2003 22:57:03 -0000, Stuart Brorson <s...@cloud9.net>
>wrote:
>
>>Jim Thompson <Jim-T@analog_innovations.com> wrote:
>>: On Sat, 26 Apr 2003 21:57:09 -0000, Stuart Brorson <s...@cloud9.net>
>>: wrote:
>>
>>:>Thanks! You guys are like a college education!
>>:>
>>:>Stuart
>>
>>: We're *better* than a college education ;-)
>>
>>: ...Jim Thompson
>>
>>Well . . . . how about fixing my problem *before* patting yourself on
>>the back?!?!
>>
>>:-)
>>
>>Stuart
>
>I added two command lines to your .CIR file:
>
>.TRAN 100n 100n 0 100p
>.PROBE
>
>and commented out your .INCLUDE (your LTSpice commands).
>
>Runs just ducky in PSpice.
>
>(Just like you'd expect :)
>
> ...Jim Thompson

I verified your problem using LTSpice v2.02p.

Throws up using all three of the convergence methods.

Why don't you try Kevin's SuperSpice and see what it does?

Jim Thompson

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Apr 26, 2003, 7:37:39 PM4/26/03

to

It runs just ducky in PSpice 9.2.3WU1, takes 10.77 seconds. No
relaxed tolerances, no gmin stepping, no nothing. So I doubt that
it's a circuit problem.

Stuart *did* post his LTSpice schematic (and netlist) at:

http://www.brorson.com/gEDA/index.html

Maybe you should get a *real* simulator ?:-)

Boy it's much more fun to be on the dish-it-out end of a flame war.

Much nicer than defending PSpice having gmin across current sources,
but that's an issue that only a village idiot would find to be a big
problem ;-)

Tim Stinchcombe

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Apr 26, 2003, 7:58:58 PM4/26/03

to

(Well someone has to stick up for the little people, if a little tongue in
cheek...)

> It runs just ducky in PSpice 9.2.3WU1, takes 10.77 seconds.

I dunno, that PSpice is soooo slow: SIMetrix does it in 0.891 seconds. Beat
that!

> Stuart *did* post his LTSpice schematic (and netlist) at:
>
> http://www.brorson.com/gEDA/index.html
>
> Maybe you should get a *real* simulator ?:-)
>
> Boy it's much more fun to be on the dish-it-out end of a flame war.

There you go again, making me laugh out loud and providing me with
entertainment!

Tim

Jim Thompson

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Apr 26, 2003, 8:17:40 PM4/26/03

to

On Sun, 27 Apr 2003 00:58:58 +0100, "Tim Stinchcombe"
<tim...@tstinchcombe.freeserve.co.uk> wrote:

>(Well someone has to stick up for the little people, if a little tongue in
>cheek...)
>
>> It runs just ducky in PSpice 9.2.3WU1, takes 10.77 seconds.
>
>I dunno, that PSpice is soooo slow: SIMetrix does it in 0.891 seconds. Beat
>that!
>
>> Stuart *did* post his LTSpice schematic (and netlist) at:
>>
>> http://www.brorson.com/gEDA/index.html
>>
>> Maybe you should get a *real* simulator ?:-)
>>
>> Boy it's much more fun to be on the dish-it-out end of a flame war.
>
>There you go again, making me laugh out loud and providing me with
>entertainment!
>
>Tim

On what kind of platform are you running SIMetrix?

Cost?

Leon Heller

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Apr 27, 2003, 3:35:05 AM4/27/03

to

"Jim Thompson" <Jim-T@analog_innovations.com> wrote in message
news:5b8mav4bi2ep7vre9...@4ax.com...

> On Sun, 27 Apr 2003 00:58:58 +0100, "Tim Stinchcombe"
> <tim...@tstinchcombe.freeserve.co.uk> wrote:
>
> >(Well someone has to stick up for the little people, if a little tongue
in
> >cheek...)
> >
> >> It runs just ducky in PSpice 9.2.3WU1, takes 10.77 seconds.
> >
> >I dunno, that PSpice is soooo slow: SIMetrix does it in 0.891 seconds.
Beat
> >that!

> >Tim
>
> On what kind of platform are you running SIMetrix?

Pulsonix SPICE (SIMetrix) takes about 4 secs on my PC - 1.1 GHz Athlon with
512 Mbytes RAM.

Leon
--
Leon Heller, G1HSM
leon_...@hotmail.com
http://www.geocities.com/leon_heller

Tim Stinchcombe

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Apr 27, 2003, 7:05:00 AM4/27/03

to

> On what kind of platform are you running SIMetrix?
>
> Cost?

Nothing special, but relatively new, it's just over 6 months old: Pentium 4
2.0GHz. Basic cost of PC, including about £175 'upgrade' from the standard
monitor to a 19" flat CRT, was about £990. :-) (very smug smilie!)

Helmut Sennewald

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Apr 27, 2003, 8:44:56 AM4/27/03

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"Helmut Sennewald" <HelmutS...@t-online.de> schrieb im Newsbeitrag
news:b8f4e6$8s4o8$1...@ID-60775.news.dfncis.de...

Hello Stuart,
I have investigated it with LTSPICE a bit more and I have found
a setting which works reliably.

I used these statement for .transient analysis
.TRAN 100p 100n 0 100p
.TEMP 0 25 70

First select the gmim parameter in the control menu:

Control Menu -> Hacks: Add gmin across current sources

Then you should add the following to your .cir file when using LTSPICE:

.options gmin=1e-10
.options method=gear
.options Tseed=1e-11
.options abstol=1e-11

Run time was 23sec with a 1100MHz Celeron(old style). This CPU is nearly
equivalent to a 900Mhz P3 in such applications.

Best Regards
Helmut

Terry Pinnell

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Apr 27, 2003, 10:20:36 AM4/27/03

to

"Helmut Sennewald" <HelmutS...@t-online.de> wrote:

>Hello Stuart,
>I have investigated it with LTSPICE a bit more and I have found
>a setting which works reliably.
>
>
>I used these statement for .transient analysis
>.TRAN 100p 100n 0 100p
>.TEMP 0 25 70

Good afternoon, Helmut. Could you or anyone else give me a little
education here please?

When I first tried to run Stuart's netlist in CircuitMaker, it
reported "No SPICE analysis specified in:
D:\Docs\Electronics\CIRCUITS\CM\output.net"

A quick check confirmed that it had no .TRAN line, so I added the one
you suggested. Would *any* Spice program be able to run it as it
stood? And how could it have been created without such a line?

Trying to run it now, I get the following simulatio errors:
"/home/sdb/OpticalReceiver/Simulation.cmd: No such file or directory
Warning: Unknown device type: -
Error: Too few nodes: -3
Warning: Unknown device type: -
Error: Too few nodes: -3
Warning: Unknown device type: -
Error: Too few nodes: -1
Warning: Unknown device type: -
Error: Too few nodes: -1"

Best wishes,

--
Terry Pinnell
Hobbyist, West Sussex, UK

Helmut Sennewald

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Apr 27, 2003, 10:52:25 AM4/27/03

to

"Terry Pinnell" <terrypi...@dial.pipexTHIS.com> schrieb im Newsbeitrag
news:0cpnavot2drue69jf...@4ax.com...

Hello Terry,
ok I was a little bit lazy to tell every problem. Stuart must have
the .TRAN line in this requested command file. So please remove
(or comment out) this line.
*.INCLUDE /home/sdb/OpticalReceiver/Simulation.cmd

Then add at the end of this file the mentioned command lines.
* Control Menu -> Hacks: Add gmin across current sources

.TRAN 100p 100n 0 100p

.options gmin=1e-10
.options method=gear
.options Tseed=1e-11
.options abstol=1e-11

Don't forget to enable(click) the "Add Gmin.." option in the LTSPICE
Control Menue. Control Menu -> Hacks: Add gmin across current sources
As far as I know there is no command line option available for this option.

Now you are ready to run it in LTSPICE.

Best Regards
Helmut

Stuart's complete netlist file(output.net) for LTSPICE: amp.cir

*********************************************************
* Spice file generated by gnetlist *
* spice-SDB version 3.30.2003 by SDB -- *
* provides advanced spice netlisting capability. *
* Documentation at http://www.brorson.com/gEDA/SPICE/ *
*********************************************************
Rref2in 5 VU780out 9130
Rref2fb VU2bias+ 5 33
C201 0 3 1uF
C202 4 0 1uF
XU200 0 5 4 3 VU2bias+ OP177A
R202 4 +5V 22
R201 -5V 3 22
Rref1in VU100in- VU780out 9130
Rref1fb VU1bias+ VU100in- 33
XU101 +5V UNC_AD780_p3 0 UNC_AD780_p5 VU780out UNC_AD780_p8 AD780A
* AD780A SPICE Macromodel 5/93, Rev. A
* AAG / PMI
*
* This version of the AD780 voltage reference model simulates the worst case
* parameters of the 'A' grade. The worst case parameters used
* correspond to those in the data sheet.
*
* Copyright 1993 by Analog Devices, Inc.
*
* Refer to "README.DOC" file for License Statement. Use of this model
* indicates your acceptance with the terms and provisions in the License
Statement.
*
* NODE NUMBERS
* VIN
* | TEMP
* | | GND
* | | | TRIM
* | | | | VOUT
* | | | | | RANGE
* | | | | | |
.SUBCKT AD780A 2 3 4 5 6 8
*
* BANDGAP REFERENCE
*
I1 4 40 DC 1.21174E-3
R1 40 4 1E3 TC=7E-6
EN 10 40 42 0 1
G1 4 10 2 4 4.85668E-9
F1 4 10 POLY(2) VS1 VS2 (0,2.42834E-5,3.8E-5)
Q1 2 10 11 QT
I2 11 4 DC 12.84E-6
R2 11 3 1E3
I3 3 4 DC 0
*
* NOISE VOLTAGE GENERATOR
*
VN1 41 0 DC 2
DN1 41 42 DEN
DN2 42 43 DEN
VN2 0 43 DC 2
*
* INTERNAL OP AMP
*
G2 4 12 10 20 1.93522E-4
R3 12 4 2.5837E9
C1 12 4 6.8444E-11
D1 12 13 DX
V1 2 13 DC 1.2
*
* SECONDARY POLE @ 508 kHz
*
G3 4 14 12 4 1E-6
R4 14 4 1E6
C2 14 4 3.1831E-13
*
* OUTPUT STAGE
*
ISY 2 4 6.8282E-4
FSY 2 4 V1 -1
RSY 2 4 500E3
*
G4 4 15 14 4 25E-6
R5 15 4 40E3
Q2 4 15 16 QP
I4 2 16 DC 100E-6
Q3 4 16 18 QP
R6 18 23 15
R7 16 21 150E3
R8 2 17 34.6
Q4 17 16 19 QN
R9 21 20 6.46E3
R10 20 4 6.1E3
R11 20 5 53E3
R12 20 8 15.6E3
I5 5 4 DC 0
I6 8 4 DC 0
VS1 21 19 DC 0
VS2 23 21 DC 0
L1 21 6 1E-7
*
* OUTPUT CURRENT LIMIT
*
FSC 15 4 VSC 1
VSC 2 22 DC 0
QSC 22 2 17 QN
*
.MODEL QT NPN(IS=1.68E-16 BF=1E4)
.MODEL QN NPN(IS=1E-15 BF=1E3)
.MODEL QP PNP(IS=1E-15 BF=1E3)
.MODEL DX D(IS=1E-15)
.MODEL DEN D(IS=1E-12 RS=2.425E+05 AF=1 KF=6.969E-16)
.ENDS AD780A
C101 0 U100V- 1uF
C102 U100V+ 0 1uF
XU100 0 VU100in- U100V+ U100V- VU1bias+ OP177A
* OP177A SPICE Macro-model 12/90, Rev. B
* JCB / PMI
*
* Revision History:
* REV. B
* Re-ordered subcircuit call out nodes to put the
* output node last.
* Changed Ios from 1E-9 to 0.5E-9
* Added F1 and F2 to fix short circuit current limit.
*
*
* This version of the OP-177 model simulates the worst case
* parameters of the 'A' grade. The worst case parameters
* used correspond to those in the data book.
*
*
* Copyright 1990 by Analog Devices, Inc.
*
* Refer to "README.DOC" file for License Statement. Use of this model
* indicates your acceptance with the terms and provisions in the License
Statement.
*
* Node assignments
* non-inverting input
* | inverting input
* | | positive supply
* | | | negative supply
* | | | | output
* | | | | |
.SUBCKT OP177A 1 2 99 50 39
*
* INPUT STAGE & POLE AT 6 MHZ
*
R1 2 3 5E11
R2 1 3 5E11
R3 5 97 0.0606
R4 6 97 0.0606
CIN 1 2 4E-12
C2 5 6 218.9E-9
I1 4 51 1
IOS 1 2 0.5E-9
EOS 9 10 POLY(1) 30 33 10E-6 1
Q1 5 2 7 QX
Q2 6 9 8 QX
R5 7 4 0.009
R6 8 4 0.009
D1 2 1 DX
D2 1 2 DX
EN 10 1 12 0 1
GN1 0 2 15 0 1
GN2 0 1 18 0 1
*
EREF 98 0 33 0 1
EPLUS 97 0 99 0 1
ENEG 51 0 50 0 1
*
* VOLTAGE NOISE SOURCE WITH FLICKER NOISE
*
DN1 11 12 DEN
DN2 12 13 DEN
VN1 11 0 DC 2
VN2 0 13 DC 2
*
* CURRENT NOISE SOURCE WITH FLICKER NOISE
*
DN3 14 15 DIN
DN4 15 16 DIN
VN3 14 0 DC 2
VN4 0 16 DC 2
*
* SECOND CURRENT NOISE SOURCE
*
DN5 17 18 DIN
DN6 18 19 DIN
VN5 17 0 DC 2
VN6 0 19 DC 2
*
* FIRST GAIN STAGE
*
R7 20 98 1
G1 98 20 5 6 119.8
D3 20 21 DX
D4 22 20 DX
E1 97 21 POLY(1) 97 33 -2.4 1
E2 22 51 POLY(1) 33 51 -2.4 1
*
* GAIN STAGE & DOMINANT POLE AT 0.127 HZ
*
R8 23 98 1.253E9
C3 23 98 1E-9
G2 98 23 20 33 33.3E-6
V1 97 24 1.8
V2 25 51 1.8
D5 23 24 DX
D6 25 23 DX
*
* NEGATIVE ZERO AT -4MHZ
*
R9 26 27 1
C4 26 27 -39.75E-9
R10 27 98 1E-6
E3 26 98 23 33 1E6
*
* COMMON-MODE GAIN NETWORK WITH ZERO AT 63 HZ
*
R13 30 31 1
L2 31 98 2.52E-3
G4 98 30 3 33 0.316E-6
D7 30 97 DX
D8 51 30 DX
*
* POLE AT 2 MHZ
*
R14 32 98 1
C5 32 98 79.5E-9
G5 98 32 27 33 1
*
* OUTPUT STAGE
*
R15 33 97 1
R16 33 51 1
GSY 99 50 POLY(1) 99 50 0.725E-3 0.0425E-3
F1 34 0 V3 1
F2 0 34 V4 1
R17 34 99 400
R18 34 50 400
L3 34 39 2E-7
G6 37 50 32 34 2.5E-3
G7 38 50 34 32 2.5E-3
G8 34 99 99 32 2.5E-3
G9 50 34 32 50 2.5E-3
V3 35 34 6.8
V4 34 36 4.4
D9 32 35 DX
D10 36 32 DX
D11 99 37 DX
D12 99 38 DX
D13 50 37 DY
D14 50 38 DY
*
* MODELS USED
*
.MODEL QX NPN(BF=333.3E6)
.MODEL DX D(IS=1E-15)
.MODEL DY D(IS=1E-15 BV=50)
.MODEL DEN D(IS=1E-12, RS=14.61K, KF=2E-17, AF=1)
.MODEL DIN D(IS=1E-12, RS=7.55E-6, KF=3E-15, AF=1)
.ENDS
R102 U100V+ +5V 22
R101 -5V U100V- 22
R98 0 VU2bias+ 1K
R99 0 VU1bias+ 1K
C95 VU2bias+ 0 100pF
C96 0 V1- 1uF
C97 V1+ 0 1uF
Cphotodiode 0 Vinput 0.9pF
C99 0 VU1bias+ 100pF
R25 Vout2 2 250
C24 Vout1 VU1in- 1pF
R24 VU1in- 1 150
C21 0 V2- 1uF
C20 V2+ 0 1uF
Cc Vout2 VU2in- 1pF
Rc Vout1 VU2in- 10
RL 0 Vout2 50
.TEMP 0 25 70
C12 2 0 1.5pF
C11 0 V2- .01uF
C10 V2+ 0 .01uF
R13 +5V V2+ 5
R12 V2- -5V 5
R26 2 VU2in- 150
R11 Vout2 VU2in- 180
XU2 VU2bias+ VU2in- V2+ V2- Vout2 AD8009an
XU1 VU1bias+ VU1in- V1+ V1- Vout1 AD8009an
***** AD8009 SPICE model Rev B SMR/ADI 8-21-97

* Refer to "README.DOC" file for License Statement. Use of this model
* indicates your acceptance with the terms and provisions in the License
Statement.

* rev B of this model corrects a problem in the output stage that would not
* correctly reflect the output current to the voltage supplies

* This model will give typical performance characteristics
* for the following parameters;

* closed loop gain and phase vs bandwidth
* output current and voltage limiting
* offset voltage (is static, will not vary with vcm)
* ibias (again, is static, will not vary with vcm)
* slew rate and step response performance
* (slew rate is based on 10-90% of step response)
* current on output will be reflected to the supplies
* vnoise, referred to the input
* inoise, referred to the input

* distortion is not characterized

* input stage *

q1 50 3 5 qp1
q2 99 5 4 qn1
q3 99 3 6 qn2
q4 50 6 4 qp2
i1 99 5 1.625e-3
i2 6 50 1.625e-3
cin1 1 98 2.6e-12
cin2 2 98 1e-12
v1 4 2 0

* input error sources *

eos 3 1 poly(1) 20 98 2e-3 1
fbn 2 98 poly(1) vnoise3 50e-6 1e-3
fbp 1 98 poly(1) vnoise3 50e-6 1e-3

* slew limiting stage *

fsl 98 16 v1 1
dsl1 98 16 d1
dsl2 16 98 d1
dsl3 16 17 d1
dsl4 17 16 d1
rsl 17 18 0.22
vsl 18 98 0

* gain stage *

f1 98 7 vsl 2
rgain 7 98 2.5e5
cgain 7 98 1.25e-12
dcl1 7 8 d1
dcl2 9 7 d1
vcl1 99 8 1.83
vcl2 9 50 1.83

gcm 98 7 poly(2) 98 0 30 0 0 1e-5 1e-5

* second pole *

epole 14 98 7 98 1
rpole 14 15 1
cpole 15 98 2e-10

* reference stage *

eref 98 0 poly(2) 99 0 50 0 0 0.5 0.5

ecmref 30 0 poly(2) 1 0 2 0 0 0.5 0.5

* vnoise stage *

rnoise1 19 98 4.6e-3
vnoise1 19 98 0
vnoise2 21 98 0.53
dnoise1 21 19 dn

fnoise1 20 98 vnoise1 1
rnoise2 20 98 1

* inoise stage *

rnoise3 22 98 8.18e-6
vnoise3 22 98 0
vnoise4 24 98 0.575
dnoise2 24 22 dn

fnoise2 23 98 vnoise3 1
rnoise4 23 98 1

* buffer stage *

gbuf 98 13 15 98 1e-2
rbuf 98 13 1e2

* output current reflected to supplies *

fcurr 98 40 voc 1
vcur1 26 98 0
vcur2 98 27 0
dcur1 40 26 d1
dcur2 27 40 d1

* output stage *

vo1 99 90 0
vo2 91 50 0
fout1 0 99 poly(2) vo1 vcur1 -9.27e-3 1 -1
fout2 50 0 poly(2) vo2 vcur2 -9.27e-3 1 -1
gout1 90 10 13 99 0.5
gout2 91 10 13 50 0.5
rout1 10 90 2
rout2 10 91 2
voc 10 28 0
rout3 28 98 1e6
dcl3 13 11 d1
dcl4 12 13 d1
vcl3 11 10 -0.445
vcl4 10 12 -0.445

.model qp1 pnp()
.model qp2 pnp()
.model qn1 npn()
.model qn2 npn()
.model d1 d()
.model dn d(af=1 kf=1e-8)
.ends
R6 1 Vout1 250
C3 1 0 1.5pF
V3 VU1in- Vinput DC 0V
*.INCLUDE /home/sdb/OpticalReceiver/Simulation.cmd
R5 -5V Vout1 1K
I1 0 Vinput AC 1 PWL (0ns 0mA 1nS 0mA 1.01nS 1mA 10nS 1mA 10.01nS 0mA 20nS
0mA 20.01nS .1mA 30nS .1mA 30.01nS 0mA)
R4 V1- -5V 5
C2 0 V1- .01uF
V2 -5V 0 DC -5V
R2 VU1in- Vout1 180
V1 +5V 0 DC 5V
C1 V1+ 0 .01uF
R1 +5V V1+ 5

* Control Menu -> Hacks: Add gmin across current sources

.TRAN 100p 100n 0 100p

.options gmin=1e-10
.options method=gear
.options Tseed=1e-11
.options abstol=1e-11

.end

Jim Thompson

unread,

Apr 27, 2003, 12:09:20 PM4/27/03

to

On Sun, 27 Apr 2003 12:05:00 +0100, "Tim Stinchcombe"
<tim...@tstinchcombe.freeserve.co.uk> wrote:

>> On what kind of platform are you running SIMetrix?
>>
>> Cost?
>
>Nothing special, but relatively new, it's just over 6 months old: Pentium 4
>2.0GHz. Basic cost of PC, including about £175 'upgrade' from the standard
>monitor to a 19" flat CRT, was about £990. :-) (very smug smilie!)
>
>Tim

I downloaded the SIMetrix Demo package.

It is so severely crippled that it can't even run most of the example
files.

I did manage to find a *very* simple-minded circuit that I
benchmarked:

PSpice 0.33sec
SIMetrix 0.39sec
LTSpice 0.571sec

Too short to really draw any conclusions.

SIMetrix is pricey, up in the PSpice range.

Tim, Would you being willing to run good-sized real-bastard circuit so
I can get a benchmark on the un-crippled SIMetrix?

Likewise, any other users of (full-fledged) SIMetrix lurking here?

Thanks!

Tim Stinchcombe

unread,

Apr 27, 2003, 12:27:53 PM4/27/03

to

Hi Jim,

> I downloaded the SIMetrix Demo package.
>
> It is so severely crippled that it can't even run most of the example
> files.

Yeah, it has a node limit of 120 nodes I think, so more than about 3 or 4 op
amps does for it.

> SIMetrix is pricey, up in the PSpice range.

Well, it's getting that way now - they hiked their prices by about 50% a few
months back (when they teamed up with this Catena lot). Fortunately I got in
just before, when it was about 1/2 Pspice (and about 1/3 Pspice + Capture).
Had I know there was an alternative to Capture as you often seem to
indicate, I probably would have gone for Pspice. It's also surprising their
salesman didn't realise this - he offered to knock 20% off the joint price,
but that was still too much, but had I known Pspice can be made to work with
a schematic capture prog other than Capture (i.e. I only needed to pay just
for Pspice itself), I probably would have gone for it.

> Tim, Would you being willing to run good-sized real-bastard circuit so
> I can get a benchmark on the un-crippled SIMetrix?

Yes, no problem (I'll send a more reliable email address off-list). I'd be
interested to see the comparison myself. On their site they publish some
figures using the CircuitSim90 Benchmarks - it's easy to guess that the
others are Pspice, Intusoft and Multisim (if I recall properly), and they
claim SIMetrix out performs all of them.

Kevin Aylward

unread,

Apr 27, 2003, 1:19:25 PM4/27/03

to

You might note that my XSpice engine port is completely standalone. You
can run it as a normal windows application and load in a spice netlist
and get out a standard spice3 output file (text and binary). Its really
a freebee, there are no limits in the engine. SuperSupice runs it in
batch mode, passing in a netlist and loading in the output file. You can
use the engine with any schematic capture.

Kevin Aylward
sa...@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

Leon Heller

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Apr 27, 2003, 1:40:20 PM4/27/03

to

"Jim Thompson" <Jim-T@analog_innovations.com> wrote in message

news:7ovnavs7kf89uv8lr...@4ax.com...

> On Sun, 27 Apr 2003 12:05:00 +0100, "Tim Stinchcombe"
> <tim...@tstinchcombe.freeserve.co.uk> wrote:
>
> >> On what kind of platform are you running SIMetrix?
> >>
> >> Cost?
> >
> >Nothing special, but relatively new, it's just over 6 months old: Pentium
4
> >2.0GHz. Basic cost of PC, including about £175 'upgrade' from the
standard
> >monitor to a 19" flat CRT, was about £990. :-) (very smug smilie!)
> >
> >Tim
>
> I downloaded the SIMetrix Demo package.
>
> It is so severely crippled that it can't even run most of the example
> files.
>
> I did manage to find a *very* simple-minded circuit that I
> benchmarked:
>
> PSpice 0.33sec
> SIMetrix 0.39sec
> LTSpice 0.571sec
>
> Too short to really draw any conclusions.
>
> SIMetrix is pricey, up in the PSpice range.
>
> Tim, Would you being willing to run good-sized real-bastard circuit so
> I can get a benchmark on the un-crippled SIMetrix?
>
> Likewise, any other users of (full-fledged) SIMetrix lurking here?

I can help, also. I've got full SIMetrix as part of the Pulsonix PCB
package. It uses Pulsonix schematic capture instead of the (rather crappy)
SIMetrix schematic entry.

Jim Thompson

unread,

Apr 27, 2003, 1:49:55 PM4/27/03

to

On Sun, 27 Apr 2003 17:27:53 +0100, "Tim Stinchcombe"
<tim...@tstinchcombe.freeserve.co.uk> wrote:

>Hi Jim,
>
>> I downloaded the SIMetrix Demo package.
>>
>> It is so severely crippled that it can't even run most of the example
>> files.
>
>Yeah, it has a node limit of 120 nodes I think, so more than about 3 or 4 op
>amps does for it.
>
>> SIMetrix is pricey, up in the PSpice range.
>
>Well, it's getting that way now - they hiked their prices by about 50% a few
>months back (when they teamed up with this Catena lot). Fortunately I got in
>just before, when it was about 1/2 Pspice (and about 1/3 Pspice + Capture).
>Had I know there was an alternative to Capture as you often seem to
>indicate, I probably would have gone for Pspice. It's also surprising their
>salesman didn't realise this - he offered to knock 20% off the joint price,
>but that was still too much, but had I known Pspice can be made to work with
>a schematic capture prog other than Capture (i.e. I only needed to pay just
>for Pspice itself), I probably would have gone for it.

You don't get away with not paying for Capture. You just have to know
that, if you choose "Custom" installation, then you have the
opportunity to use the old MicroSim Schematics which is *very*
user-friendly.

Cadence has stopped updating Schematics and my (not-unjustified) fear
is they will drop it off the package at one of the "updates".

At that point I will stop paying, and look elsewhere.

As much as I pick on Mikey, LTSpice *does* have the potential to be a
good product... it just lacks the maturity I need... I earn my living
this way, so a report of a daily "special convergence case" does not
ring my chime.

If SIMetrix is really as speedy as they claim I think it warrants
further looking into.

I know many lurkers will jump in here with "LTSpice is FREE". Indeed
it is, but I repeat, I earn my living this way, so reliability is a
major issue. Buying the full-fledged version of SIMetrix/SIMPLIS
would represent an expense of less than 2% of my gross. If the near
order of magnitude speed improvement is really there, using SIMetrix
could possibly double my productivity... my eyes won't even water as I
write the check ;-)

>
>> Tim, Would you being willing to run good-sized real-bastard circuit so
>> I can get a benchmark on the un-crippled SIMetrix?
>
>Yes, no problem (I'll send a more reliable email address off-list). I'd be
>interested to see the comparison myself. On their site they publish some
>figures using the CircuitSim90 Benchmarks - it's easy to guess that the
>others are Pspice, Intusoft and Multisim (if I recall properly), and they
>claim SIMetrix out performs all of them.
>
>Tim

Are those simulators mentioned in the order shown on the website?

Tim, Thanks for your offer to run benchmarks. I look forward to
seeing the outcome.

Jim Thompson

unread,

Apr 27, 2003, 1:55:07 PM4/27/03

to

I'll put together and distribute a .CIR file with all libraries
included so that it will run on all simulators.

I presume that SIMetrix follows standard Spice notation?

Tim Stinchcombe

unread,

Apr 27, 2003, 2:14:34 PM4/27/03

to

> I'll put together and distribute a .CIR file with all libraries
> included so that it will run on all simulators.
>
> I presume that SIMetrix follows standard Spice notation?

Mostly - there a few things that they have junked on the basis that because
they do not work very well, it's not worth the bother of supporting, and as
PSpice, they have added a few proprietary commands/statements in. But from
my (rather limited) experience so far, it won't mean hours and hours of
re-writing just to get a single netlist running, just the odd 'tweak' here
or there.

Tim Stinchcombe

unread,

Apr 27, 2003, 2:31:01 PM4/27/03

to

> You don't get away with not paying for Capture. You just have to know

Well at least that makes me feel a little better in knowing that it probably
*wasn't* an option after all.

> I know many lurkers will jump in here with "LTSpice is FREE". Indeed
> it is, but I repeat, I earn my living this way, so reliability is a
> major issue. Buying the full-fledged version of SIMetrix/SIMPLIS
> would represent an expense of less than 2% of my gross. If the near
> order of magnitude speed improvement is really there, using SIMetrix
> could possibly double my productivity... my eyes won't even water as I
> write the check ;-)

I'll be in touch later then about my commission rates! ;-)

> >interested to see the comparison myself. On their site they publish some
> >figures using the CircuitSim90 Benchmarks - it's easy to guess that the
> >others are Pspice, Intusoft and Multisim (if I recall properly), and they
> >claim SIMetrix out performs all of them.
> >
> >Tim
>
> Are those simulators mentioned in the order shown on the website?

I'll have a dig about to see if I kept a note somewhere, but I think I took
one look at the figures and thought to myself: 'I bet the worst one is
Multisim; the best is probably PSpice, and the one in the middle, probably a
another key player, like ICAP/4 maybe', and at some point when I quizzed
them about it, I found out I was right!

Tim Stinchcombe

unread,

Apr 27, 2003, 3:10:44 PM4/27/03

to

> > >interested to see the comparison myself. On their site they publish
some
> > >figures using the CircuitSim90 Benchmarks - it's easy to guess that the
> > >others are Pspice, Intusoft and Multisim (if I recall properly), and
they
> > >claim SIMetrix out performs all of them.
> > >
> > >Tim
> >
> > Are those simulators mentioned in the order shown on the website?
>
> I'll have a dig about to see if I kept a note somewhere, but I think I
took
> one look at the figures and thought to myself: 'I bet the worst one is
> Multisim; the best is probably PSpice, and the one in the middle, probably
a
> another key player, like ICAP/4 maybe', and at some point when I quizzed
> them about it, I found out I was right!

I had made a note, and the above I believe is correct. The only place where
all three seem to be mentioned is in the .pdf of the colour brochure; in
other places they have not mentioned the worst one, 'Product 3'.

Tim Stinchcombe

unread,

Apr 27, 2003, 3:35:00 PM4/27/03

to

Hi Leon,

> I can help, also. I've got full SIMetrix as part of the Pulsonix PCB
> package. It uses Pulsonix schematic capture instead of the (rather crappy)
> SIMetrix schematic entry.

Newbury Tech (as was) told me that SIMetrix is intended for simulation _per
se_, and that is why there is no attempt at interfacing the schematic
capture to PCB layout tools/what-have-you, and as such I find it quite
adequate. Admittedly it is probably not quite as friendly as, say, Multisim,
but then it does what it says it should, unlike Multisim - I find I get put
off things very quickly if they don't quite do what they are supposed to.
I've only had a quick look at Pulsonix's website, but I'm betting there is
quite a lot more 'post-processing' capability built into SIMetrix that isn't
available in Pulsonix, something which I find invaluable. When I first got
Multisim Pro, I was disappointed to discover that I didn't get the
post-processor - you have to buy the 'Power Pro' version for it, but even in
the demo version I had already come up against it's limitations. In this
respect SIMetrix blows Multisim into the weeds. I would be interested to
find out just what Pulsonix will let you do.

Stuart Brorson

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Apr 27, 2003, 7:55:50 PM4/27/03

to

Terry Pinnell <terrypi...@dial.pipexthis.com> wrote:
: "Helmut Sennewald" <HelmutS...@t-online.de> wrote:

:>Hello Stuart,
:>I have investigated it with LTSPICE a bit more and I have found
:>a setting which works reliably.
:>
:>
:>I used these statement for .transient analysis
:>.TRAN 100p 100n 0 100p
:>.TEMP 0 25 70

: Good afternoon, Helmut. Could you or anyone else give me a little
: education here please?

: When I first tried to run Stuart's netlist in CircuitMaker, it
: reported "No SPICE analysis specified in:
: D:\Docs\Electronics\CIRCUITS\CM\output.net"

: A quick check confirmed that it had no .TRAN line, so I added the one
: you suggested. Would *any* Spice program be able to run it as it
: stood? And how could it have been created without such a line?

: Trying to run it now, I get the following simulatio errors:
: "/home/sdb/OpticalReceiver/Simulation.cmd: No such file or directory

Terry, Helmut, etc,

Perhaps I should have said that I put the simulation commands in the
"Simulation.cmd" file. That is, Simulation.cmd holds the .TRAN (or
.OP or .DC or .AC or etc) command which I use to command the
simulation. Since this file gets included into the netlist
each time I run the simulation in LTSpice, I just have to edit it
in an external text editor, and then punch the "run" button in LTSpice
to get a new simulation. It's easier than loading in a new netlist.

Anyway, I didn't explain clearly what was going on, and that led to
your confusion. Sorry! I will be more explicit next time.

Stuart

Stuart Brorson

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Apr 27, 2003, 8:06:33 PM4/27/03

to

Helmut --

You rock! Thanks! Now I have it running. Please see some comments below.

Helmut Sennewald <HelmutS...@t-online.de> wrote:
: Hello Stuart,

: I have investigated it with LTSPICE a bit more and I have found
: a setting which works reliably.

: I used these statement for .transient analysis
: .TRAN 100p 100n 0 100p
: .TEMP 0 25 70

Yeah, as I explain in another post, I include all simulation commands
(.tran, .dc. etc) in a file called Simulation.cmd which gets read in
each time the simulation is run. This allows me to change the
simulation without having to edit and re-load the netlist each time.

I should have mentioned this earlier. My mistake! Sorry!

: First select the gmim parameter in the control menu:

: Control Menu -> Hacks: Add gmin across current sources

I couldn't find this. I am running LTSpice 2.01e. Are you running a
newer or older version?

: Then you should add the following to your .cir file when using LTSPICE:

: .options gmin=1e-10
: .options method=gear
: .options Tseed=1e-11
: .options abstol=1e-11

I believe that one of these options fixed the problem. However, for
the .options Tseed option, I get an error message "unknown option
Tseed". The other options worked just fine.

Do you have an educated guess about which option helped? I had set
gear integration in one of the pop-up windoes, so the only two changes
I was actually able to make were either setting gmin or abstol. What
is gmin? (Yes, I know that it sets the minimum conductance, but of
what? It sounds like it places large resistances to ground at all
nodes, or something like that . . . .) And, similarly, what is
abstol?

Anyway, you got my simulation working, so you rock!

Thanks,

Stuart

analog

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Apr 27, 2003, 9:36:38 PM4/27/03

to

Stuart Brorson wrote:

> I'm back. Now my problem is that when I try running my netlist using

> LTSpice, I get a pop-up box saying "doAnalysis: Matrix is singular".
> So my question is now: what does it mean when the matrix is singular?

Take this with a grain of salt, but it's telling you that the matrix
solver has run out of numerical dynamic range - usually because the
time step got too small.

LTspice seems to have been honed with switched mode power supply
circuits and seems to run those type of circuits much better and
faster than other flavors of spice. To that end it has extended the
models for capacitors and inductors to include parasitics and its
built-in mosfet type smoothly models the highly voltage dependent
Cgd.

From reading recent postings on this newsgroup, for some reason,
it would seem LTspice often has troubles running circuits with
models from Analog Devices. Perhaps this just is a reflection of
the particular default settings that Mike Engelhardt has chosen in
order to optimize LTspice for power circuits or perhaps it is simply
that LTspice doesn't have enough run-time out of house with other
vendor's models. Whatever the reason, Mike is very responsive,
hates bugs marring his baby, and often has them completely squashed
within days, if not hours of their being reported.

So, after following this thread for a while, I finally got around
to trying out your badboy circuit file and have come up with some
recommendations for you to try.

First of all - please change your .TRAN statement. There is no
need to have such a short maximum time step (3ns is fine) and
LTspice would just as well see zero for the Tstep parameter.
To be specific: .TRAN 0 100n 0 3n.

Next, add the following to make LTspice behave more like the default
settings for Pspice: .OPTION Tseed=1e-11 trtol=3 gminsteps=0 noopiter.
According to Mike, "trtol" should be set to 7 to best match Pspice.
Note that, if you haven't already done so, you will probably have to
update your copy of LTspice, either by selecting the "Tools" -->
"Sync Release" drop down menu, or getting a fresh download of LTspice
from: http://www.linear.com/software/

And I would also suggest a slight adjustment of the following
settings as have already been recommended to you by others:
.OPTION method=gear gmin=3e-11 abstol=3e-11 chgtol=1e-16.

Lastly, Mike has posted several times that the LTspice matrix
solver is much happier with current sources instead of voltage
sources. I think the help file also mentions this in several
places. I'm not sure that it is necessary to solve your problems,
but I have change several E source to equivalent G sources in the
Analog Devices subcircuits you are using.

Here is your "tweaked" netlist file, rearranged slightly to more
or less follow the schematic so I could make some sense of it.

*********************************************************
* Spice file generated by gnetlist *
* spice-SDB version 3.30.2003 by SDB -- *
* provides advanced spice netlisting capability. *
* Documentation at http://www.brorson.com/gEDA/SPICE/ *
*********************************************************

*.INCLUDE /home/sdb/OpticalReceiver/Simulation.cmd
*.TRAN <Tstep> <Tstop> [Tstart [dTmax]] [modifiers]
.TRAN 0 100n 0 3n
.TEMP 0 25 70
.option method=gear gmin=3e-11 abstol=3e-11 chgtol=1e-16
.option Tseed=1e-11 trtol=3 gminsteps=0 noopiter; more like Pspice
.save V(vout1) V(vout2) ;comment out to save all nodes

V1 +5V 0 DC 5V

V2 -5V 0 DC -5V

I1 0 Vinput AC 1 PWL (0ns 0mA 1nS 0mA 1.01nS 1mA 10nS 1mA 10.01nS 0mA 20nS 0mA 20.01nS .1mA 30nS .1mA 30.01nS 0mA)
Cphotodiode 0 Vinput 0.9pF

V3 VU1in- Vinput DC 0V

R99 0 VU1bias+ 1K
C99 0 VU1bias+ 100pF
R2 VU1in- Vout1 180

C24 Vout1 VU1in- 1pF
R24 VU1in- 1 150

C3 1 0 1.5pF
R6 1 Vout1 250
R5 -5V Vout1 1K

XU1 VU1bias+ VU1in- V1+ V1- Vout1 AD8009an

C2 0 V1- .01uF
C96 0 V1- 1uF
R4 V1- -5V 5
C1 V1+ 0 .01uF
C97 V1+ 0 1uF
R1 +5V V1+ 5

R98 0 VU2bias+ 1K
C95 VU2bias+ 0 100pF
Rc Vout1 VU2in- 10
Cc Vout2 VU2in- 1pF
R11 Vout2 VU2in- 180
R26 2 VU2in- 150
C12 2 0 1.5pF
R25 Vout2 2 250
RL 0 Vout2 50

XU2 VU2bias+ VU2in- V2+ V2- Vout2 AD8009an

C10 V2+ 0 .01uF
C20 V2+ 0 1uF
R13 +5V V2+ 5
C11 0 V2- .01uF
C21 0 V2- 1uF
R12 V2- -5V 5

XU101 +5V UNC_AD780_p3 0 UNC_AD780_p5 VU780out UNC_AD780_p8 AD780A

Rref1in VU100in- VU780out 9130
Rref1fb VU1bias+ VU100in- 33

XU100 0 VU100in- U100V+ U100V- VU1bias+ OP177A

C101 0 U100V- 1uF
R101 -5V U100V- 22
C102 U100V+ 0 1uF
R102 U100V+ +5V 22

Rref2in 5 VU780out 9130
Rref2fb VU2bias+ 5 33

XU200 0 5 4 3 VU2bias+ OP177A

C201 0 3 1uF
R201 -5V 3 22
C202 4 0 1uF
R202 4 +5V 22

GOS 1 3 poly(1) 20 98 2e-3 1 ;eos 3 1 poly(1) 20 98 2e-3 1
ROS 1 3 1

fbn 2 98 poly(1) vnoise3 50e-6 1e-3
fbp 1 98 poly(1) vnoise3 50e-6 1e-3

* slew limiting stage *
fsl 98 16 v1 1
dsl1 98 16 d1
dsl2 16 98 d1
dsl3 16 17 d1
dsl4 17 16 d1
rsl 17 18 0.22
vsl 18 98 0

* gain stage *
f1 98 7 vsl 2
rgain 7 98 2.5e5
cgain 7 98 1.25e-12
dcl1 7 8 d1
dcl2 9 7 d1
vcl1 99 8 1.83
vcl2 9 50 1.83
gcm 98 7 poly(2) 98 0 30 0 0 1e-5 1e-5

* second pole *
GPOLE 98 15 7 98 1 ;epole 14 98 7 98 1
RPOLE 98 15 1 ;rpole 14 15 1
cpole 15 98 2e-10

* AD780A SPICE Macromodel 5/93, Rev. A

gn 40 10 42 0 1 ;EN 10 40 42 0 1
rn 40 10 1

* OP177A SPICE Macro-model 12/90, Rev. B

gos 10 9 POLY(1) 30 33 10E-6 1 ;EOS 9 10 POLY(1) 30 33 10E-6 1
ros 10 9 1

.END

Leon Heller

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Apr 28, 2003, 1:23:39 AM4/28/03

to

"Tim Stinchcombe" <tim...@tstinchcombe.freeserve.co.uk> wrote in message
news:b8hbcn$uld$1...@newsg3.svr.pol.co.uk...

Do you mean the stuff like FFTs? I've got the evaluation version of
SIMetrix, but haven't checked that they are the same.

Kevin Aylward

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Apr 28, 2003, 2:22:44 AM4/28/03

to

Tim Stinchcombe wrote:
>> I'll put together and distribute a .CIR file with all libraries
>> included so that it will run on all simulators.
>>
>> I presume that SIMetrix follows standard Spice notation?
>
> Mostly - there a few things that they have junked on the basis that
> because they do not work very well, it's not worth the bother of
> supporting, and as PSpice, they have added a few proprietary
> commands/statements in.

Note that SIMetrix *is* XSpice. i.e. 98% (my guess) is the exact
Spice3/XSpice code. However, this core code has been added to and
improved.

Tim Stinchcombe

unread,

Apr 28, 2003, 6:38:13 AM4/28/03

to

> > I've only had a quick look at Pulsonix's website, but I'm betting there
is
> > quite a lot more 'post-processing' capability built into SIMetrix that
> isn't
> > available in Pulsonix, something which I find invaluable. When I first
got
> > Multisim Pro, I was disappointed to discover that I didn't get the
> > post-processor - you have to buy the 'Power Pro' version for it, but
even
> in
> > the demo version I had already come up against it's limitations. In this
> > respect SIMetrix blows Multisim into the weeds. I would be interested to
> > find out just what Pulsonix will let you do.
>
> Do you mean the stuff like FFTs? I've got the evaluation version of

Yes, but there is a lot, lot more besides. There are many built-in functions
for measuring the RMS value, mean, frequency, rise time, 3dB point (from AC
analysis) etc. from your chosen plot, but you can also plot an arbitrary
function based on any available voltage or current in the circuit, and it is
*this* I find very useful. E.g. say I have some simple transistor circuit
and I plot the collector current: I can also enter an expresson to plot this
based on the base-emitter voltage, Is*exp((Vb-Ve)/0.026) (where 'Vb' is
appropriate node voltage from circuit etc.), thus enabling me to check my
understanding of the theory against practice.

Leon Heller

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Apr 28, 2003, 7:53:36 AM4/28/03

to

"Tim Stinchcombe" <tim...@tstinchcombe.freeserve.co.uk> wrote in message

news:b8j0a7$bs4$1...@news7.svr.pol.co.uk...

Yes, you get that stuff with the Pulsonix version.

Tim Stinchcombe

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Apr 28, 2003, 9:43:39 AM4/28/03

to

> Yes, you get that stuff with the Pulsonix version.

Well that surprises me somewhat. I knew the SIMetrix engine was used in both
Pulsonix and EasyPC/EasySpice (Number One Systems), but had assumed that
these were two separate companies. I've just had another look around the
Pulsonix website, and, yes, I can now see that (from their rather skimpy 2
page 'brochure' on simulation) it does appear to use exactly the same GUI as
SIMetrix as far as all the graphing capabilities is concerned. But what
*really* surprised me is that Number One Systems and Pulsonix appear to be
one and the same (at least they share the same address in a little village
about 10 miles from where I live). You learn something new every day, as
they say!

Tim

(Mmm, wonder if they have any jobs going...)

Leon Heller

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Apr 28, 2003, 1:15:39 PM4/28/03

to

"Tim Stinchcombe" <tim...@tstinchcombe.freeserve.co.uk> wrote in message

news:b8jb5t$fk8$1...@newsg1.svr.pol.co.uk...

> > Yes, you get that stuff with the Pulsonix version.
>
> Well that surprises me somewhat. I knew the SIMetrix engine was used in
both
> Pulsonix and EasyPC/EasySpice (Number One Systems), but had assumed that
> these were two separate companies. I've just had another look around the
> Pulsonix website, and, yes, I can now see that (from their rather skimpy 2
> page 'brochure' on simulation) it does appear to use exactly the same GUI
as
> SIMetrix as far as all the graphing capabilities is concerned. But what
> *really* surprised me is that Number One Systems and Pulsonix appear to be
> one and the same (at least they share the same address in a little village
> about 10 miles from where I live). You learn something new every day, as
> they say!
>
> Tim
>
> (Mmm, wonder if they have any jobs going...)
>

They are both owned by WestDev. Number One Systems (EasyPC) went bust a
couple of years ago and was bought by a bunch of ex-Zuken-REDAC people so
that they could develop Pulsonix. They have maintained development of EasyPC
for the low-end market, Pulsonix competes with Protel, CADStar, Orcad, etc.
I like it a lot.

SIMetrix is an option with both products.

I don't think they have any jobs, but you could always get in touch with
them.

Helmut Sennewald

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Apr 28, 2003, 2:07:31 PM4/28/03

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"Stuart Brorson" <s...@cloud9.net> schrieb im Newsbeitrag

news:vaos49k...@corp.supernews.com...

> Helmut --
>
> You rock! Thanks! Now I have it running. Please see some comments
below.
>

> ......

> : First select the gmim parameter in the control menu:
>
> : Control Menu -> Hacks: Add gmin across current sources
>
> I couldn't find this. I am running LTSpice 2.01e. Are you running a
> newer or older version?
>

Hello Stuart,
yes, you need a newer version of LTSPICE. The latest is version is 2.02p.

> : Then you should add the following to your .cir file when using LTSPICE:
>
> : .options gmin=1e-10
> : .options method=gear
> : .options Tseed=1e-11
> : .options abstol=1e-11
>
> I believe that one of these options fixed the problem. However, for
> the .options Tseed option, I get an error message "unknown option
> Tseed".

This "Tseed" option also requires a newer version. Mike Engelhardt
anounced it in this news group a week or two ago.

> Do you have an educated guess about which option helped?

All of them helped together. Some simulation runs have needed less
options and other have needed all. I have seen dependance from the
.TRAN setting and the .TEMP setting.

It was very interesting that higher .ITL settings have been very
bad for convergence. It seems that the old dog tricks never work with
LTSPICE.

> gear integration in one of the pop-up windoes, so the only two changes
> I was actually able to make were either setting gmin or abstol. What
> is gmin? (Yes, I know that it sets the minimum conductance, but of
> what?

I was also not shure when "gmin" is really applied. So I tried a few
minutes ago with a simple circuit.
My finding has been that it is only applied in parallel to PN(diodes,
transistors) junctions.

> It sounds like it places large resistances to ground at all
> nodes, or something like that . . . .)

If I have done no mistake with my test circuit, then it is only applied
in parallel to the PN junction and not to ground(0).
I am not shure whether this is general valid for all SPICE or it is a
special implementation in LTSPICE.

> And, similarly, what is
> abstol?

It is a tolerance when finding a solution of the matrix. Other know more
about.
I am only a user of (LT)SPICE and PSPICE and not a SPICE programmer.

I appreciate your circuit, because it gives Mike(E) the chance to improve
LTSPICE.

Best Regards
Helmut

Tim Stinchcombe

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Apr 28, 2003, 2:45:20 PM4/28/03

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> They are both owned by WestDev. Number One Systems (EasyPC) went bust a
> couple of years ago and was bought by a bunch of ex-Zuken-REDAC people so
> that they could develop Pulsonix. They have maintained development of
EasyPC

I checked at Companies House website, and against 'Number One Systems Ltd'
it's status is showing as 'Proposal to strike off', so I guess they are
going to drop that as a name soon. Unfortunately my local library is shut
for a week, so I was unable to see if Westdev Ltd is sufficiently large
enough to figure in any of the business directories - I shall do some more
searching on the web.

Tim

Brian Howie

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Apr 29, 2003, 11:11:04 AM4/29/03

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Leon Heller wrote:
> "Jim Thompson" <Jim-T@analog_innovations.com> wrote in message

> news:5b8mav4bi2ep7vre9...@4ax.com...
>> On Sun, 27 Apr 2003 00:58:58 +0100, "Tim Stinchcombe"
>> <tim...@tstinchcombe.freeserve.co.uk> wrote:
>>
>>> (Well someone has to stick up for the little people, if a little
>>> tongue in cheek...)
>>>
>>>> It runs just ducky in PSpice 9.2.3WU1, takes 10.77 seconds.
>>>
>>> I dunno, that PSpice is soooo slow: SIMetrix does it in 0.891
>>> seconds. Beat that!
>>> Tim

>>
>> On what kind of platform are you running SIMetrix?
>

> Pulsonix SPICE (SIMetrix) takes about 4 secs on my PC - 1.1 GHz
> Athlon with 512 Mbytes RAM.
>
> Leon

Hmm, Accusim took:-

CPU TIME 5s 550ms

4s 800ms of which was finding convergence.

Running on a Sun 2x750MHZ with 2G RAM

Brian

Daniel Bizuneh

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May 7, 2003, 4:32:10 PM5/7/03

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Hello everyone,

I have an interesting netlist that I
would like to run in LTSPICE. Let's say
I have a PMOS model as follow inside the
netlist:

M1 1 2 3 4 PMOS w=1u l=2u ad=2p ...

The simulator runs the netlist just
fine, but if I do

M1 1 2 3 4 PMOS w=1u l=2u ad=w*l ..

the simulator flags an error. The only
difference between the above two cases
is that ad in the second case is an
equation. Is there a way to put an
equation on a particular device netlist
line? Just curious,

Thanks

Daniel

Mike Engelhardt

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May 7, 2003, 4:05:14 PM5/7/03

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Daniel,

> M1 1 2 3 4 PMOS w=1u l=2u ad=w*l ..

M1 1 2 3 4 PMOS w={w} l={l} ad={w*l} ..
.param w=1u l=2u

--Mike

Daniel Bizuneh

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May 7, 2003, 6:02:40 PM5/7/03

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Hello Mike,

Thanks for the prompt reply. The way
you describe it works. I have one more
question for you. What if I want to put
a funtion for "ad" instead the actual
equation as an example

M1 1 2 3 4 PMOS w={w} l={l} AD=
func({w},{l})

Daniel

Daniel Bizuneh

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May 7, 2003, 6:33:28 PM5/7/03

to

I just noticed that there is a problem
with the above arrangement. It works
fine if you have only one PMOS device,
but if you have a number of PMOS
devices, it will create a problem
because you can define parameters only
once for a specific variable. It will
be great if there is a way without
introducing parameters. Assume you have

M1 1 2 3 4 PMOS w=1u l=2u ad=w*l ...
M2 5 6 7 8 PMOS w=2u l=3u ad=w*l ...
...
Daniel

Mike Engelhardt

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May 7, 2003, 5:46:19 PM5/7/03

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Daniel,

> Thanks for the prompt reply. The way
> you describe it works. I have one more
> question for you. What if I want to put
> a funtion for "ad" instead the actual
> equation as an example
>
> M1 1 2 3 4 PMOS w={w} l={l} AD=
> func({w},{l})

.param w=1u l=2u ldif=.1u
.func myfunc(x,y) = { x*y-ldif }
M1 1 0 0 0 PMOS w={w} l={l} AD={myfunc(w,l)}

--Mike

Mike Engelhardt

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May 7, 2003, 5:56:39 PM5/7/03

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Daniel,

> I just noticed that there is a problem
> with the above arrangement. It works
> fine if you have only one PMOS device,
> but if you have a number of PMOS
> devices, it will create a problem
> because you can define parameters only
> once for a specific variable. It will
> be great if there is a way without
> introducing parameters. Assume you have
>
> M1 1 2 3 4 PMOS w=1u l=2u ad=w*l ...
> M2 5 6 7 8 PMOS w=2u l=3u ad=w*l ...

Yes, there was a discussion of this and a work
around based on using subcircuits to scope
the math to a transistor instance on the
yahoo users group, LTspice. You might
want to follow that dialog.

But there isn't a good solution for this.
The LTspice schematic capture can scope
this math to a symbol and do basically
what you when it's used to open up some
CAD files from foreign tools, but that
system has enough objectionable behavior
in the interest of capability with
these other tools that the ability to
do this is left strategically
undocumented.

--Mike

Jim Thompson

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May 7, 2003, 9:06:04 PM5/7/03

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On 07 May 2003 21:56:39 GMT, "Mike Engelhardt" <pm...@concentric.net>
wrote:

LTSpice, when running a netlist, certainly follows the PSpice
template-method of accomplishing your objective. Apparently it's a
LTSpice schematic entry issue? Mikey?

For proper E-mail replies SWAP "-" and "_"

Friends never serve friends White Zinfandel

Mike Engelhardt

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May 7, 2003, 10:18:02 PM5/7/03

to

"Jim Thompson" <Jim-T@analog_innovations.com> wrote in message

news:j8bjbv86lvgloibp5...@4ax.com...

That's right. It's a LTspice schematic entry issue. I thought I
tried to say that. There's a somewhat more detailed answer
on the users group.

--Mike

Daniel Bizuneh

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May 8, 2003, 8:43:02 PM5/8/03

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Mike,Jim

Thanks for the info.

Daniel

Terry Pinnell

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May 11, 2003, 7:14:17 AM5/11/03

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"Helmut Sennewald" <HelmutS...@t-online.de> wrote:

>
>"Terry Pinnell" <terrypi...@dial.pipexTHIS.com> schrieb im Newsbeitrag
>news:0cpnavot2drue69jf...@4ax.com...

>> "Helmut Sennewald" <HelmutS...@t-online.de> wrote:
>>
>> >Hello Stuart,
>> >I have investigated it with LTSPICE a bit more and I have found
>> >a setting which works reliably.
>> >
>> >
>> >I used these statement for .transient analysis
>> >.TRAN 100p 100n 0 100p
>> >.TEMP 0 25 70
>>

>> Good afternoon, Helmut. Could you or anyone else give me a little
>> education here please?
>>
>> When I first tried to run Stuart's netlist in CircuitMaker, it
>> reported "No SPICE analysis specified in:
>> D:\Docs\Electronics\CIRCUITS\CM\output.net"
>>
>> A quick check confirmed that it had no .TRAN line, so I added the one
>> you suggested. Would *any* Spice program be able to run it as it
>> stood? And how could it have been created without such a line?
>>
>> Trying to run it now, I get the following simulatio errors:
>> "/home/sdb/OpticalReceiver/Simulation.cmd: No such file or directory

>> Warning: Unknown device type: -
>> Error: Too few nodes: -3
>> Warning: Unknown device type: -
>> Error: Too few nodes: -3
>> Warning: Unknown device type: -
>> Error: Too few nodes: -1
>> Warning: Unknown device type: -
>> Error: Too few nodes: -1"
>>
>
>Hello Terry,
>ok I was a little bit lazy to tell every problem. Stuart must have
>the .TRAN line in this requested command file. So please remove
>(or comment out) this line.
>*.INCLUDE /home/sdb/OpticalReceiver/Simulation.cmd
>
>Then add at the end of this file the mentioned command lines.
>* Control Menu -> Hacks: Add gmin across current sources

>.TRAN 100p 100n 0 100p

>.options gmin=1e-10
>.options method=gear
>.options Tseed=1e-11
>.options abstol=1e-11
>

>Don't forget to enable(click) the "Add Gmin.." option in the LTSPICE
>Control Menue. Control Menu -> Hacks: Add gmin across current sources
>As far as I know there is no command line option available for this option.
>
>Now you are ready to run it in LTSPICE.
>
>Best Regards
>Helmut
>
>
>Stuart's complete netlist file(output.net) for LTSPICE: amp.cir

[snipped]

Hi Helmut: For some reason, I never saw this reply from you until
today, when I re-downloaded last 500 messages (due to a problem I was
having). So, belated thanks!

--
Terry Pinnell
Hobbyist, West Sussex, UK

Mike Engelhardt

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Jun 13, 2003, 3:16:26 PM6/13/03

to

Stuart,

> I'm back. Now my problem is that when I try running my netlist using
> LTSpice, I get a pop-up box saying "doAnalysis: Matrix is singular".
> So my question is now: what does it mean when the matrix is singular?

> And how do I fix the problem & simulate my circuit?
>
> Yes, I know -- mathematically speaking -- what a singular matrix is.
> The question is: what kind of circuit problems give rise to a
> singular matrix?
>
> I have put the SPICE netlist and images of the circuit on:
>
> http://www.brorson.com/gEDA/index.html
>
> Any and all suggestions are welcome.

As Helmut pointed out, LTspice was having with the OP177 macro model.
It uses a 1 microOhm resistance and that aggravated round-off errors
in the sparse matrix solver.

There's a new version of LTspice that includes a new sparse matrix
solver as part of an alternate solver. To run your circuits,
please try the following;

1. Update to LTspice version 2.03g
2. Go to Tools=>Control Panel=>SPICE
i) Select the Alternate solver instead of the normal one.
ii) set the default integration method to Gear
iii) Check "Skip Gmin Stepping"

Then your circuit should run without any problem. Thanks for the
report. It was an interesting problem to solve.

(Of course, credit to Analog and Helmut for pointing out you
could run your deck with relaxed tolerances in the old version
of LTspice.)

--Mike

analog

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Jun 14, 2003, 11:35:38 AM6/14/03

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Mike Engelhardt wrote:
...

> There's a new version of LTspice that includes a new sparse matrix
> solver as part of an alternate solver.

...
Hi Mike,

Thanks for another great update.

I hope your long newsgroup silence and web site update inactivity
at least partially correlates with a relaxing and rejuvenating
holiday! :) (And not that you've simply been at work, head down,
furtively pedaling away just to flatten your nose on the corporate
grindstone - my selfish interest in your maintaining LTspice's
razor sharp cutting edge notwithstanding.)

Come to think of it, with all the work that must have gone into
developing a successful new matrix solver, you probably don't have
much nose left to take on holiday. Well, no rest for the wicked,
they say.

And "speaking" of no rest, how much work could it be, relatively
speaking, to modify LTspice (a la the "0" hotkey) to make it able
to change the value of a resistor or other component on the fly
during a simulation run?

Imagine a new dot command called ".keystep" or an extension to the
existing ".step" command that would allow "up" and "down" hotkeys
to be defined so that the range of parameter values could be
traversed during a run simply by pressing the appropriate hotkey.

Typical example of the extended syntax might be:
.step oct v1 1 20 5 upkey=']' downkey='['
.step param RLOAD LIST 5 10 15 upkey=F12 downkey=F11
.step NPN 2N2222(VAF) 50 100 25 upkey=uparrow downkey=downarrow
.step temp -55 125 10 upkey='h' downkey='c'

Perhaps defining up and down hotkeys should supersede and block
standard parameter stepping via the usual multiple runs?

analog

PS: welcome back.

Mike Engelhardt

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Jun 16, 2003, 11:19:24 AM6/16/03

to

Analog,

> Thanks for another great update.

> I hope your long newsgroup silence and web site update
> inactivity at least partially correlates with a relaxing
> and rejuvenating holiday! :) (And not that you've simply
> been at work, head down, furtively pedaling away just to
> flatten your nose on the corporate grindstone - my
> selfish interest in your maintaining LTspice's razor
> sharp cutting edge notwithstanding.)
>
> Come to think of it, with all the work that must have gone
> into developing a successful new matrix solver, you probably
> don't have much nose left to take on holiday. Well, no rest
> for the wicked, they say.

Yeah, implementing the matrix solver took up most of the six
weeks. It's incompatible with standard SPICE methods so I had
to also make a version of LTspice that could interface to it.
Big job since it meant edits to many thousands of functions.
The program grew from under 300K lines to over 400K lines of
code. But I did have a couple family visits to deal with and
some remodeling of a few bathrooms and the kitchen during that
time.

> And "speaking" of no rest, how much work could it be,
> relatively speaking, to modify LTspice (a la the "0" hotkey)
> to make it able to change the value of a resistor or other

> component on the fly during a simulation run?[...]

This is something that comes in and out of priority. Sometimes
I get a clear vision has to what it should look like and other
times I get swamped with other problems. I expect that
eventually this capability will get implemented in LTspice.

--Mike

Kevin Aylward

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Jun 16, 2003, 12:23:40 PM6/16/03

to

Mike Engelhardt wrote:
> Analog,
>
>> Thanks for another great update.
>
>> I hope your long newsgroup silence and web site update
>> inactivity at least partially correlates with a relaxing
>> and rejuvenating holiday! :) (And not that you've simply
>> been at work, head down, furtively pedaling away just to
>> flatten your nose on the corporate grindstone - my
>> selfish interest in your maintaining LTspice's razor
>> sharp cutting edge notwithstanding.)
>>
>> Come to think of it, with all the work that must have gone
>> into developing a successful new matrix solver, you probably
>> don't have much nose left to take on holiday. Well, no rest
>> for the wicked, they say.
>
> Yeah, implementing the matrix solver took up most of the six
> weeks. It's incompatible with standard SPICE methods so I had
> to also make a version of LTspice that could interface to it.
> Big job since it meant edits to many thousands of functions.
> The program grew from under 300K lines to over 400K lines of
> code. But I did have a couple family visits to deal with and
> some remodeling of a few bathrooms and the kitchen during that
> time.

Wow...100k lines of code in 6 weeks, that's 100k/6/5=3,300 lines a day,
and doing the bathroom and kitchen as well. Simply amazing...

Mike Engelhardt

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Jun 16, 2003, 12:33:44 PM6/16/03

to

Kevin,

> > Yeah, implementing the matrix solver took up most of the six
> > weeks. It's incompatible with standard SPICE methods so I had
> > to also make a version of LTspice that could interface to it.
> > Big job since it meant edits to many thousands of functions.
> > The program grew from under 300K lines to over 400K lines of
> > code. But I did have a couple family visits to deal with and
> > some remodeling of a few bathrooms and the kitchen during that
> > time.

> Wow...100k lines of code in 6 weeks, that's 100k/6/5=3,300 lines a day,
> and doing the bathroom and kitchen as well. Simply amazing...

That was *three* bathrooms. But fortunately, not every line had to
be edited, except for the new matrix solver, the other functions
just needed a different calling method.

--Mike

spiri...@gmail.com

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Jun 16, 2015, 5:45:44 PM6/16/15

to

I have the same problem, when I try to sim welding smps.

dit all things but it do not work, except when remove the opamps from the feedback, sometimes it do start, but most not.

I have file but do not now where to post.

regards