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Help - Staircase generator in SPICE

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David San Segundo Bello

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Mar 31, 1998, 3:00:00 AM3/31/98
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Does anyone knows how to make a staircase generator in SPICE - hSpice?
I know ELDO has a primitive which does exactly what I want, but I need
it in hSpice.

Thanks in advance

--------------------------------------------------------------
David San Segundo
dav...@ice1.el.utwente.nl


Bill S Steele

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Mar 31, 1998, 3:00:00 AM3/31/98
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>Does anyone knows how to make a staircase generator in SPICE - hSpice?
>I know ELDO has a primitive which does exactly what I want, but I need
>it in hSpice.
>

The best method would be to use the PWL capability in the SPICE voltage
independent source. This allows you to define data points that can
describe a waveform.

Regards,

Bill

Randall Aiken

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Mar 31, 1998, 3:00:00 AM3/31/98
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An alternative is to stack up (wire in series) several Vpulse voltage
sources, each with a delayed start and a pulse width equal to the
overall staircase width minus the delay time. The PWL source is easier,
but this works just as well.

Randall Aiken
rea...@innova.net

David San Segundo Bello

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Apr 1, 1998, 3:00:00 AM4/1/98
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Randall Aiken wrote:

Yes, but what I want (and that's the difficulty) is something like a
subcircuit to which you pass the initial voltage, the voltage step and the
time step, and it builds the waveform. I'm afraid that this is something
difficult (impossible?) to build in SPICE.

David San Segundo
dav...@ice1.el.utwente.nl


Bill S Steele

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Apr 3, 1998, 3:00:00 AM4/3/98
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You can do this depending on what type of SPICE you are using. I know
with the Micro-Cap simulator, you can create a macro circuit that
contains a PWL source and pass it 4 parameters from the circuit that
calls the macro component. The PWL would need to be defined as:

pwl 0,v0 (t1-trise),v0 t1,(v0+vstep) (2*t1-trise),(v0+vstep)
+(2*t1),(v0+2*vstep) (3*t1-trise),(v0+2*vstep) (3*t1),(v0+3*vstep)
+(4*t1-trise),(v0+3*vstep) (4*t1),(v0+2*vstep)
+(5*t1-trise),(v0+2*vstep) (5*t1),(v0+vstep) (6*t1-trise),(v0+vstep)
+(6*t1),v0

where v0 is the initial voltage, vstep is the stepped voltage, t1 is
the timestep, and trise is the rise and fall time. This solution is
all dependent on whether your simulator can pass parameters to a PWL
source through either a macro or a subcircuit.

Regards,

Bill

John

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Apr 8, 1998, 3:00:00 AM4/8/98
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Bill S Steele wrote:

> >> > >Does anyone knows how to make a staircase generator in SPICE -
> hSpice?
> >> > >

counter and dac?


Tom Bruhns

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Apr 8, 1998, 3:00:00 AM4/8/98
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David San Segundo Bello (dees...@arrakis.es) wrote:

: Yes, but what I want (and that's the difficulty) is something like a


: subcircuit to which you pass the initial voltage, the voltage step and the
: time step, and it builds the waveform. I'm afraid that this is something
: difficult (impossible?) to build in SPICE.

Hmmm...certainly not impossible! I can imagine building such a thing,
controlled by, say, three input voltages, by using dependent sources,
switches, and capacitors (to integrate currents). The cleanest way, using
that approach, might be to have two caps, with a switch which let one
integrate for the duration of a step, then let the other integrate
for the duration of the next step. A switch would select for output
the one which was "holding". The time duration could be controlled
by integrating 1/(time_input_control) onto a third cap up to a
threshold, and resetting. (Some of this may assume Spice3, with which
I am most familiar.) Note that using this approach, each of the three
parameters may vary over the duration of an analysis. Beware of
transients in the simulator that can be excited by discontinuities!

--
Cheers,
Tom
to...@lsid.hp.com

James W. Swonger

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Apr 9, 1998, 3:00:00 AM4/9/98
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In more practical terms, a set of pulse voltage sources and binary-
weighted resistors summed into a vcvs will give you an ideal staircase.
You set the pulse timing widths and delays in binary multiples as well.
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