Electrostatic Discharge NOT a Problem ?!? (Help!)
bh...@tgac.com
Electrostatic Discharge NOT a Problem ?!? (Help!)
Hi All,
I was hoping some knowlegable people out there could help me resolve a
minor debate that I started at my new job. I was resently hired by my
company as a programmer, but out of necessity I have been learning to do
a lot of MIS stuff.
Much to my surprise I found out the nobody in this company follows ANY
ESD protection protocols despite the fact that we build and repair a lot
of IBM PC's and home security systems containing IC's.
People freely handle without grounding CPU's, simms, mother boards,
hardrives, etc...
Not surprising to me we get a lot of intermittant and unexplained
problems, but my supervisors seem content to blame them on the
complexity of our IS infrastructure, the fact the windows 95 and NT are
buggy, the fact the some of our equipment is old, and that new parts are
frequently faulty and just need to be returned to the manufacturer.
I think we are destroying a lot of our own equipment and am tired of
dealing with the headaches of unstable systems. I maybe spend 10% of my
time doing the job I was hired for and I am tired of that.
Nevertheless, I am not a hardware person and really don't know what sort
of innovations have occured in ESD resistant IC's over the last 10
years. So I have four questions to ask of those of you who really know:
1) How important are ESD safety protocols now a days?
2) How do we know if we have a problem?
3) What protocols should we be following (a reference to a book or
website would be nice)?
4) If ESD is importent, what evidence can I show my supervisors to
convince them?
I would really appreciate your advice.
Thank You
Michael Michalchik
P.S. We're still a great security company!
Jarek Lis
In sci.electronics.basics bh...@tgac.com wrote:
: Electrostatic Discharge NOT a Problem ?!? (Help!)
: Much to my surprise I found out the nobody in this company follows ANY
: ESD protection protocols despite the fact that we build and repair a lot
: of IBM PC's and home security systems containing IC's.
: People freely handle without grounding CPU's, simms, mother boards,
: hardrives, etc...
: Not surprising to me we get a lot of intermittant and unexplained
: problems, but my supervisors seem content to blame them on the
: complexity of our IS infrastructure, the fact the windows 95 and NT are
: buggy,
Worked for similar company, and, well ..... from practical point
of view, you can freely handle CPU, simms, MB, HD, etc.
Less than 1% of parts bought fail, not necessarily due to ESD.
Assembled computers are still working after years of use.
Personally, the only ESD protection I use is touching metal case first.
: 4) If ESD is importent, what evidence can I show my supervisors to
: convince them?
Wear rubber boots, wool sweater, ask for few pre-checked parts,
do some steps, touch part [you should see/feel small spark], and
ask to check part again.
Jaroslaw Lis
+------------------------------------------------------------------------+
| l...@ict.pwr.wroc.pl | Institute of Engineering Cybernetics |
| tel 48-71-202636 | Technical University of Wroclaw, Poland |
| fax 48-71-203408 or 517398 | |
+------------------------------------------------------------------------+
Bill Turner
bh...@tgac.com wrote:
>Electrostatic Discharge NOT a Problem ?!? (Help!)
>
>Hi All,
>
>I was hoping some knowlegable people out there could help me resolve a
>minor debate that I started at my new job. I was resently hired by my
>company as a programmer, but out of necessity I have been learning to do
>a lot of MIS stuff.
>
>Much to my surprise I found out the nobody in this company follows ANY
>ESD protection protocols despite the fact that we build and repair a lot
>of IBM PC's and home security systems containing IC's.
>
>People freely handle without grounding CPU's, simms, mother boards,
>hardrives, etc...
--------------------------------------------------
This is truly amazing this far along in the digital age. I am a manufacturing
engineer at an aircraft electronics company, and one of my job duties is
instructing employees in ESD (electrostatic discharge) protection. Without
going into great detail, I can assure you that modern ICs, especially the CMOS
type are HIGHLY susceptible to damage from static electricity. The amount
needed to do damage is so small you will never feel it yourself. A
low-voltage discharge into an IC may not destroy it outright, but it can cause
serious degradation which can lead to failure later. A high-voltage discharge
(one you can feel) is almost certain death.
I find it incredible that a security company could be so blase about ESD.
Aren't your products supposed to be dependable? What happens if an alarm
system fails due to ESD damage? Perhaps you should have your corporate lawyer
explain the concept of "negligence"....?
73, Bill W7TI
w...@eskimo.com
Roy McCammon
bh...@tgac.com wrote:
> .. that new parts are
> frequently faulty and just need to be returned to the manufacturer.
The quality of ic's coming from the manufacturers is really very high.
If you are getting a lot of bad new parts, someone is probably
mishandling
them along the way. A good trick is to find out how many ic's come
in a tube from the manufacturer and order in multiples of that
amount. That way you are likely to be the first person to touch them
after they leave the manufacturer.
--
My real e-mail address is rbmcc...@mmm.com
Bill Turner
"Richard M." <bo...@serv.net> wrote:
<snip>
>Well, I won't argue that ESD *CAN* be a probelm, but in the practical
>world of circuit boards already manufactured and stuffed... it is more
>hype than anything else. How do you think an ESD bag prevents damage?
>It provided a path for conduction other than THROUGH the device... not
>many circuit boards have floating traces and most traces are coated
>anyway.
<snip>
An ESD bag prevents damage in two ways: 1. By conducting static charges to
ground, and 2. By providing a conductive (Faraday) shield around the static
sensitive components. Older technology bags made of anti-static pink
polyethylene can do the former but not the latter. Newer technology bags are
made of metallized plastic and can do both.
It's not well known, but it isn't necessary for a charged object to actually
TOUCH a component - all that is needed is for the component to be present in
the electric field and damage can be done. In this case, coating is absolutely
no protection at all. For example, the worst way to ship a PC board would be
to wrap it in a so-called antistatic "pink poly" bag and place it in a box
surrounded by styrofoam peanuts. Goodbye board, if not immediately, then
later.
>There is a lot of money to be made by taking a known fact and hyping it
>to the point that people think things are PRONE to damage. That just is
>not the case. My best analogy is a person spending 60-100 bucks on an
>ISObar to protect his computer from transients. Why not put one on your
>stereo? TV? etc. etc. etc.
>
>Look at 3M... their model 746 "wristrap tester" is $369. Someone is
>making a bunch of money on the hype of a not-so-sever issue. Of course
>it does matter if you live in Washington or Arizona (humidy is a big
>factor in static E)
I agree that wrist strap monitors (not "testers") are pretty expensive.
("Testers" are cheap.) Because of this, four years ago I designed a monitor
for my company. It uses about $26 worth of parts and requires about 1/2 hour
of labor to manufacture. We have about 150 of them in use throughout the
plant. $369 is indeed a ripoff.
>> The amount
>> needed to do damage is so small you will never feel it yourself. A
>> low-voltage discharge into an IC may not destroy it outright, but it can cause
>> serious degradation which can lead to failure later. A high-voltage discharge
>> (one you can feel) is almost certain death.
>
>Which is why one ony need touch a grounded object before handling the
>device. If you are pulling a circuit card from a PC...just touch the
>case before removing the card. In 17 years I have never had a failure
>on any compnent that I could attribute to ESD... and I stopped using
>grounding straps long ago when I became educated on the subject.
>The more you know... the less they can BS you. :)
<snip>
Thinking that one only needs to touch a grounded object once is a common
fallacy. Using a static meter in my new employee training class, I
demonstrate that they are CONSTANTLY generating static. I have them touch a
grounded object, then just stand up and sit down or shuffle their feet a
little. The normal wiggling around in a chair can easily generate a 500 volt
charge - way more than enough to do damage. It's a real eye-opener. And I
suspect you've had any number of failures from ESD that you thought were just
"bad parts". That's what is so sneaky about it. You must either wear a
properly grounded wrist strap or work under an ionizer. There's no other way.
>>
>> I find it incredible that a security company could be so blase about ESD.
>> Aren't your products supposed to be dependable? What happens if an alarm
>> system fails due to ESD damage? Perhaps you should have your corporate lawyer
>> explain the concept of "negligence"....?
>
>You are jusy adding to the hype, Bill.
>You should be asking if they have a high rate of failure... I can bet
>that a operating company that does not spend money on extensive ESD
>procedures and appliances is not losing any money from the problem.
>Understand? You couldn't sell me an ESD prevention device, because I
>don't have a problem with ESD.
<snip>
"Losing money" is not a good evaluation of ESD protective measures. Depending
on how they handle their repair business, it might even be a money maker!!
And what is a "high rate of failure"? In the aircraft electronics business,
which I am in, any failure is one too many.
>In principle it is a good idea when working with $20,000 cards... but
>not when working with off-the-shelf.made-in-japan parts since the
>probability of ESD damage is minimal as long as you don't work on a wool
>stool wearing nylon pants. :)
><snip>
If it has CMOS parts, it is susceptible. If it has only bipolar transistors
or TTL logic, it probably won't be damaged.
>The USAF is BIG on ESD... but not until the new B-1 came to teh northern
>tier. Why did they suddenly need ESD protection where their was none
>before? And please don't tell me the B-52H didn't have third generation
>electronics on it. It was LOADED with microprocessors and controllers.
>There just was never and ESD problem.
<snip>
The Air Force and the other services demand ESD protection because they
examined the issue and found it was important. You can bet it was applied
retroactively to the B-52 as soon as it became apparent. Remember, the
effects of ESD have only become really well known in the last few years. Ten
years ago I was just as ignorant as you.
73, Bill W7TI
w...@eskimo.com
Robert H. Penoyer
>It's not well known, but it isn't necessary for a charged object to actually
>TOUCH a component - all that is needed is for the component to be present in
>the electric field and damage can be done. In this case, coating is absolutely
>no protection at all. For example, the worst way to ship a PC board would be
>to wrap it in a so-called antistatic "pink poly" bag and place it in a box
>surrounded by styrofoam peanuts. Goodbye board, if not immediately, then
>later.
Excuse me, but this sounds like nonsense. How can any static field
created by styrofoam peanuts affect a PC board in a pink poly bag? The
field created by the peanuts is like a high voltage from a very high
impedance source. The pink poly is conductive and, thus, presents a
low impedance to the static field. It will conduct nearly all of any
potential difference through the surface of the bag so that any
components in the bag are bypassed. Thus, virtually no potential
difference will exist "across" the bag or the components inside.
Gary Morris
bh...@tgac.com wrote:
>
> Electrostatic Discharge NOT a Problem ?!? (Help!)
>
> Hi All,
>
> I was hoping some knowlegable people out there could help me resolve a
> minor debate that I started at my new job. I was resently hired by my
> company as a programmer, but out of necessity I have been learning to do
> a lot of MIS stuff.
>
> Much to my surprise I found out the nobody in this company follows ANY
> ESD protection protocols despite the fact that we build and repair a lot
> of IBM PC's and home security systems containing IC's.
>
> People freely handle without grounding CPU's, simms, mother boards,
> hardrives, etc...
>
> problems, but my supervisors seem content to blame them on the
> complexity of our IS infrastructure, the fact the windows 95 and NT are
> frequently faulty and just need to be returned to the manufacturer.
>
> dealing with the headaches of unstable systems. I maybe spend 10% of my
> time doing the job I was hired for and I am tired of that.
>
> Nevertheless, I am not a hardware person and really don't know what sort
> of innovations have occured in ESD resistant IC's over the last 10
> years. So I have four questions to ask of those of you who really know:
>
> 1) How important are ESD safety protocols now a days?
>
> 2) How do we know if we have a problem?
>
> 3) What protocols should we be following (a reference to a book or
> website would be nice)?
>
> convince them?
>
The company I work for ignored ESD for years and only within the past 6
months has set up work stations and procedures to address ESD. I can
offer two pieces of anecdotal evidence that protection against ESD is
important:
1. Our printed circuit assembler was being blamed for delivering bad
circuit board assemblies because boards were not working when installed
in equipment although they had been tested by the assembly house. I
noticed that the problems with the faulty boards were almost always
failure of one of the two I.C.'s that have pins that float when the
boards are not installed in equipment. I believe the unterminated I.C.
pins are especially susceptible to ESD damage and that our own
assemblers, handling the boards without taking ESD precautions were
blowing the chips.
2. We have a software engineer who handles quite a few 27C512 EPROMs
and NEVER observes ESD precautions. I observe ESD precautions as
rigorously as I can and mostly handle 27C256 EPROMs. I have the UV EPROM
eraser on my bench so I erase and check essentially all of the EPROMs. I
end up throwing away a LOT of failed 27C512 EPROMs. I suspect they have
been destroyed by ESD. Very seldom do I find a failed 27C256 EPROM.
--
Gary Morris
gmo...@gv.net
Dan Metzger
>> it isn't necessary to actually TOUCH a component
> this sounds like nonsense.
I got hold of a video training tape produced by Floating Point Systems
(never mind how) in which they make the same assertion, and procede to
document it. I show the video to all my students. They take ESD very
seriously there.
The tape documents subliminal voltages slowing the response time of
logic gates and reducing logic high levels without actually destroying
the chips. Photomicrographs of ESD damage to ICs are included.
No, I don't know where to get copies of the tape.
-Dan Metzger, K8JWR
Richard M.
Robert H. Penoyer wrote:
> ESD is too easy to blame for failures when no other explanation has
> been identified. Unfortunately, the blaming of ESD for known or
> "anticipated" failures has begun to reach into the area of urban
> legend. "Everybody knows" ESD is very dangerous to modern
> electronics--so it must be true.
>
> It is my contention that reasonable precautions prevents virtually all
> true ESD failures. Simply ensure you are at the same potential as the
> sensitive parts befor handling them: touch a chassis before removing a
> PC card from a system; touch the ground plane/pin of a PC card before
> picking it up from a bench; when installing a PC card into a system,
> and the card is safely in hand, ensure the card cannot carry any ESD
> to the unit where it will be installed by touching the chassis of the
> unit with your free hand.
All excellent advise, Robert.
An Urban Legend it has become.
--
***DO NOT REPLY TO digi...@BOGUS.net***
Send mail to digi...@serv.net or
Click here -> mailto:digi...@serv.net
***DO NOT REPLY TO digi...@BOGUS.net***
Richard M.
Bill Turner wrote:
> >People freely handle without grounding CPU's, simms, mother boards,
> >hardrives, etc...
> --------------------------------------------------
> This is truly amazing this far along in the digital age. I am a manufacturing
> engineer at an aircraft electronics company, and one of my job duties is
> instructing employees in ESD (electrostatic discharge) protection. Without
> going into great detail, I can assure you that modern ICs, especially the CMOS
> type are HIGHLY susceptible to damage from static electricity.
Well, I won't argue that ESD *CAN* be a probelm, but in the practical
world of circuit boards already manufactured and stuffed... it is more
hype than anything else. How do you think an ESD bag prevents damage?
It provided a path for conduction other than THROUGH the device... not
many circuit boards have floating traces and most traces are coated
anyway.
There is a lot of money to be made by taking a known fact and hyping it
to the point that people think things are PRONE to damage. That just is
not the case. My best analogy is a person spending 60-100 bucks on an
ISObar to protect his computer from transients. Why not put one on your
stereo? TV? etc. etc. etc.
Look at 3M... their model 746 "wristrap tester" is $369. Someone is
making a bunch of money on the hype of a not-so-sever issue. Of course
it does matter if you live in Washington or Arizona (humidy is a big
factor in static E)
> The amount
> needed to do damage is so small you will never feel it yourself. A
> low-voltage discharge into an IC may not destroy it outright, but it can cause
> serious degradation which can lead to failure later. A high-voltage discharge
> (one you can feel) is almost certain death.
Which is why one ony need touch a grounded object before handling the
device. If you are pulling a circuit card from a PC...just touch the
case before removing the card. In 17 years I have never had a failure
on any compnent that I could attribute to ESD... and I stopped using
grounding straps long ago when I became educated on the subject.
The more you know... the less they can BS you. :)
>
> I find it incredible that a security company could be so blase about ESD.
> Aren't your products supposed to be dependable? What happens if an alarm
> system fails due to ESD damage? Perhaps you should have your corporate lawyer
> explain the concept of "negligence"....?
You are jusy adding to the hype, Bill.
You should be asking if they have a high rate of failure... I can bet
that a operating company that does not spend money on extensive ESD
procedures and appliances is not losing any money from the problem.
Understand? You couldn't sell me an ESD prevention device, because I
don't have a problem with ESD.
In principle it is a good idea when working with $20,000 cards... but
not when working with off-the-shelf.made-in-japan parts since the
probability of ESD damage is minimal as long as you don't work on a wool
stool wearing nylon pants. :)
The USAF is BIG on ESD... but not until the new B-1 came to teh northern
tier. Why did they suddenly need ESD protection where their was none
before? And please don't tell me the B-52H didn't have third generation
electronics on it. It was LOADED with microprocessors and controllers.
There just was never and ESD problem.
>
> 73, Bill W7TI
> w...@eskimo.com
--
***REPLY ADDRESS REQUIRES MODIFICATION***
Change to: digi...@serv.net
or click here -> mailto:digi...@serv.net
(getting too much junk mail)
Robert H. Penoyer
>1. Our printed circuit assembler was being blamed for delivering bad
>circuit board assemblies because boards were not working when installed
>in equipment although they had been tested by the assembly house. I
>noticed that the problems with the faulty boards were almost always
>failure of one of the two I.C.'s that have pins that float when the
>boards are not installed in equipment. I believe the unterminated I.C.
>pins are especially susceptible to ESD damage and that our own
>assemblers, handling the boards without taking ESD precautions were
>blowing the chips.
Unterminated pins must rely solely on the input protection circuitry
in the IC. Thus, your belief is probably valid.
>2. We have a software engineer who handles quite a few 27C512 EPROMs
>and NEVER observes ESD precautions. I observe ESD precautions as
>rigorously as I can and mostly handle 27C256 EPROMs. I have the UV EPROM
>eraser on my bench so I erase and check essentially all of the EPROMs. I
>end up throwing away a LOT of failed 27C512 EPROMs. I suspect they have
>been destroyed by ESD. Very seldom do I find a failed 27C256 EPROM.
EPROMs are notorious for developing erasure failures. Sometimes a bit
cannot be erased by any means. Or, an erasure can sometimes be
accomplished on a "stubborn" device by extending the recommended
erasure period by five minutes; therefore, what might have been
checked off as a failed device can continue to be used.
It appears that the intensity of of the UV lamps shortens the life of
EPROMs. If you occasionally "forget" the EPROMs and leave them under
the lights for extended periods, or if the eraser's timer gets stuck,
these conditions might be more responsible for device failures than
ESD.
The software engineer you refer to could very likely be making
frequent changes in his code and, thus, be performing lots of erasures
on the same devices. Repeated exposure to the UV lights could be the
problem. The other EPROMs you refer to are probably not programmed and
erased as often as those used by the software engineer.
Robert H. Penoyer
>>> it isn't necessary to actually TOUCH a component
>> this sounds like nonsense.
>I got hold of a video training tape produced by Floating Point Systems
>(never mind how) in which they make the same assertion, and procede to
>document it. I show the video to all my students. They take ESD very
>seriously there.
You've taken my comment out of context. I specifically addressed the
issue of the "danger" of putting a PC card inside a pink poly bag and
then putting the bag into styrofoam peanuts.
If the company you refer to claims that something in a pink poly bag
is in danger if it's in styrofoam peanuts, they are probably wrong for
the reasons I gave in my newsgroup post. Pink poly bags were
specifically designed to give protection against ESD. They DO that!
They do it if the bag lays on a bench, is held in a stock bin, is
handled, or is put in a box filled with styrofoam peanuts.
Do not mistake my comments to suggest ESD is not a threat to sensitive
electronics, it definitely is a threat. However, the hysteria
surrounding the purported dangers of ESD is excessive. Simple,
reasonable measures prevent damage due to ESD. The assertion that pink
poly bags don't provide adequate protection when placed in styrofoam
is part of that hysteria.
Bob Myers
Robert H. Penoyer (rpen...@pacbell.net) wrote:
> You've taken my comment out of context. I specifically addressed the
> issue of the "danger" of putting a PC card inside a pink poly bag and
> then putting the bag into styrofoam peanuts.
> If the company you refer to claims that something in a pink poly bag
> is in danger if it's in styrofoam peanuts, they are probably wrong for
> the reasons I gave in my newsgroup post. Pink poly bags were
> specifically designed to give protection against ESD. They DO that!
> They do it if the bag lays on a bench, is held in a stock bin, is
> handled, or is put in a box filled with styrofoam peanuts.
Well, "pink poly" certainly helps, but it's NOT perfect, and the original
poster's comments agree with my experience (and we've got a number of
photographs around here which show nicely blasted devices).
The problem is that while pink poly is conductive enough to be static
DISSIPATIVE - it will NOT support a charge on its surface if it's in
contact with anything remotely like "ground" - it is NOT conductive enough
to be considered a proper shield, and devices inside can still be damaged
if exposed to sufficiently high external fields. You get better protection
from the metallized-mylar sorts of antistat bags.
This isn't to say that pink poly doesn't do anything or is of no value,
but it's not an impenetrable shield which suddenly confers ESD-invulnerability
on anything placed inside.
> Do not mistake my comments to suggest ESD is not a threat to sensitive
> electronics, it definitely is a threat. However, the hysteria
> surrounding the purported dangers of ESD is excessive. Simple,
> reasonable measures prevent damage due to ESD. The assertion that pink
> poly bags don't provide adequate protection when placed in styrofoam
> is part of that hysteria.
Well, that depends on just how sensitive the devices are, doesn't it?
Admittedly, you can carry ESD protection too far - after one of our
stockrooms "got religion" about ESD, I used to routinely receive
transformers in metallized mylar (although the pins were still stuck in
styrofoam! :-)). But I'd rather someone err on the side of caution than
get so lax that they simply shove a VLSI part into a paper bag. Many people
simply aren't equipped to make the judgement call, so that best practice is
"do everything".
Bob Myers | my...@fc.hp.com
Senior Engineer, Displays | Note: The opinions presented here
Workstation Systems Division | are not those of my employer.
Hewlett-Packard Co., Ft. Collins, CO |
Joe Seymour
: 2) How do we know if we have a problem?
: 3) What protocols should we be following (a reference to a book or
: website would be nice)?
: 4) If ESD is importent, what evidence can I show my supervisors to
: convince them?
I work in a manufacturing plant for a company that knows a thing or two
about electronics. Every person who routinely handles any part must attend
an ESD training session and also must be recertified every two years. We all
wear footstraps and wriststraps and many areas also require conductive
smocks. We have done study after study and they always, every single time,
show the effectiveness of using ESD precautions. Before we had a factory
wide or corporate wide standard, we would have to justify the efforts and
cost to almost every new EE or manager. The usual line is that the amount of
failures induced by ESD that we catch in our test processes don't justify
the cost of prevention. In some cases they are right, you can buy a lot of
parts for the cost of one wrist strap testor. The part that they almost
always forget to include is the cost of one single warranty failure. The
cost to send an engineer out to a customer's site to troubleshoot, fix and
recalibrate the equipment is a lot higher than what we spend on precautions.
Not to mention the cost of having unhappy customers. We measure the success
of our ESD programs by the reduction in warranty costs and repeat business.
Many test processes will not catch a part that has merely been wounded by
ESD. It will live long enough to become an important part of a customer's
test solution and then fail. This usually affects our customer's customers
also.
There are certainly a lot of parts that have little or no sensitivity to
ESD. It is too confusing and too difficult to implement processes that allow
different levels of precautions. We treat everything except hardware (nuts,
bolts, sheetmetal,etc) as static sensitive. Even the hardware has to be
"de-trashed" (get rid of any static generators like packing materials)
before being brought into a static safe environment. All production areas
and production work sufaces are clearly identified as to whether they are
"Static Safe" or "NOT Static Safe". As anecdotal proof; many of the
production folks build and test their own work. If someone walks into their
area without heel straps, the production folks are the first to yell at you.
They just spent a lot of time building a product and they know that you can
damage it and they won't let you get near it or touch it unless you are
safe. This is true for raw parts, pc boards, sub-assemblies or finished
goods.
If you work in a static safe area, you put on heel straps and test them
before entering. If you are working at a static safe bench, you wear a
wrist strap. The wrist strap gets checked daily. In areas like
microelctronics, many workstations have continuous wrist strap monitoring.
There are many myths about ESD:
Only CMOS is ESD sensitive wrong
parts in pc boards are safe wrong
occassionally discharging myself is enough Wrong!
you can damage a part just by approaching it with
high levels of static on your clothes. You want to
prevent static from building up, not just discharge it
when it occurs.
make everything conductive wrong
you do not want to have conductive worksurfaces, this
provides an easy path for induced voltages to
discharge thru your parts. It can also be hazardous
to your personnel as well.
if I damage it, test will catch it wrong
unless you are doing semi-conductor parameter testing,
you may not even get a clue that something is wrong
I'd know or feel it if I had static wrong
it takes 3000 to 5000 volts of static electricity for
most people to feel the discharge. I've measured folks
who had more than 12,000 volts and I'm sure they were
much higher, but that is as far as my meter went.
There are lots more, I am guilty of assuming that some of the women who
had particularly long hair were less static safe than their co-workers.
Turns out, when we measured them (with their permission), most of the
women had static safe hair (V<100) and many of the men did not. The women
were using static-free shampoo and the men were not.
You probably don't need to use ESD precautions if you don't plan to sell
your product to anybody in the government, electronics industry, military,
or anywhere overseas. There are TIA standards, FED standards, MIL standards,
ANSI standards, ISO standards, EU standards, IEC standards and EIA
standards. All of these groups are convinced that ESD precautions are
important and they have many, many rules governing manufacturing in ESD
safe environments.
You could start with MIL-HDBK-263B ESD Control Handbook for Protection of
Electrical and Electronic Parts, Assemblies, and Equipment. Also, most
electronics industry trade journals have lots of references. Try
"EE Evaluation Engineering", the magazine of electronic evaluation and test,
they have a regular department on ESD, with monthly articles.
Michael Mirabile
Robert,
Maybe you're the one who needs to update your information.
My company required me to take an ESD training class a couple of years
ago. Here'e what I learned:
Pink poly bags do NOT provide adequate protection against ESD. Pink
poly bags are made out of a conductive type of plastic. ESD can be
conducted THROUGH the bag and onto the electronic components inside.
Since styrofoam peanuts is a very good source of static electricity,
placing a PC board inside a pink poly bag in styrofoam peanuts is asking
for trouble.
The metalized film (silverish-gray) bags are much better at protecting
electronic components against ESD. These bags, when folded over and
sealed, produce a Faraday Cage around the components inside.
NEVER, EVER, EVER, EVER, use styrofoam peanuts for shipping electronic
components! There are other packing materials which are designed
specifically for this task and do NOT generate static electricity.
Michael Mirabile
---
Robert H. Penoyer wrote:
>
> >>> it isn't necessary to actually TOUCH a component
>
> >> this sounds like nonsense.
>
> >I got hold of a video training tape produced by Floating Point Systems
> >(never mind how) in which they make the same assertion, and procede to
> >document it. I show the video to all my students. They take ESD very
> >seriously there.
>
> You've taken my comment out of context. I specifically addressed the
> issue of the "danger" of putting a PC card inside a pink poly bag and
> then putting the bag into styrofoam peanuts.
>
> If the company you refer to claims that something in a pink poly bag
> is in danger if it's in styrofoam peanuts, they are probably wrong for
> the reasons I gave in my newsgroup post. Pink poly bags were
> specifically designed to give protection against ESD. They DO that!
> They do it if the bag lays on a bench, is held in a stock bin, is
> handled, or is put in a box filled with styrofoam peanuts.
>
andi
In article <32DAF2...@tgac.com>, bh...@tgac.com writes
>I think we are destroying a lot of our own equipment and am tired of
>dealing with the headaches of unstable systems. I maybe spend 10% of my
>time doing the job I was hired for and I am tired of that.
How committed to improvement are your management? If they take the
problem of failures seriously they would invest some time in finding the
cause of these failures. Are your management aware of where your time
is spent? What measurements do you have planned to prove the existence
of failures due to static? What other causes of failure could be
investigated? Just some questions to get you thinking about solving the
problems. Find the variation in the process and attempt to control it.
ESD may be a cause, but there may be others too. We have had faulty
batches of ICs from suppliers but this is rare.
Our company uses Total Quality Management which allows the employees
to analyse what failures occur. Finding the root cause of failures is
only part of it. Convincing the management to be committed to constant
improvement is difficult. Even if you find that ESD is causing the
problems, how certain are you that they will invest in equipment and
precautions?
My experience of problems due to static is that the ICs themselves
can not dump the energy anywhere except into the chip. However, once
placed into a circuit the energy is dissipated across the circuit and
reduces the incidence of damage. You mentioned handling of CPUs, this
may require wrist straps to ensure a low percentage of CPU failures. It
worked for us due to the high number of CMOS ICs inserted by hand
especially during the test stages of manufacture. We invested in wrist
straps for every stage of manufacture as a precaution although it was
realised that fully built boards are not as susceptible to failure.
I hope this helps, and good luck.
An...@apmawds.demon.co.uk
--
Andrew Mawdsley \ No email adverts please
Electronic design, \ 'Reply-to' in header disabled
production engineer \
PAC International LTD. \ Pride prevents learning
Manchester, England. \ from mistakes
And...@pac-intl.mhs.compuserve.com \......................
My views are not those of my employers: http://www.pac.co.uk
Robert H. Penoyer
>> You've taken my comment out of context. I specifically addressed the
>> issue of the "danger" of putting a PC card inside a pink poly bag and
>> then putting the bag into styrofoam peanuts.
>> If the company you refer to claims that something in a pink poly bag
>> is in danger if it's in styrofoam peanuts, they are probably wrong for
>> the reasons I gave in my newsgroup post. Pink poly bags were
>> specifically designed to give protection against ESD. They DO that!
>> They do it if the bag lays on a bench, is held in a stock bin, is
>> handled, or is put in a box filled with styrofoam peanuts.
>Well, "pink poly" certainly helps, but it's NOT perfect, and the original
>poster's comments agree with my experience (and we've got a number of
>photographs around here which show nicely blasted devices).
Did the blasted parts get blasted before or after they were put in the
bags, or when they were taken from the bags for testing? How do you
know when the damage occurred?
>The problem is that while pink poly is conductive enough to be static
>DISSIPATIVE - it will NOT support a charge on its surface if it's in
>contact with anything remotely like "ground"
Do I understand what you're saying here? A charge cannot exist on the
bag if the bag is in contact with ground? If I understand your
statement correctly, then I'm not surprised at what you've said
because the bag is conductive! You can get an ohmmeter reading between
any two points on the bag!
>- it is NOT conductive enough
>to be considered a proper shield, and devices inside can still be damaged
>if exposed to sufficiently high external fields.
What is "sufficiently high?" Do you mean to say that there is some
field intense enough to overcome the protective capability of the bag?
If that's what you mean, are you talking about lightening strikes or
some laboratory conditions produced in order to induce a breakdown?
Or, are you talking about the sort of electrostatic fields found where
humans are likely to be?
>You get better protection
>from the metallized-mylar sorts of antistat bags.
I can't argue with that since I don't know how the two bags compare.
(For all I know, the move away from pink poly to metalized mylar was
done because the mylar bags are cheaper--though I don't know the
costs.)
>This isn't to say that pink poly doesn't do anything or is of no value,
>but it's not an impenetrable shield which suddenly confers ESD-invulnerability
>on anything placed inside.
Do the metalized bags?
>> Do not mistake my comments to suggest ESD is not a threat to sensitive
>> electronics, it definitely is a threat. However, the hysteria
>> surrounding the purported dangers of ESD is excessive. Simple,
>> reasonable measures prevent damage due to ESD. The assertion that pink
>> poly bags don't provide adequate protection when placed in styrofoam
>> is part of that hysteria.
>Well, that depends on just how sensitive the devices are, doesn't it?
We're talking ESD sensitive devices: CMOS, MOSFETs, etc. Are your ESD
sensitive parts more sensitive than anybody elses?
>Admittedly, you can carry ESD protection too far - after one of our
>stockrooms "got religion" about ESD, I used to routinely receive
>transformers in metallized mylar (although the pins were still stuck in
>styrofoam! :-)). But I'd rather someone err on the side of caution than
>get so lax that they simply shove a VLSI part into a paper bag. Many people
>simply aren't equipped to make the judgement call, so that best practice is
>"do everything".
How about "do every reasonable thing?" (I know what non-EEs and non-EE
managers would say: they'd say do everything. I want _your_ opinion.)
The issue I've tried to address in this thread is the hysteria in
which the concerns about protection against ESD failures reaches into
the level of religious fervor.
To get back to the point, do you think it's dangerous to put a PC
board in a pink poly bag that is then put into styrofoam peanuts? (I
know there are "pink" peanuts. Assume non-pink for this question.)
Bob Myers
> >poster's comments agree with my experience (and we've got a number of
> >photographs around here which show nicely blasted devices).
> Did the blasted parts get blasted before or after they were put in the
> bags, or when they were taken from the bags for testing? How do you
> know when the damage occurred?
Sorry, I wasn't clear. I'm just saying that I work within short walking
distance of a reasonable collection of component-failure expertise, and
have a slight degree of experience in the field myself. I was not
referring to a stack of photos specifically relating to a "pink poly
experiment". However, I HAVE seen data and analyses from such experiments,
and these do support the conclusion that while pink poly is definitely a
step in the right direction, it's not necessarily the best material
available.
> >The problem is that while pink poly is conductive enough to be static
> >DISSIPATIVE - it will NOT support a charge on its surface if it's in
> >contact with anything remotely like "ground"
> Do I understand what you're saying here? A charge cannot exist on the
> bag if the bag is in contact with ground? If I understand your
> statement correctly, then I'm not surprised at what you've said
> because the bag is conductive! You can get an ohmmeter reading between
> any two points on the bag!
I can get an "ohmmeter reading" between any two points of ANY bag; it's
just a lot higher on some than others! :-) And that's the point; things
are NOT either "conductive" or "non-conductive". Conductivity varies
from material to material. What do you think is SUFFICIENTLY conductive
for this application? 0.001 ohms/square? 10 ohms/square? 10,000 ohms/
square?
In the case of the pink poly bags, they are sufficiently conductive so
as not to support a dangerous level of electrostatic charge. However, they
may NOT be sufficiently conductive so as to provide sufficient attenuation
of fields from a discharage occuring outside the bag. A metal-film layer
does a better job here. The other problem with pink poly is that its
conductivity relies on the presence of a chemical treatment which may
degrade with time. Again, I am NOT saying that this material is "bad" -
it's just that, as with anything, you should know its limitations.
> What is "sufficiently high?" Do you mean to say that there is some
> field intense enough to overcome the protective capability of the bag?
> If that's what you mean, are you talking about lightening strikes or
> some laboratory conditions produced in order to induce a breakdown?
> Or, are you talking about the sort of electrostatic fields found where
> humans are likely to be?
Sufficiently high depends on the devices and conditions in question.
Again, you seem to be looking for black-and-white, go/no go answers
where nothing so simple exists. This isn't a question of perfectly
good vs. completely bad - it's how MUCH better one thing is as compared
with another.
> I can't argue with that since I don't know how the two bags compare.
> (For all I know, the move away from pink poly to metalized mylar was
> done because the mylar bags are cheaper--though I don't know the
> costs.)
I'm sorry, but the above forces me to ask - how familiar are you with
ESD protection in general?
> >This isn't to say that pink poly doesn't do anything or is of no value,
> >but it's not an impenetrable shield which suddenly confers ESD-invulnerability
> >on anything placed inside.
> Do the metalized bags?
Nothing is "impenetrable", which is in part the point. The metal-film
bags (or better yet, storage in metal) are better at this than other
solutions, that's all.
> >> Do not mistake my comments to suggest ESD is not a threat to sensitive
> >> electronics, it definitely is a threat. However, the hysteria
> >> surrounding the purported dangers of ESD is excessive. Simple,
> >> reasonable measures prevent damage due to ESD. The assertion that pink
> >> poly bags don't provide adequate protection when placed in styrofoam
> >> is part of that hysteria.
> >Well, that depends on just how sensitive the devices are, doesn't it?
> We're talking ESD sensitive devices: CMOS, MOSFETs, etc. Are your ESD
> sensitive parts more sensitive than anybody elses?
No, but the assertion given originally MAY BE incorrect in many cases.
Yes, pink poly is better than nothing at all. It's probably even
good enough in the majority of cases. But I do NOT agree with any
suggestion that implies that you can feel perfectly safe simply because
you've got a pile of pink plastic in your production area, or that the
"purported" dangers of ESD have become anything like "hysteria". You
put ESD protection measures in place because you can show your bosses
- the guys who sign the checks, remember? - that they can be economically
justified. And in some cases, these measures can APPEAR to be extreme
when compared to other production lines.
> >Admittedly, you can carry ESD protection too far - after one of our
> >stockrooms "got religion" about ESD, I used to routinely receive
> >transformers in metallized mylar (although the pins were still stuck in
> >styrofoam! :-)). But I'd rather someone err on the side of caution than
> >get so lax that they simply shove a VLSI part into a paper bag. Many people
> >simply aren't equipped to make the judgement call, so that best practice is
> >"do everything".
> How about "do every reasonable thing?" (I know what non-EEs and non-EE
> managers would say: they'd say do everything. I want _your_ opinion.)
> The issue I've tried to address in this thread is the hysteria in
> which the concerns about protection against ESD failures reaches into
> the level of religious fervor.
The problem is that it's generally risky to have the production workers
making the call as to what constitutes a "reasonable thing". This is
especically true if you have a high rate of turnover in that labor force,
or any worker is faced with an unusually wide range of components and
situations. Sure, you could take everyone through the stock room and
say, "THIS needs this sort of protection, THAT needs this other kind, and
this over here doesn't need any at all!" But usually, you're wasting your
money in doing this. Nobody has a perfect memory, and there's ALWAYS
somebody new who hasn't had the training. It is almost always more
cost-effective simply to implement "blanket" procedures and countermeasures
than to try to special-case everything.
And no, the non-EE types generally DON'T say "do everything". They want
justification for spending the money. I remember (he says, pulling up
the rocking chair) back in the dark ages when we were first getting
ESD protection going, we were able to show a correlation between production
yields and relative humidity, and to actually make an estimate of what
ESD was costing us in parts and labor. THAT is what sells the
countermeasures!
In short, I'd much rather see a "religious fervor" about ESD than
to try to implement this sort of thing selectively. The "fervor"
doesn't cost much more (it may even cost less), and I know I've got
MUCH better coverage. I'm no longer involved with our production lines
- instead, in the OEM display business, I'm more often evaluating
somebody ELSE'S production line - and it always bothers me when I see
a plant trying to save pennies by being too selective in this area.
You've got to be REALLY careful once you go down that road.
> To get back to the point, do you think it's dangerous to put a PC
> board in a pink poly bag that is then put into styrofoam peanuts? (I
> know there are "pink" peanuts. Assume non-pink for this question.)
Depends. What's on the board, how will it be handled, etc.? I
wouldn't sweat a power supply being transported like this, but I might
have some concern about a big, expensive processor board with a lot
of 0.25-um CMOS parts on it. Doesn't take too many of those being
blown away to justify the cost of "religious" ESD protection...:-)
If I were going to do something like this, for whatever reason, I'd
sure want to see some analysis of it first.
Robert H. Penoyer
Bob,
Before I begin my comments I want to say that yours are among the most
rational, thoughtful comments on this thread. Translation: I
appreciate your responses.
>> Did the blasted parts get blasted before or after they were put in the
>> bags, or when they were taken from the bags for testing? How do you
>> know when the damage occurred?
>Sorry, I wasn't clear. I'm just saying that I work within short walking
>distance of a reasonable collection of component-failure expertise, and
>have a slight degree of experience in the field myself. I was not
>referring to a stack of photos specifically relating to a "pink poly
>experiment". However, I HAVE seen data and analyses from such experiments,
>and these do support the conclusion that while pink poly is definitely a
>step in the right direction, it's not necessarily the best material
>available.
Granted. However, my assertion that it's adequate still stands.
>> >The problem is that while pink poly is conductive enough to be static
>> >DISSIPATIVE - it will NOT support a charge on its surface if it's in
>> >contact with anything remotely like "ground"
>> Do I understand what you're saying here? A charge cannot exist on the
>> bag if the bag is in contact with ground? If I understand your
>> statement correctly, then I'm not surprised at what you've said
>> because the bag is conductive! You can get an ohmmeter reading between
>> any two points on the bag!
>I can get an "ohmmeter reading" between any two points of ANY bag; it's
>just a lot higher on some than others! :-) And that's the point; things
>are NOT either "conductive" or "non-conductive".
You didn't answer my question. Nevertheless, let's move on.
Untreated bags will likely cause an arc to be drawn between the test
probes before any appreciable current can be conducted along their
surfaces. I'll agree that there isn't a hard distinction between
conductors and nonconductors. However, the pink poly bags are
certainly "semi"-conductors more than they are insulators. They should
have no difficulty conducting away a high impedance electrostatic
field from anything contained inside the bag.
>Conductivity varies
>from material to material. What do you think is SUFFICIENTLY conductive
>for this application? 0.001 ohms/square? 10 ohms/square? 10,000 ohms/
>square?
This is beyond any expertise I am prepared to say I have. My gut says
that 10 K/square is probably more than adequate.
>In the case of the pink poly bags, they are sufficiently conductive so
>as not to support a dangerous level of electrostatic charge.
Hey, we agree on this one. I thought this was the whole issue.
>However, they
>may NOT be sufficiently conductive so as to provide sufficient attenuation
>of fields from a discharage occuring outside the bag. A metal-film layer
>does a better job here.
I'm not clear as to the type of discharge you might be referring to.
Can you cite an example?
>The other problem with pink poly is that its
>conductivity relies on the presence of a chemical treatment which may
>degrade with time.
This is very likely THE problem with pink poly.
>Again, I am NOT saying that this material is "bad" -
>it's just that, as with anything, you should know its limitations.
No argument.
>> What is "sufficiently high?" Do you mean to say that there is some
>> field intense enough to overcome the protective capability of the bag?
>> If that's what you mean, are you talking about lightening strikes or
>> some laboratory conditions produced in order to induce a breakdown?
>> Or, are you talking about the sort of electrostatic fields found where
>> humans are likely to be?
>Sufficiently high depends on the devices and conditions in question.
Okay, you suggest the devices and conditions that you think will pose
the greatest risk of inducing a failure into a board/component stowed
in a pink poly bag.
>Again, you seem to be looking for black-and-white, go/no go answers
>where nothing so simple exists. This isn't a question of perfectly
>good vs. completely bad - it's how MUCH better one thing is as compared
>with another.
>> I can't argue with that since I don't know how the two bags compare.
>> (For all I know, the move away from pink poly to metalized mylar was
>> done because the mylar bags are cheaper--though I don't know the
>> costs.)
>I'm sorry, but the above forces me to ask - how familiar are you with
>ESD protection in general?
My background on this subject:
I am an MSEE/PE who's worked in electronics engineering development
labs since before the first CMOS was introduced. I've used, handled,
designed in, tested, and sold off modules and systems containing CMOS,
MOSFETs, etc. I never encountered an ESD failure (because of
reasonable handling precautions, I believe) even in the days when
special handling precautions (of the intensity we see today) were not
the order of the day. (The biggest ESD concern we seemed to have in
the pre-CMOS days was the care needed to handle MOSFETs that arrived
from the vendor with their leads wrapped with a shorting wire.) I was
a system engineer on a manpack radio program that had nuclear hardness
requirements that included rather severe EMP. I've worked with
nuclear/EMP consultants who reported to me. The EMP tests were passed,
by the way. As CMOS is heavily used today, I continue to work with ESD
sensitive devices.
And, your background?
>> >This isn't to say that pink poly doesn't do anything or is of no value,
>> >but it's not an impenetrable shield which suddenly confers ESD-invulnerability
>> >on anything placed inside.
>> Do the metalized bags?
>Nothing is "impenetrable", which is in part the point. The metal-film
>bags (or better yet, storage in metal) are better at this than other
>solutions, that's all.
Why? Better ohms per square? Less material degradation with age?
(Forget metal containers. There's no argument there. Please respond
with regard to metalized bags.)
>> >> Do not mistake my comments to suggest ESD is not a threat to sensitive
>> >> electronics, it definitely is a threat. However, the hysteria
>> >> surrounding the purported dangers of ESD is excessive. Simple,
>> >> reasonable measures prevent damage due to ESD. The assertion that pink
>> >> poly bags don't provide adequate protection when placed in styrofoam
>> >> is part of that hysteria.
>> >Well, that depends on just how sensitive the devices are, doesn't it?
>> We're talking ESD sensitive devices: CMOS, MOSFETs, etc. Are your ESD
>> sensitive parts more sensitive than anybody elses?
>No, but the assertion given originally MAY BE incorrect in many cases.
>Yes, pink poly is better than nothing at all. It's probably even
>good enough in the majority of cases.
Hear! Hear!
>But I do NOT agree with any
>suggestion that implies that you can feel perfectly safe simply because
>you've got a pile of pink plastic in your production area,
I can't think of a realistic set of circumstances where the pink poly
bags won't be protection enough. Can you?
>or that the
>"purported" dangers of ESD have become anything like "hysteria".
Admittedly, my observations are subjective. Any time someone says, in
one way or another, "Everbody knows ..." and it's a subject area where
few _really_ know, I have to take a second look. This is the situation
surrounding ESD today.
>You
>put ESD protection measures in place because you can show your bosses
>- the guys who sign the checks, remember? - that they can be economically
>justified. And in some cases, these measures can APPEAR to be extreme
>when compared to other production lines.
Again being subjective, the frequent excesses of ESD protection, once
the "hysteria" spreads throughout a plant such that "Everybody knows
..," is that the ESD precautions become a pain in the ass. As with
religion, new converts are often zealots, thus adding to the pain I
mentioned. My argument here is relative to the frustration I feel when
I see someone going out of his way to protect devices that don't need
protection, or a production manager, say, who wants me to take the
same unreasonable precautions. ESD protection is often overdone to the
point of foolishness.
>> >Admittedly, you can carry ESD protection too far - after one of our
>> >stockrooms "got religion" about ESD, I used to routinely receive
>> >transformers in metallized mylar (although the pins were still stuck in
>> >styrofoam! :-)). But I'd rather someone err on the side of caution than
>> >get so lax that they simply shove a VLSI part into a paper bag. Many people
>> >simply aren't equipped to make the judgement call, so that best practice is
>> >"do everything".
>> How about "do every reasonable thing?" (I know what non-EEs and non-EE
>> managers would say: they'd say do everything. I want _your_ opinion.)
>> The issue I've tried to address in this thread is the hysteria in
>> which the concerns about protection against ESD failures reaches into
>> the level of religious fervor.
>The problem is that it's generally risky to have the production workers
>making the call as to what constitutes a "reasonable thing". This is
>especically true if you have a high rate of turnover in that labor force,
>or any worker is faced with an unusually wide range of components and
>situations. Sure, you could take everyone through the stock room and
>say, "THIS needs this sort of protection, THAT needs this other kind, and
>this over here doesn't need any at all!" But usually, you're wasting your
>money in doing this. Nobody has a perfect memory, and there's ALWAYS
>somebody new who hasn't had the training.
It hurts a little to say this, but what you say here is reasonable.
>It is almost always more
>cost-effective simply to implement "blanket" procedures and countermeasures
>than to try to special-case everything.
>And no, the non-EE types generally DON'T say "do everything". They want
>justification for spending the money. I remember (he says, pulling up
>the rocking chair) back in the dark ages when we were first getting
>ESD protection going, we were able to show a correlation between production
>yields and relative humidity, and to actually make an estimate of what
>ESD was costing us in parts and labor. THAT is what sells the
>countermeasures!
>In short, I'd much rather see a "religious fervor" about ESD than
>to try to implement this sort of thing selectively. The "fervor"
>doesn't cost much more (it may even cost less), and I know I've got
>MUCH better coverage. I'm no longer involved with our production lines
>- instead, in the OEM display business, I'm more often evaluating
>somebody ELSE'S production line - and it always bothers me when I see
>a plant trying to save pennies by being too selective in this area.
>You've got to be REALLY careful once you go down that road.
>> To get back to the point, do you think it's dangerous to put a PC
>> board in a pink poly bag that is then put into styrofoam peanuts? (I
>> know there are "pink" peanuts. Assume non-pink for this question.)
>Depends. What's on the board, how will it be handled, etc.?
The most sensitive devices handled in the worst possible way--like
being tossed into a box with styrofoam peanuts. That was the original
premise, wasn't it?
>wouldn't sweat a power supply being transported like this,
But everyone else in the plant very likely will, and no one will
listen to arguments as to why it isn't necessary. Does "fervor" come
to mind here?
>but I might
>have some concern about a big, expensive processor board with a lot
>of 0.25-um CMOS parts on it. Doesn't take too many of those being
>blown away to justify the cost of "religious" ESD protection...:-)
Agreed. Put such parts in protective bags--pink poly or metalized
mylar; it doesn't matter. Handle them very carefully when they're not
in a bag.
>If I were going to do something like this, for whatever reason, I'd
>sure want to see some analysis of it first.
Best regards,
Bob
Bob Myers
> Before I begin my comments I want to say that yours are among the most
> rational, thoughtful comments on this thread. Translation: I
> appreciate your responses.
Robert - or do you go by Bob as well? - thanks muchly. And by the way,
although we at least at first appeared to at wildly separated positions
on this, let me say that I certainly respect the way you've presented
your arguments as well.
> >I can get an "ohmmeter reading" between any two points of ANY bag; it's
> >just a lot higher on some than others! :-) And that's the point; things
> >are NOT either "conductive" or "non-conductive".
> You didn't answer my question. Nevertheless, let's move on.
You're right, I didn't answer your question directly, and I should
have. Mea culpepper. But I think we can get to it 'round the back
way later on...
> Untreated bags will likely cause an arc to be drawn between the test
> probes before any appreciable current can be conducted along their
> surfaces. I'll agree that there isn't a hard distinction between
> conductors and nonconductors. However, the pink poly bags are
> certainly "semi"-conductors more than they are insulators. They should
> have no difficulty conducting away a high impedance electrostatic
> field from anything contained inside the bag.
This is probably the crux of our disagreement, and the degree of
disagreement is turning out to be pretty small, after all. I agree
with just about everything you've said above - which may surprise
the ladies and gentleman in the audience, but folks, no one is
re-writing physics, here.
My caution about pink poly stems from some investigations I did a
while back - and admittedly, and I shoulda said this up front, that
"while" is getting longer than I care to admit; maybe the stuff's
improved a lot. But anywho, I have seen data which strongly suggested
that there was a significant benefit to metallized mylar over pink
poly, at least in the case of some reasonably fine-geometry CMOS.
The hypothesis at the time, and it still seems pretty reasonable to me,
is that PP did not provide a sufficient attenuation of fields
generated external to the bag, possibly including those from an arc
to the bag surface. Call it capacitive coupling if you like, but
there were instances which seemed to indicate damage occuring within
the bag.
We will also agree, I think, that there's no such thing as a perfect
ESD shield. Hell, wrap the stuff in aluminum foil if you like; I'll
bet I can still make an arc big enough to cause some damage! :-) Would
that arc occur in normal production? Of course not - but the point is
that there ARE degrees of protection. I think what we're debating, and
maybe it's a minor point now, is how far apart two particular methods
are on this scale, and whether or not that distance is worth whatever
the extra cost happens to be. We may just agree to disagree on this
one, because I DO think we're getting close to the picking of nits.
> >However, they
> >may NOT be sufficiently conductive so as to provide sufficient attenuation
> >of fields from a discharage occuring outside the bag. A metal-film layer
> >does a better job here.
> I'm not clear as to the type of discharge you might be referring to.
> Can you cite an example?
Hopefull, the description above will suffice. We do agree that PP will
not pick up/support a hazardous level of charge on its own surface, so
there's one big stumbling block gone. I'm still a little nervous
about the protection from zaps in the vicinity or to the bag itself,
but hey, maybe I'm being too conservative. There's an easy way to
find out - we just need to stick a significant sample of parts in
both types of bags, and apply an ESD tester (arc generator). Right
now, I'm inclined to bet on the parts in the metal bag, but I might
be surprised.
> >> I can't argue with that since I don't know how the two bags compare.
> >> (For all I know, the move away from pink poly to metalized mylar was
> >> done because the mylar bags are cheaper--though I don't know the
> >> costs.)
> >I'm sorry, but the above forces me to ask - how familiar are you with
> >ESD protection in general?
> My background on this subject:
First of all, I apologize; I hope you were not offended by the
question. It was just that an unfamiliarity with the costs of these
measures suggested that you had not worked with them in a production
environment.
> And, your background?
Fair enough. BSEE (Purdue, '79); no PE, as it was never really needed
for my line of work, although I did get so far as the EIT before I
realized it. I've been with my current employer for almost 18 years.
I started as a components engineer, responsible for testing/qualification
of purchased parts such as DRAMs and the like. I later moved into
production engineering, and did my bit in the initial testing we did to
see if there WAS such a thing as an "ESD problem", and then to help
implement the first countermeasures. R&D design engineer, mostly graphics
hardware, which involved quite a bit of qualification testing including
testing to both the European and in-house ESD susceptibility standards.
However, I had also been doing display work off and on for nearly my
whole time with HP, did it full time for a couple of years, and got
back into it full time about 6 years ago. About 3 years back, I moved to
the current job, which is less "real engineering" and more evaluating
OTHER PEOPLE'S engineering, so I freely admit that I could be a bit
behind on the current goodness of PP. But I don't think I'm THAT far
off, as I try to stay current enough so as to be able to evaluate
production processes.
> >Nothing is "impenetrable", which is in part the point. The metal-film
> >bags (or better yet, storage in metal) are better at this than other
> >solutions, that's all.
> Why? Better ohms per square? Less material degradation with age?
> (Forget metal containers. There's no argument there. Please respond
> with regard to metalized bags.)
Well, the metalized bags are one step further on the way to metal
containers; a thin layer of very conductive material is, IMHO,
better than a thicker layer of somewhat conductive material. A thick
layer of very conductive material beats both, hands down.
> I can't think of a realistic set of circumstances where the pink poly
> bags won't be protection enough. Can you?
Can I describe the situation in detail, as in drawing a line in the
sand and saying "beyond here it worketh not!"? No. But I'm still
a bit cautious, based on what sure looked like statistically-
significant results. Wish I still had the files.
> Admittedly, my observations are subjective. Any time someone says, in
> one way or another, "Everbody knows ..." and it's a subject area where
> few _really_ know, I have to take a second look. This is the situation
> surrounding ESD today.
Amen, brother! :-)
> Again being subjective, the frequent excesses of ESD protection, once
> the "hysteria" spreads throughout a plant such that "Everybody knows
> ..," is that the ESD precautions become a pain in the ass. As with
> religion, new converts are often zealots, thus adding to the pain I
> mentioned. My argument here is relative to the frustration I feel when
> I see someone going out of his way to protect devices that don't need
> protection, or a production manager, say, who wants me to take the
> same unreasonable precautions. ESD protection is often overdone to the
> point of foolishness.
Well, actually, you'll get no argument from me here either. I
cringe a bit whenever I see someone stuffing a power transformer
- or worse yet, a sheet metal part! (yes, I've seen it...) - into
an "ESD-safe" container of any type. But I'm not going to try to
correct them; I've tilted at that particular windmill before, and
it's really messy if you win. Sorta like arguing with an 18-wheeler
over the right-of-way when you're driving a Yugo: technically, you
may be RIGHT, BUT...:-)
> The most sensitive devices handled in the worst possible way--like
> being tossed into a box with styrofoam peanuts. That was the original
> premise, wasn't it?
OK. In that case, I'd worry. Sure, you'll most often get away with
it. But what does it hurt to cover that other 1 time out of the
thousand or whatever? (OK, here's my belt, now where ARE those
suspenders? :-))
> But everyone else in the plant very likely will, and no one will
> listen to arguments as to why it isn't necessary. Does "fervor" come
> to mind here?
Agreed, and no one will listen, and it's a durn shame. You get a chit
for 10 minutes with the chaplain. But do you REALLY want to try to
change things?
> Best regards,
> Bob
Ditto,
Other Bob
Robert H. Penoyer
>Maybe you're the one who needs to update your information.
>My company required me to take an ESD training class a couple of years
>ago. Here'e what I learned:
>Pink poly bags do NOT provide adequate protection against ESD. Pink
>poly bags are made out of a conductive type of plastic. ESD can be
>conducted THROUGH the bag and onto the electronic components inside.
How is this done, via an arc? If this was demonstrated in the course
you refer to, what, exactly, did they do to overcome any protection
the bag can provide?
By the way, the fact that the pink poly bags are conductive makes them
attractive for ESD protection applications. After all metalized mylar
bags are conductive, aren't they. Suppose I put and ESD-sensitive
module in a metal box? You wouldn't argue that the fact that the box
is conductive makes the module inside vulnerable, would you?
>Since styrofoam peanuts is a very good source of static electricity,
>placing a PC board inside a pink poly bag in styrofoam peanuts is asking
>for trouble.
When they build up a static charge, the styrofoam peanuts have an
electrostatic field throughout their mass. This can be represented
much like a high voltage from a very high impedance source. The pink
poly bags are conductive and should have no difficulty conducting such
a field past the components inside.
>The metalized film (silverish-gray) bags are much better at protecting
>electronic components against ESD. These bags, when folded over and
>sealed, produce a Faraday Cage around the components inside.
Faraday cages/shields are used to attenuate magnetic fields. Is this
an issue in an ESD discussion?
Bob Myers
Robert H. Penoyer (rpen...@pacbell.net) wrote:
> Faraday cages/shields are used to attenuate magnetic fields. Is this
> an issue in an ESD discussion?
Um, Bob? I think this was a slip of the keyboard, but surely you meant
ELECTRIC fields in the above. In which case this is very relevant to an
ESD discussion.
Bob Myers KC0EW Hewlett-Packard Co. |Opinions expressed here are not
O- Workstations Systems Div.|those of my employer or any other
my...@fc.hp.com Fort Collins, Colorado |sentient life-form on this planet.
Robert Macy
cc: Robert H. Penoyer
RHP>From: rpen...@pacbell.net (Robert H. Penoyer)
....answering someone who wrote:
RHP>>Maybe you're the one who needs to update your information.
RHP>>My company required me to take an ESD training class a couple of years
RHP>>ago. Here'e what I learned:
RHP>>Pink poly bags do NOT provide adequate protection against ESD. Pink
RHP>>poly bags are made out of a conductive type of plastic. ESD can be
RHP>>conducted THROUGH the bag and onto the electronic components inside.
RHP>How is this done, via an arc? If this was demonstrated in the course
RHP>you refer to, what, exactly, did they do to overcome any protection
RHP>the bag can provide?
RHP>By the way, the fact that the pink poly bags are conductive makes them
RHP>attractive for ESD protection applications. After all metalized mylar
RHP>bags are conductive, aren't they. Suppose I put and ESD-sensitive
RHP>module in a metal box? You wouldn't argue that the fact that the box
RHP>is conductive makes the module inside vulnerable, would you?
Not by an arc but by the electric field that is possible to obtain.
A metal box has extremely high conductivity (low impedance). That makes
it practically impossible to put a high field at a point without a high
current to sustain it. However, a box made with a high impedance
resistively distributed material can quite easily develop a voltage
point with little current to sustain it.
RHP>>Since styrofoam peanuts is a very good source of static electricity,
RHP>>placing a PC board inside a pink poly bag in styrofoam peanuts is asking
RHP>>for trouble.
RHP>When they build up a static charge, the styrofoam peanuts have an
RHP>electrostatic field throughout their mass. This can be represented
RHP>much like a high voltage from a very high impedance source. The pink
RHP>poly bags are conductive and should have no difficulty conducting such
RHP>a field past the components inside.
The styrofoam peanuts have *individual* charges. It is not distributed
evenly throughout the aggregate. These "point" voltage sources can then
penetrate right through a pink bag.
RHP>>The metalized film (silverish-gray) bags are much better at protecting
RHP>>electronic components against ESD. These bags, when folded over and
RHP>>sealed, produce a Faraday Cage around the components inside.
RHP>Faraday cages/shields are used to attenuate magnetic fields. Is this
RHP>an issue in an ESD discussion?
Faraday cages are conductive surfaces that are used to attenuate
electric fields. Their ability to attenuate a magnetic field is
entirely based upon the frequency of the magnetic field. For example,
the earth's magnetic field is not attenuated at all, 60Hz is almost
impossible to shield with copper, yet 15KHz flyback is usually shorted
out. The attenuation of the magnetic field is based upon the frequency
and the thickness of the conductor. It has to do with eddy current
generation, skin effect, etc.
RHP>>NEVER, EVER, EVER, EVER, use styrofoam peanuts for shipping electronic
RHP>>components! There are other packing materials which are designed
RHP>>specifically for this task and do NOT generate static electricity.
It is amazing to me that engineers constantly violate the ESD safety
rules (probably because they don't see immediate catastrophic failures).
But there in lies the problem: ESD damage often shows up 2 to 6 months
later with premature unexplained failures.
- Robert -
rober...@engineers.com
AJM Electronics
---
ş OLX 2.1 TD ş I'm not arrogant, I'm right.
Roy McCammon
Robert H. Penoyer wrote:
>
> >Maybe you're the one who needs to update your information.
>
>
>
You put your cmos in a pink poly bag. Get a standard static
simulating gun. Dial in the desired voltage. Place the gun against
the bag and pull the trigger. Repeat with a metalized polyester
bag. You will find that the metalized bag consistently protects
against higher volt arcs. Whether or not it is over kill, I don't
know. You can definitely over come the pink poly bag in this manner.
> By the way, the fact that the pink poly bags are conductive makes them
> attractive for ESD protection applications. After all metalized mylar
> bags are conductive, aren't they. Suppose I put and ESD-sensitive
> module in a metal box? You wouldn't argue that the fact that the box
> is conductive makes the module inside vulnerable, would you?
Metalized polyester is a triple barrier. Outer low resistence metal,
then high resistence polyester, then inner low resistence metal,
versus the the pink poly which is one layer of moderate resistence.
> When they build up a static charge, the styrofoam peanuts have an
> electrostatic field throughout their mass. This can be represented
> much like a high voltage from a very high impedance source. The pink
> poly bags are conductive and should have no difficulty conducting such
> a field past the components inside.
I suspect that the event of maximum voltage stress is when the
part in the pink poly is pulled out from the peanuts. The pink
poly resistence being fairly high may not have enough time to
disapate the charges adequately.
--
My real e-mail address is rbmcc...@mmm.com
Opinions expressed herein are my own and may not represent those of my employer.
Robert H. Penoyer
Bob,
Thanks for your last response. It looks like we're a couple of EEs who
have each been around the block a few times--perhaps different blocks,
but not with dissimilar experiences. We disagree on some of the
details but we substantively agree on most issues as they have now
come to be explained on both sides.
My intent in my arguments in this thread was to use my engineering
knowledge and instincts to explain my views of the truth about ESD;
this, in part, represents arguments against those who simply "know"
the facts about ESD without backing up the "facts" with reason. I
hoped that those who disagreed with my comments would answer with
rational responses based on engineering principles. You've done that.
Again, best regard,
Bob
Robert H. Penoyer
>RHP>By the way, the fact that the pink poly bags are conductive makes them
>RHP>attractive for ESD protection applications. After all metalized mylar
>RHP>bags are conductive, aren't they. Suppose I put and ESD-sensitive
>RHP>module in a metal box? You wouldn't argue that the fact that the box
>RHP>is conductive makes the module inside vulnerable, would you?
>Not by an arc but by the electric field that is possible to obtain.
We're talking about a _conductive_ metal box here! Please explain how
it's "possible to obtain" an electric field inside such a box.
>A metal box has extremely high conductivity (low impedance). That makes
>it practically impossible to put a high field at a point without a high
>current to sustain it.
Right on.
>However, a box made with a high impedance
>resistively distributed material can quite easily develop a voltage
>point with little current to sustain it.
How much voltage do you expect to appear across such a box when "very
little" current is flowing?
>RHP>>Since styrofoam peanuts is a very good source of static electricity,
>RHP>>placing a PC board inside a pink poly bag in styrofoam peanuts is asking
>RHP>>for trouble.
>RHP>When they build up a static charge, the styrofoam peanuts have an
>RHP>electrostatic field throughout their mass. This can be represented
>RHP>much like a high voltage from a very high impedance source. The pink
>RHP>poly bags are conductive and should have no difficulty conducting such
>RHP>a field past the components inside.
>The styrofoam peanuts have *individual* charges. It is not distributed
>evenly throughout the aggregate.
So I can't model a "pile" of such peanuts as an overall source of an
electrostatic field?
>These "point" voltage sources can then
>penetrate right through a pink bag.
They can?! This is really the argument isn't? That is, I state the
conditions ("a high voltage from a very high impedance source"), you
ignore my premise, then make an assertion with no reasoning behind it.
It's assertions like yours that I'm arguing against. Baseless
assertions don't further your argument.
>RHP>>The metalized film (silverish-gray) bags are much better at protecting
>RHP>>electronic components against ESD. These bags, when folded over and
>RHP>>sealed, produce a Faraday Cage around the components inside.
>RHP>Faraday cages/shields are used to attenuate magnetic fields. Is this
>RHP>an issue in an ESD discussion?
>Faraday cages are conductive surfaces that are used to attenuate
>electric fields. Their ability to attenuate a magnetic field is
>entirely based upon the frequency of the magnetic field. For example,
>the earth's magnetic field is not attenuated at all, 60Hz is almost
>impossible to shield with copper, yet 15KHz flyback is usually shorted
>out. The attenuation of the magnetic field is based upon the frequency
>and the thickness of the conductor. It has to do with eddy current
>generation, skin effect, etc.
>RHP>>NEVER, EVER, EVER, EVER, use styrofoam peanuts for shipping electronic
>RHP>>components! There are other packing materials which are designed
>RHP>>specifically for this task and do NOT generate static electricity.
>It is amazing to me that engineers constantly violate the ESD safety
>rules (probably because they don't see immediate catastrophic failures).
>But there in lies the problem: ESD damage often shows up 2 to 6 months
>later with premature unexplained failures.
This might be true. However, since so many people make this assertion,
and since I see so little evidence of the truth of this assertion (in
fact, none!), I have to wonder if it shouldn't be relegated to the
long list of old wives tales.
I think that it's too often easier to blame latent ESD stress as the
cause of component failures than it is to find the real cause. Since
everybody "knows" about this ESD failure mechanism, too many are
willing to accept it as the cause of a failure where such blame isn't
necessarilly warranted. An example is that you refer to "premature
unexplained failures" and make the logical leap that they are caused
by latent stress from ESD. Bingo! Instant explanation!
Roy McCammon
Let me say up front, that I am not taking the position that
pink poly bags are inadequate. I believe that double metalized
polyester bags are better. My comments set off with ***.
Robert H. Penoyer wrote:
> We're talking about a _conductive_ metal box here! Please explain how
> it's "possible to obtain" an electric field inside such a box.
*** You connect a suitably low impedence voltage source across the
opposite corners and you will have a field inside. ***
> >However, a box made with a high impedance
> >resistively distributed material can quite easily develop a voltage
> >point with little current to sustain it.
>
> How much voltage do you expect to appear across such a box when "very
> little" current is flowing?
*** V = I*R ***
> >The styrofoam peanuts have *individual* charges. It is not distributed
> >evenly throughout the aggregate.
>
> So I can't model a "pile" of such peanuts as an overall source of an
> electrostatic field?
*** Probably works fine as long as nothing is moving, but a point charge
brought quickly up to the bag can cause a dynamic e-field and can cause
currents in parts inside the bag. Pulling the pink poly shrouded
item rapidly out of the peanuts is probably the worst event. ***
> >These "point" voltage sources can then
> >penetrate right through a pink bag.
>
> They can?! This is really the argument isn't? That is, I state the
> conditions ("a high voltage from a very high impedance source"), you
> ignore my premise, then make an assertion with no reasoning behind it.
> It's assertions like yours that I'm arguing against. Baseless
> assertions don't further your argument.
*** I'd have to agree there is some field, whether it is enough to
cause latent damage is hard to establish ***
> >It is amazing to me that engineers constantly violate the ESD safety
> >rules (probably because they don't see immediate catastrophic failures).
>
> >But there in lies the problem: ESD damage often shows up 2 to 6 months
> >later with premature unexplained failures.
>
> This might be true. However, since so many people make this assertion,
> and since I see so little evidence of the truth of this assertion (in
> fact, none!), I have to wonder if it shouldn't be relegated to the
> long list of old wives tales.
*** I think there is an analogy to germ theory here. When scientists
started attributing infection to germs, it was hard to prove. The
doctor could wash his hands, and the patient still got an infection.
He could wash is hands and instruments, and the patient still got
infected. The problem was that like esd, there may be 20 different
ways to infect the patient. It was only when they cleaned and
sterilized everything (the instruments, the doctors, the patient,
the dressings, the sheets, the walls) or put barriers between the
opening and germs (mouth coverings) that there was a big improvement.
Now no-one questions sterile procedures in surgery.
ESD is similar in that there may be 20 ways to zap a chip, and if you
only eliminate 19, you may still be zapping chips and conclude that
ESD prevention doesn't help. It really is hard to establish
the correlation between ESD and latent failures. Very few
organizations have the relevent data.
My own anecdotal evidence comes from being a designer and trouble
shooter since the early 70's. I watched the rise of ESD prevention
procedures concurrent with about factor of ten improvement in ic
reliability. As every one got on the bandwagon, (manufactures,
distributers, and my factory) ic failure rates went down. It could
have been an unrelated cause. I don't know. But I do know
that there was a dramatic improvement around the time we started
our esd procedures.
Note that it was important to keep the ESD prevention chain all
the way from the manufacturer to the finished product. On of the
simplest measures is to simple buy ic's in multiples of full tubes
so that the distributor doesn't have handle the parts. We also
refused to accept shipments that were not in anti-static containers.
We accepted pink poly, metalized polyester, conductive tubes,
conductive foam, metal foil, etc. I can't say that any of these
was measurably inadequate.
But, I will still prefer double metalized polyester bags as being
probably better (and alass, more expensive).
--
My real e-mail address may be invalid by the time you read
this. Its is changing and they haven't told me what it
is going to be.
Richard M.
Robert H. Penoyer wrote:
>
> >> Faraday cages/shields are used to attenuate magnetic fields. Is this
>
> >ELECTRIC fields in the above. In which case this is very relevant to an
> >ESD discussion.
>
>
> It seems to me that a Faraday shield can protect against both magnetic
> and electrostatic fields. Magnetically as I've described here.
> Electrostatically by conducting away an impinging electrostatic field.
You are correct, Mr. Penoyer.
No doubt many know of "screen rooms" used to test/isolate RF tranceivers.
It is important to note, however, that what is typcially refered to as a "cage"
would not suffice for electromagnetic shielding.
Anyone ever try to make a cellular call or recive a page from an underground
garage?
Is this a function of the concrete... as most would contend... or of the steel
rebar reinforcements? (Pick the latter) :)
Robert H. Penoyer
rbmcc...@mmm.com (Roy McCammon) wrote:
>Robert H. Penoyer wrote:
>>
>> >Maybe you're the one who needs to update your information.
>>
>> >My company required me to take an ESD training class a couple of years
>> >ago. Here'e what I learned:
>>
>> >Pink poly bags do NOT provide adequate protection against ESD. Pink
>> >poly bags are made out of a conductive type of plastic. ESD can be
>> >conducted THROUGH the bag and onto the electronic components inside.
>>
>> How is this done, via an arc? If this was demonstrated in the course
>> you refer to, what, exactly, did they do to overcome any protection
>> the bag can provide?
>You put your cmos in a pink poly bag. Get a standard static
>simulating gun. Dial in the desired voltage. Place the gun against
>the bag and pull the trigger. Repeat with a metalized polyester
>bag. You will find that the metalized bag consistently protects
>against higher volt arcs. Whether or not it is over kill, I don't
>know. You can definitely over come the pink poly bag in this manner.
Okay, I think I must accept what you're saying. It sounds like you've
either done this or are familiar with the procedure.
>> By the way, the fact that the pink poly bags are conductive makes them
>> attractive for ESD protection applications. After all metalized mylar
>> bags are conductive, aren't they. Suppose I put and ESD-sensitive
>> module in a metal box? You wouldn't argue that the fact that the box
>> is conductive makes the module inside vulnerable, would you?
>
>Metalized polyester is a triple barrier. Outer low resistence metal,
>then high resistence polyester, then inner low resistence metal,
>versus the the pink poly which is one layer of moderate resistence.
As of this morning, because of this thread, I grabbed a metalized bag
(transparent, grayish, gun-metal colored, labeled with a mil-spec
number and "Type III, Class 1") in which we had received some
ESD-sensitive ICs. I also grabbed an ohmmeter capable of measuring up
to 30 megohms. I could not get a resistance reading across the outside
of the bag, across the inside of the bag, or by piercing the bag with
both ohmmeter probes; in all cases the probes were no more than 1/4"
apart. You and I are clearly talking about two different kinds of
bags.
Wondering how in the world the bag I described can protect anything, I
went to the mil spec (whose number I can't recall) and verified that
the material was, indeed, rated as ESD protective. The spec referred
to an EIA spec for a description of the method used to verify the ESD
protective capability of the material. Unfortunately, we don't have
that spec so I couldn't read how the test is conducted.
>> When they build up a static charge, the styrofoam peanuts have an
>> electrostatic field throughout their mass. This can be represented
>> much like a high voltage from a very high impedance source. The pink
>> poly bags are conductive and should have no difficulty conducting such
>> a field past the components inside.
>I suspect that the event of maximum voltage stress is when the
>part in the pink poly is pulled out from the peanuts. The pink
>poly resistence being fairly high may not have enough time to
>disapate the charges adequately.
This sounds plausible.
Robert H. Penoyer
>> Faraday cages/shields are used to attenuate magnetic fields. Is this
>> an issue in an ESD discussion?
>Um, Bob? I think this was a slip of the keyboard, but surely you meant
>ELECTRIC fields in the above. In which case this is very relevant to an
>ESD discussion.
I hate to have to plead ignorance in a public forum. (Lonely are the
brave.) I deliberately wrote what I wrote, but I did it without much
thinking. Here's why I purposely said what I did:
In the days of yesteryear I worked at a transformer company at about
the time I left high school. Among the products we made--and I
built--was a transformer with a Faraday shield. Imagine a transformer
comprising I-E laminations. Looking down on the tranformer, you can
see the top of the core and the "bulge" of the windings extending
beyond the width of the core. We wrapped a wide (same width as the
windings) copper strap around the whole assembly such that the strap
was conformally shaped to the profile viewed from the top of the
transformer. (That is, the strap was oriented parallel to the
direction of the windings.) The ends of the strap were soldered
together to produce a substantial short circuit. The strap attenuated
any leakage flux that escaped the core by acting as a short circuit to
the current induced in it by the leakage flux. The steel half-shells
that covered both sides of the transformer held the strap in place so
that the strap could only be seen along two edges of the core once the
transform was completely assembled. It was my understanding that these
transformers were used in close proximity to CRTs and, obviously, the
user didn't want the magnetic flux from the transformer disorting the
image on the CRT.
Bob Myers
> > and electrostatic fields. Magnetically as I've described here.
> > Electrostatically by conducting away an impinging electrostatic field.
> You are correct, Mr. Penoyer.
> No doubt many know of "screen rooms" used to test/isolate RF tranceivers.
> It is important to note, however, that what is typcially refered to as a "cage"
Actually, no. What Bob described as the device used to reduce leakage
flux from a transformer is NOT a Faraday shield, as it does not
fully enclose a volume within which the transformer resides. Instead,
it can simply be viewed as a single shorted turn around the transformer -
it links to the leakage flux just like any other secondary of the
transformer links to the flux in the core. We've used the same technique
in the past to reduce magnetic fields from CRT monitor flyback transformers.
A "screen room" or "cage" IS a Faraday shield, meaning that when the
door's closed the entire volume of the room is surrounded by a
conductive surface. You don't get electromagnetic signals out of
(or into) such a room because you can't see E-fields generated inside
this volume at any point outside it. (Or vice versa, if going in the
opposite direction.) You can most definitely get a *magnetic* field
detectable outside the room from a source inside.
Gary Morris
Roy McCammon wrote:
>
> Robert H. Penoyer wrote:
> >
> >
> > >My company required me to take an ESD training class a couple of years
> > >ago. Here'e what I learned:
> >
> > >Pink poly bags do NOT provide adequate protection against ESD. Pink
> > >poly bags are made out of a conductive type of plastic. ESD can be
> > >conducted THROUGH the bag and onto the electronic components inside.
> >
> > How is this done, via an arc? If this was demonstrated in the course
> > you refer to, what, exactly, did they do to overcome any protection
> > the bag can provide?
>
> You put your cmos in a pink poly bag. Get a standard static
> simulating gun. Dial in the desired voltage. Place the gun against
> the bag and pull the trigger. Repeat with a metalized polyester
> bag. You will find that the metalized bag consistently protects
> against higher volt arcs. Whether or not it is over kill, I don't
> know. You can definitely over come the pink poly bag in this manner.
>
> > attractive for ESD protection applications. After all metalized mylar
> > bags are conductive, aren't they. Suppose I put and ESD-sensitive
> > module in a metal box? You wouldn't argue that the fact that the box
> > is conductive makes the module inside vulnerable, would you?
>
> Metalized polyester is a triple barrier. Outer low resistence metal,
> then high resistence polyester, then inner low resistence metal,
> versus the the pink poly which is one layer of moderate resistence.
>
> > electrostatic field throughout their mass. This can be represented
> > much like a high voltage from a very high impedance source. The pink
> > poly bags are conductive and should have no difficulty conducting such
> > a field past the components inside.
>
> I suspect that the event of maximum voltage stress is when the
> part in the pink poly is pulled out from the peanuts. The pink
> poly resistence being fairly high may not have enough time to
> disapate the charges adequately.
>
> My real e-mail address is rbmcc...@mmm.com
>
> Opinions expressed herein are my own and may not represent those of my employer.
I have followed the discussion of pink poly vs metalized polyester bags,
sort of. But I had occasion to see a video the other day called "The
Shocking Truth," if I recall correctly. It was apparently a video put
together by Apple Computer to teach ESD protection and the need for it
to employees.
The video has some interesting demonstrations including a comparison of
pink poly and metalized mylar. The superiority of metalized mylar
appears to be overwhelming. The video also demonstrates that a
well-rumpled metalized mylar bag, perhaps with a few tiny holes
beginning to open up, is only moderately better that pink poly.
--
Gary Morris
gmo...@gv.net
Robert H. Penoyer
>Let me say up front, that I am not taking the position that
>pink poly bags are inadequate. I believe that double metalized
>polyester bags are better.
Then, despite any differences we seem to have had, we appear to be in
general agreement.
Robert H. Penoyer
>The video also demonstrates that a
>well-rumpled metalized mylar bag, perhaps with a few tiny holes
>beginning to open up, is only moderately better that pink poly.
Interesting. Thanks.
Andy Shiekh
>
> Actually, no. What Bob described as the device used to reduce leakage
> flux from a transformer is NOT a Faraday shield, as it does not
> fully enclose a volume within which the transformer resides. Instead,
> it can simply be viewed as a single shorted turn around the transformer -
> it links to the leakage flux just like any other secondary of the
> transformer links to the flux in the core. We've used the same technique
> in the past to reduce magnetic fields from CRT monitor flyback transformers.
>
> A "screen room" or "cage" IS a Faraday shield, meaning that when the
> door's closed the entire volume of the room is surrounded by a
> conductive surface. You don't get electromagnetic signals out of
> (or into) such a room because you can't see E-fields generated inside
> this volume at any point outside it. (Or vice versa, if going in the
> opposite direction.) You can most definitely get a *magnetic* field
> detectable outside the room from a source inside.
>
> my...@fc.hp.com Fort Collins, Colorado |sentient life-form on this planet.
I always found it funny how magnetic field can get
out while electric can't.
Funny because relativity shows magnetism to be
a relativistic side effect of the electric field.
I'm not saying it isn't so, just that it is
counter intuitive for me.
Andy
Richard M.
Bob Myers wrote:
You don't get electromagnetic signals out of
> (or into) such a room because you can't see E-fields generated inside
> this volume at any point outside it. (Or vice versa, if going in the
> opposite direction.) You can most definitely get a *magnetic* field
> detectable outside the room from a source inside.
I assumed he meant electromagnetic since his example was of a
transformer.
--
***REPLY ADDRESS REQUIRES MODIFICATION***
Change to: digi...@serv.net
or click here -> mailto:digi...@serv.net
(getting too much junk mail)
Bob Myers
> You don't get electromagnetic signals out of
> > (or into) such a room because you can't see E-fields generated inside
> > this volume at any point outside it. (Or vice versa, if going in the
> > opposite direction.) You can most definitely get a *magnetic* field
> > detectable outside the room from a source inside.
> I assumed he meant electromagnetic since his example was of a
> transformer.
I think you may be confusing some terms here.
A transformer can produce an external *magnetic* field, not an
electromagnetic wave. Despite a solenoid or coil also being
called an "electrmagnet", it does NOT product electromagnetic waves.
EM waves (as in radio signals or light) are a combination of electric
and magnetic fields in a special relationship with each other.
Bob M.
Bob Myers KC0EW Hewlett-Packard Co. |Opinions expressed here are not
O- Workstations Systems Div.|those of my employer or any other
Bob Myers
Andy Shiekh (shi...@ictp.trieste.it) wrote:
> I always found it funny how magnetic field can get
> out while electric can't.
> Funny because relativity shows magnetism to be
> a relativistic side effect of the electric field.
> I'm not saying it isn't so, just that it is
> counter intuitive for me.
The reason that it may be counterintuitive is that your understanding
of magnetism may be a bit off. Magnetism isn't a "side effect" of the
electric field, or even vice-versa; they are both different aspects
(or "manifestations", if you prefer) of the electromagnetic force.
Either can exist perfectly well without the other, but they have
different natures. They are also affected in different ways by
different materials.
Whether or not a material is "conductive" is really a question of how
well it behaves regarding an ELECTRIC field - how much current will
flow within the material for a given electric field strength. But a
material can be EXTREMELY conductive - copper, for instance, or silver -
and still have no more effect on a MAGNETIC field than air or vacuum.
There are other important differences between the two - an electric
field exists between two definite end point, such as the field between
a negatively-charged object and a positively-charged one. But
magnetic field lines are always closed loops, with neither a
beginning point nor an end. No "magnetic positive charges" or
"magnetic negative charges" have ever been found, and there is some
reason for thinking that they can't exist independently.
An electromagnetic wave, on the other hand, has both a magnetic and
an electric-field component, and can't go on without both present
(and in a certain relationship, but that's beside the point). So
a shielded room - which works by acting on electric fields - also kills
off EM radiation just as well.
Mike Hoskins
Robert Macy wrote:
>It is amazing to me that engineers constantly violate the ESD safety
> >rules (probably because they don't see immediate catastrophic failures).
>
> >But there in lies the problem: ESD damage often shows up 2 to 6 months
> >later with premature unexplained failures.
Robert H. Penoyer <rpen...@pacbell.net> responded in article
<5c6mbj$q...@news4.snfc21.pacbell.net>...
> This might be true. However, since so many people make this assertion,
> and since I see so little evidence of the truth of this assertion (in
> fact, none!), I have to wonder if it shouldn't be relegated to the
> long list of old wives tales.
>
> I think that it's too often easier to blame latent ESD stress as the
> cause of component failures than it is to find the real cause. Since
> everybody "knows" about this ESD failure mechanism, too many are
> willing to accept it as the cause of a failure where such blame isn't
> necessarilly warranted. An example is that you refer to "premature
> unexplained failures" and make the logical leap that they are caused
> by latent stress from ESD. Bingo! Instant explanation!
One has to respect Robert Penoyer's healthy skepticism. It is certainly
true that you can't believe everything you hear. However, there is some
emerging experimental evidence to support the concept of ESD induced latent
defects in ICs in the technical literature. ICs affected in this manner
are referred to as "walking wounded". The basic symptomology of this
effect is that the reliability of the part is reduced in spite of the fact
that it is functional at final test. Some example refererences are:
-M. Song et. al., Quantifying ESD/ECS Latent Damage and Integrated Circuit
Leakage Currents," EOS/ESD Symposium Proceedings, p. 304, 1995
-J.C. Reiner, "Latent Gate Oxide Defects Caused by CDM-ESD," EOS/ESD
Symposium Proceedings, p.311, 1995
-J. Colvin, "The Identification and Analysis of Latent ESD Damage on CMOS
Input Gates." EOS/ESD Symposium Proceedings, p.109, 1993
-S. Kiefer et. al, "EOS Induced Polysilicon Migration in VLSI Gate Arrays,"
EOS/ESD Symposium Proceedings, p.123, 1993
-W.D Greasons et. al, "Characterization of Charge Accumulation and
Detrapping Process Related to Latent Failure in CMOS Integrated Circuits,"
IEEE Trans. on Industry Applications, vol. 30, p.350, 1994
This list could go on but, for brevity, I truncate it here. A review of
the references in these papers will quickly allow someone to climb the
"literature tree" for this subject.
As a matter of reference, for those interested in getting accurate
information about ESD (not always easy to do for reasons mentioned by
Robert Penoyer in several of his postings) the annual EOS/ESD symposium
can't be beat. This conference is sponsored by the IEEE Electron Device
Society and the ESD Association and contains good quality technical papers.
Conference proceedings are available from the ESD Association. The
Symposium/Proceedings are the premier forum where ESD experts (both those
designing state-of-the-art on chip protection circuits and those managing
corporate programs to control ESD in manufacturing) publish their findings.
If you are really interested in ESD, I recommend joining the ESD
Association (see web page http://www.eosesd.org) which among other things,
serves as a conduit for the dissemination of accurate ESD information.
As an integrated circuit device engineer and someone who has studied and
designed chip integrated ESD protection circuits, I can say that if an ESD
event does occur on a chip, it can result in very serious damage. This
applies to chips which contain protection circuits (most CMOS these days)
as well as more specialized technologies which can't use extensive (or any)
protection circuits. The basic problem is that, while the ESD transient is
very brief (tens of nanoseconds range), the associated current is extremely
large. For example, the magnitude of the discharge current from a 3kV
human body model discharge (approximate source impedance ~ 1500 ohms) is
approximately 2A or greater into the low impedance ( tens of ohms) provided
by an on-chip protection circuit after it triggers and clamps the terminal
voltage to reasonable values (typically less than 20 V). 3kV is near the
level of imperceptibility by a human. The discharge currents associated
with larger ESD events tend to scale with the voltage and human body model
ESD events up to 20 kV can occur. Discharge currents associated with
machine model ESD events can be even larger because the source impedance in
these lower voltage scenarios is of the order of a few ohms. With such
discharge current magnitudes possible, it is easy to see why chip
protection circuits are not 100% effective for all levels of ESD. It's not
easy to design a semiconductor device which clamps at 15V, handles 10 A
peak current and fits in an area which could be spanned by the diameter of
a human hair!
ESD induced latent defects are perceived as a potentially serious problem
by the Air Force. They have funded a small business innovative research
program at our company to develop a chip integrated ESD detection circuit
(not to be confused with the hand held diagnostic products such as those
manufactured by 3M) which can detect that an ESD event occurred on the chip
without interfering with normal circuit operation.
The ESD detector is expected to function as follows: A circuit terminal
overvoltage condition (threshold value is adjustable) is sensed with a
passive, nonvolatile write-once memory which can be read out after the ESD
event has occurred. The configuration provides independent ESD detection
on all terminals of the IC in powered and unpowered states. The ESD status
of any terminal can be scanned at any time by powering Vdd and applying a
DC voltage to the desired terminal while monitoring the voltage of a common
readout terminal. The detector chip area is small, and the detector adds
only one or two additional bond pads to the IC.
This detector can potentially provide a simple, low cost method for
screening against potential latent ESD damage in ICs either at the chip,
board or subsystem level. The detector also has application as a
diagnostic tool to advance the understanding of the correlation between IC
reliability and ESD.
The government likes to see commercial interest in the research projects it
funds. My company (Q-DOT Inc.) is also interested in the opinions of other
companies on the perceived value of the above described ESD detector. If
you have comments, questions, or any interest in getting more information
about the chip integrated ESD detector please let me know through EMAIL.
Michael J. Hoskins, Q-DOT Inc.
EMAIL:hos...@qdot.com
Mike Hoskins
screening against ESD damage in ICs either at the chip,
Robert Macy
cc: Robert H. Penoyer
HO> Robert Macy wrote:
HO>>It is amazing to me that engineers constantly violate the ESD safety
HO>> >rules (probably because they don't see immediate catastrophic failures).
HO>>
HO>> >But there in lies the problem: ESD damage often shows up 2 to 6 months
HO>> >later with premature unexplained failures.
HO>Robert H. Penoyer <rpen...@pacbell.net> responded in article
HO><5c6mbj$q...@news4.snfc21.pacbell.net>...
HO> > This might be true. However, since so many people make this assertion,
HO>> and since I see so little evidence of the truth of this assertion (in
HO>> fact, none!), I have to wonder if it shouldn't be relegated to the
HO>> long list of old wives tales.
HO>>
HO>> I think that it's too often easier to blame latent ESD stress as the
HO>> cause of component failures than it is to find the real cause. Since
HO>> everybody "knows" about this ESD failure mechanism, too many are
HO>> willing to accept it as the cause of a failure where such blame isn't
HO>> necessarilly warranted. An example is that you refer to "premature
HO>> unexplained failures" and make the logical leap that they are caused
HO>> by latent stress from ESD. Bingo! Instant explanation!
Old wives tale? Hmmm....
During the time I came to the above conclusions, I had the opportunity
of analyzing failures from a data base of over 12,000 PCBs, continually
being submitted for repair, while we were implementing anti-ESD
techniques.
When I made the statement that ESD made a difference, it was based upon
broad statistical evidence, not anecdotal evidence. [It is this
anecdotal evidence (the unit still works!) that causes most engineers to
not follow good ESD techniques]
The basic evidence that I was working with is too boring to post to a
newsgroup, so I assumed that my conclusions were sufficient. I didn't
know I would be referred to as spreading "old wives tales". <g>
- Robert -
rober...@engineers.com
AJM Electronics
PS I also recommended that some communication systems that had been
used for susceptibility tests *not* be allowed out of the facility, but
alas, some marketing guy got them shipped all the way to England where
two of the 16 units failed within 2 months. Gave the company a "black
eye". So it is not just ESD that can injure units, but also v/m.
---
ş OLX 2.1 TD ş Give weeds an inch and they'll take a yard.