Updating BOOM to the new Berkeley "project-template" setup.

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Christopher Celio

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Mar 12, 2018, 3:31:17 AM3/12/18
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TL;DR:  New repo setup, go to: (https://github.com/ccelio/boom-template).


Hey guys,

Sorry it's been a little quiet. In actuality, BOOM has been seeing more work than ever before (stupid publishing embargoes...).


Change log:
  • Top-level repo is now (https://github.com/ccelio/boom-template). No longer will you need to clone rocket-chip and jump to a branch.
  • BOOM now depends on the master branch of rocket-chip, not a slightly modified branch that is harder to maintain.
  • Friendly new script to initialize a fresh repo (handles the git submodule stuff).
  • Friendly new script to build a RV64G riscv-tools toolchain.
    • It will build the EXACT version that is promised to work.
    • you MUST use the version of riscv-tools that is pointed to by boom-template.
  • System-level config and code generation moved into the riscv-boom repository.
  • work on addressing critical paths in the frontend:
    • BTB redirection moved back a stage (1 bubble on taken).
    • Conditional branch predictor redirect moved back a stage (3 bubbles on taken).
  • Support for Priv 1.11-draft (as of 2018 Mar 12).
  • 6 PRs accepted from external contributors!
  • 6 issues closed:
    • Fixed ebreak implementation (now properly sets MEPC).
    • Now sets mtval correctly on an illegal instruction (sets to 0x0).
    • Commit log now supports FP instructions again.
    • Fixed rename stage X-pessimism.
    • More efficient WFI implementation.
    • Implements new RISC-V FP standard (NaN boxing to close up undefined behavior regarding recoded n-bit values for n < FLEN).

The biggest change is I have moved the top-level boom project to a new setup: the "boom-template": (https://github.com/ccelio/boom-template).

Previously, checking out boom required cloning the rocket-chip repository and moving to a special boom branch. This caused headaches with keeping up with upstream and was fairly awkward (as some elements of rocket-chip were slightly modified to suite BOOM's needs). This problem got particularly bad when trying to compose larger projects that used BOOM as an off-the-shelf-component (e.g., creating a FPGA project that uses BOOM and rocket-chip).

The boom-template follows a successful project-template model from Berkeley for rocket-chip-based projects (https://github.com/ucb-bar/project-template). The idea is any new chip/tape-out/fpga/project takes the "template" repository and forks it. All submodules are on equal footing (boom, rocket-chip, testchipip, fpgatools, etc.). The SiFive Freedom platform also follows this same template (https://github.com/sifive/freedom). If you would like to use BOOM in your own project, I recommend that you fork the boom-template, submodule rocket-chip and riscv-boom, and then modify them to fit your needs.


Getting started should be even easier with new scripts to help you initialize and build things (make sure your $RISCV path is set-up):

cd boom-template
./scripts/init-submodules.sh
./scripts/build-tools.sh
cd verisim
make
make run


I apologize for any instabilities or performance problems in the near-term on the master branch; I still have some fixes I will be making in the immediate future.  With that in mind, the most "stable" branches will be the release tags (the most recent being v2.0.1 (https://github.com/ucb-bar/riscv-boom/releases/tag/v2.0.1)).

Thanks to everyone who have been contributing and using BOOM. I'm excited for the next round of updates!

Happy hacking,
Chris

Praveen Kumar

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Mar 22, 2018, 11:25:48 PM3/22/18
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Thanks for doing this Chris. It is much easier now to compile BOOM. Are there any plans to make a release that runs on a zynq fpga board? I find it quite hard to use fpga-zynq repository with the latest boom to create a bitstream and linux to run on an FPGA.


Christopher Celio

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Mar 23, 2018, 12:21:49 AM3/23/18
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Good question.

Unfortunately, I do not know of any plans to continue supporting the fpga-zynq repository. There are a couple of reasons for this:

  - BOOM really only fits on very large and expensive boards like the ZC706 (~$2.5k). This makes it hard for others to "dip their toes" into using BOOM.
  - At Berkeley, we found it easier to scale up our research by moving our FPGA development efforts to Amazon's EC2 cloud. Less capital expenses, less maintenance and IT efforts, and instant scale-out at a moment's notice.
  - Our hope is that we/Berkeley can provide an easy setup for others to use Amazon too.
  - My hope is by adhering to the "project-template" format, it will be relatively easy for others to port rocket-chip/boom to their particular FPGA platform (perhaps by modeling the SiFive Freedom FPGA project). This either requires bringing in devices (say from "sifive-blocks") for self-hosted systems, or porting riscv-fesvr for tethered systems. 

Unfortunately, I do not believe that Berkeley has open-sourced their Amazon/FireSim/Midas infrastructure yet. So, in the near-term, that means it is difficult to get the current rocket-chip/boom onto an FPGA. Hopefully others can come forward and share their own work if they get up-to-date rocket-chip working on their own FPGAs.

-Chris

Praveen

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Jul 5, 2018, 5:20:13 PM7/5/18
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Hi Chris, Now that firesim is open source, is it possible to get any instructions on how to run BOOM using firesim?


Christopher Celio

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Jul 5, 2018, 8:16:21 PM7/5/18
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I believe the code to use BOOM with FireSim may already be present (but perhaps commented out). The larger issue is the more-up-to-date version of BOOM (top-of-tree) is currently unstable and needs more verification effort directed towards it. The last stable release (v2.0.1) uses the older Privileged v1.9 architecture which is incompatible with FireSim.

You could probably get more information on the firesim google forum on how to mix in different rocket-based tiles.

I'll try to keep you posted when this changes.

-Chris

Sagar Karandikar

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Jul 6, 2018, 3:30:36 PM7/6/18
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We have BOOM working in FireSim on a branch (https://github.com/firesim/firesim/tree/rc-bump-may). We haven't had a chance to fully document it yet (which should happen within a couple of weeks, at which point it'll get merged to master), but you can try it out now if you understand the build/config process in FireSim (the configs you want to supply the manager with are fireboom-singlecore-no-nic-ddr3-llc4mb or fireboom-singlecore-no-nic-lbp). We'll post an update here also once things are documented and merged into master in FireSim.

As Chris mentioned the caveat here is that there are BOOM-level bugs that we haven't had a chance to look into yet that prevent complete Linux boot to prompt. Currently, on both the FPGA and BOOM-only VCS-level simulation, Linux boot gets stuck somewhere between printing out the last Linux boot message and starting init.
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