Implementing D cache flush instruction for BOOM

[Tarun Singla]

I am trying to add CBO Flush instruction in BOOM. wanted to check how do I proceed.

I have added new 

Any pointer will greatly help.

CBO_FLUSH  ->List(Y, N, X, uopCBOFLUSH , IQT_MEM, FU_MEM, RT_X, RT_FIX, RT_X  ,    N, IS_X, N, N, N, N, N, M_FLUSH   , 0.U, N, N, N, N, N, CSR.N, N),

BitPat(uopCBOFLUSH)-> List(BR_N , N, N, Y, aluFn.FN_X   , DW_XPR, OP1_RS1 , OP2_ZERO, IS_X, REN_0, CSR.N),

[Jerry Zhao]

You'll need to add support in the dcache for handling M_FLUSH operations.

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[Tarun Singla]

Hi Jerry, 

Thankyou for replying. 

I tried simulating it.

I am getting assertion failure.

LSU.scala:  assert(!(exe_req(w).valid && !(will_fire_load_incoming(w) || will_fire_stad_incoming(w) || will_fire_sta_incoming(w) || will_fire_std_incoming(w) || will_fire_sfence(w))))

given above configuration. how do I send the M_FLUSH cmd to  Dcache. It seems LSU requires some updates. if you can share some insight it will help me greatly. 

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Regards

Tarun Singla

[Jerry Zhao]

I cannot debug your system for you. In summary, M_FLUSH operations must be modified to set the MSHRs in the DCache to flush a line out.

-Jerry

[Tarun Singla]

Hi Jerry, 

I got the CMO instruction to work.

I see issue in case of a store. it is not waiting for bresp to complete instruction. any pointer will help me greatly.

Plus, in case of load instruction if I inject AXI-rresp error I see no impact.