RISC-V implementation BOOM for ML Workflows

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Abhas Kumar Sinha

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May 14, 2024, 4:33:01 AM5/14/24
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Hello everyone,

I'm writing this mail to let you know that I'm very glad to ChatGPT that I stumbled across your excellent project that implements RISC-V ISA into hardware. I was wondering a bit about NVIDIA GPUs that run on CUDA cores, but unfortunately, my area of experience (ML) doesn't match quite well with hardware/ASIC/FPGAs. 

I wanted to know if there is any such a workflow or method where one can replace using closed-source GPUs by NVIDIA with open-source hardware and tools and came across some examples - OpenXLA, OpenCL, ROCm, etc. 

I wanted to know if RISC-V Vector Extension is implemented here or not. Apologies for being so naive to not be able to check these myself. If yes, and OpenCL support gets added here, and get thousands of such extensions and SIMD/SIMT implementation for Vector Extensions and memory support to get a very good alternative to GPUs that are closed-source with comparable speedup. 

What are your thoughts regarding that? Is such possible or NVIDIA there's more efforts needed to get closer to NVIDIA performance (~40-50% to CUDA GPUs would be okay)? I hope to hear back if this isn't a very bad question to ask in the first place. Thank You.

Best Regards,
Abhas Kumar Sinha
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