Z80 MMU

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Tadeusz Pycio

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Jul 11, 2022, 3:57:36 PM7/11/22
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I wanted to implement MP/M for the Z80 processor, but found that the available RC2014 modules support a 16kB page, which is not feasible as I won't be able to build the system kernel in 16kB. Do you know of any MMU modules that implement smaller division values? I have my own implementation (built with discrete circuits in the picture), but it has not been physically realised, so I am looking for something ready-made. If you don't know I will realise my project (with memories and MMUs on EPM7032), but that's not until next month.
ttlmmu.png

Mark T

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Jul 11, 2022, 6:46:33 PM7/11/22
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Alan Cox created an 8085 board with an MMU that used a ‘273 and 257 to select a high 8k and low 56k page. He had intended it could be populated without the 8085 to use for other processors.

There is also the 74ls612 mmu which maps 4k pages, but I don’t think anyone has designed a module for this yet. I got a few from Utsource but haven’t tested them yet.

Alan Cox

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Jul 11, 2022, 8:34:51 PM7/11/22
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I am not sure I understand your problem - MP/M works fine on a 4 x 16K setup. The 8K + 56K setup works better in terms of TPA but that's really the only reason to go that way. You should only have a tiny tiny amount of code in the common space, typically the only things you need there are serial driver innards and the inner copy loops of the disk I/O. Everything else is in the banked space. It's much much cleaner than CP/M 3 on that.

Even if you have big video drivers for TMS9918A etc those can go into banked space providing you do a stack switch on entry/exit to that driver with a little stub stack of some form.

Alan

Douglas Miller

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Jul 11, 2022, 9:07:04 PM7/11/22
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I'm guessing that this MP/M you're wanting to run includes the CP/Net server RSPs - and that's why it needs more than 16K? It is possible to write those RSPs to use less common memory, I did that for my WizNET MT011 version. I can help, or you can start with the code in https://github.com/durgadas311/cpnet-z80/tree/master/src (resntsrv.asm, bnkntsrv.asm, ntwrkrcv.asm, servers.asm, plus a nios.asm such as the one in the w5500 (WizNET) subdir).

Tadeusz Pycio

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Jul 12, 2022, 3:43:23 AM7/12/22
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I'm guessing that this MP/M you're wanting to run includes the CP/Net server RSPs - and that's why it needs more than 16K? It is possible to write those RSPs to use less common memory, I did that for my WizNET MT011 version. I can help, or you can start with the code in https://github.com/durgadas311/cpnet-z80/tree/master/src (resntsrv.asm, bnkntsrv.asm, ntwrkrcv.asm, servers.asm, plus a nios.asm such as the one in the w5500 (WizNET) subdir).

Hi Douglas,
This is some solution that will not require new hardware, I need to try to move the modules into banked memory and check the common memory point. The MMU design is also interesting, but introduces new and unique hardware that will limit availability. I thought there were existing and proven MMU solutions with less memory gradation.

Bill Shen

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Jul 12, 2022, 7:04:46 AM7/12/22
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The improved 512k RAM/ROM board currently has 16K banks but has a fairly large CPLD which probably can be reprogrammed to support 8K or 4K banks.  


Another thought: Z280 has 4K banks; it can operate in Z80 compatible mode such as ZZRCC.

  Bill

Douglas Miller

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Jul 12, 2022, 11:38:00 AM7/12/22
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I guess one problem with all the different MMU options out there is how can a single MP/M XIOS support all of them? Are there ROMs that support MP/M, allowing the XIOS to make ROM calls for bank switching (and if so, how pervasive are those ROMs)? Seems like MP/M support is going to be tied to specific hardware?

Tadeusz Pycio

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Jul 12, 2022, 12:14:08 PM7/12/22
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I guess one problem with all the different MMU options out there is how can a single MP/M XIOS support all of them? Are there ROMs that support MP/M, allowing the XIOS to make ROM calls for bank switching (and if so, how pervasive are those ROMs)? Seems like MP/M support is going to be tied to specific hardware?

Hi Douglas,
MP/M operates on the logical layer of switched memory banks, while XIOS translates to the physical layer, so it is assigned to the hardware. In order to achieve versatility, an intermediate layer like the one in ROMWBW would have to be introduced.

Douglas Miller

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Jul 12, 2022, 12:46:00 PM7/12/22
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Right, so the XIOS is restricted to RomWBW. There have been problems with RomWBW use of (serial port) interrupts conflicting with MP/M. If the bank switch routines are isolated completely from the interrupt system and serial ports, then that would work - under the requirement that users run RomWBW.
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