Easy Z80 - Version 1.1

[Sergey Kiselev]

Easy Z80 is a simple to build Z80 based single board computer with RC2014 compatible bus connector.

It contains everything needed to start experimenting with CP/M (and FUZIX).

This is an open source design licensed under GPL V3. The source files and the documentation are available in this GitHub repository: https://github.com/skiselev/easy_z80.

I do have several spare PCBs, and I am selling them for $5 each plus shipping and PayPal fees (5%). This probably would make sense to US folks, as shipping outside of US is expensive :-) If needed, I can program and send the Flash ROMs and the SPLDs as well.

Specifications:

- Z80 CPU - normally runs at 10 MHz. Although, it is possible to run it on any other frequency as the CPU has a dedicated clock oscillator.

- Z80 SIO/0 - provides two serial ports. Two MAX232A transceivers are included on the board.

- Z80 CTC - timer interrupt and optionally baud rate generation for SIO

- 512 KB Flash ROM / 512 KB battery backed SRAM - same paging as implemented in Zeta SBC V2 and copied to 512k ROM 512k RAM RC2014 Module.

- MAX693 microprocessor supervisor that provides reset generation, SRAM battery backup, power failure monitoring (and NMI), and an optional watchdog

- RC2014 compatible bus connector

- Runs RomWBW 2.9.1 and newer

-10 cm x 10 cm board

Version 1.1 fixes several minor issues (silkscreen, adding a pull-up resistor on data bus to allow interrupt mode 0 operation).

[Karl Albert Brokstad]

I think you have produced a neatly designed SBC.

The space on the PCB is well exploited. Are you using more than 2 layers for tracing?

Another thing is the use of programmable logic chip (ATF16V8B-15PU).

I have no experience with this or similar components, but this is something I want to experiment with.

Karl

 

[Sergey Kiselev]

Easy Z80 uses a 2 layers PCB.

A commonly available TL866 programmer works great with ATF16V8, GAL16V8, and some other SPLDs.

Programming an SPLD with an already made fuse map (the file that specifies how the SPLD should be programmed) is no different than programming an Flash ROM.

Now, if you want to develop your own fuse maps, or modify an existing one, you'll need to use some kind of compiler/translator, that translates the source code into the fuse map. I personally use GALasm for this purpose. If there is an interest, I can share the details.

[Richard Lewis]

Another alternative is: WinCUPL It will still run on Windows 10 but barely. The UI looks like it crawled out of the 90's. I've even tried ProChip Designer where you can program them in VHDL or Verilog. Again it runs on Windows 10 but the application hasn't changed at all since the late 90's. They've only updated it so it can run on a modern windows platform. 

As a consequence I've pretty much stayed away from SPLD and gone to 44 pin SMD CPLD where I can use reasonably modern tools. 

-Richard

[Karl Albert Brokstad]

Hi Sergey

I have got a newer TL866 programmer.

I was thinking how the SPLDs can reduce the number of 74's glue logic, and make designs simpler and more robust.

Maybe also simplifying the design process by programming the logic and less hardware (PCB). 

So this is something I definitely want to try out.

You have a working system, but if I purposely make an error in the logic, how will the system operate.

This is what I want to find out as a learning experiment, maybe I get wise someday :)

I will probably keep you updated of my progress and with questions when I am on the task.

Karl

[Nigel Kendrick]

Hey Karl,

Here is Grant Searle's design (with I/O) and a 22V10 GAL for most logic.

https://github.com/linker3000/Z80-Board

I'n running WINCUPL on WINE on Linux Mint.

-- Nigel

[Sergey Kiselev]

I've tried playing with WinCUPL in the past, and I find GALasm significantly easier to use.

It is a command line tool. It runs on Linux, and it should be possible to compile on Windows with Cygwin... I might give it a try later. The source code for GALasm is provided in the GitHub repository I've mentioned earlier.

Here is an example of the source input for the GALasm (and GAL16V8 type of SPLD) used in Easy Z80:

https://github.com/skiselev/easy_z80/blob/master/SPLD/easy_z80_wdog.pld

Basically a few sections there in the PLD file:

1. First line "GAL16V8    ;  Works with GAL16V8B and ATF16V8B" - specifies the target SPLD

2. Second line "EASY_Z80   ;  Easy Z80" - electronic signature (8 bytes) programmed into the SPLD, in this example it specifies the name of the project

3. A couple of lines "MREQ IORQ WR M1 A2 ..." that specify the SPLD pin mapping to signal names. In case of ATF16V8/GAL16V8, the first line describes pins 1-10, and the second line describes pins 11-20

4. Next, there is a list of logic equations, such as "/ROMCS  = /MREQ * /MA19". The syntax is fairly simple: "/" - negation, "*" - logic AND, and "+" - logic OR. All signal names used must be previously defined in (3.) above. In the registered mode, GALasm supports .R (register output), .E (enable input), .T (tristate enable input) extensions for the signal names. Note that it automatically selects the registered mode if one of these extensions is used in the source. It will also try to use the complex mode, if the equations cannot be implemented in the simple mode.

5. Finally there is a "DESCRIPTION" section, where user-readable documentation goes. Anything below DESCRIPTION keyword is ignored by GALasm. It is also possible to add comments to other lines prior DESCRIPTION section using semicolon ";" as a separator, for example see 1. and 2. above.

-SK 

[Tom Storey]

On Monday, July 29, 2019 at 8:13:41 PM UTC+1, Richard Lewis wrote:

Another alternative is: WinCUPL It will still run on Windows 10 but barely. The UI looks like it crawled out of the 90's. I've even tried ProChip Designer where you can program them in VHDL or Verilog. Again it runs on Windows 10 but the application hasn't changed at all since the late 90's. They've only updated it so it can run on a modern windows platform. 

As a consequence I've pretty much stayed away from SPLD and gone to 44 pin SMD CPLD where I can use reasonably modern tools. 

-Richard

Hi Richard,

Can you detail your environment? What tools do you use for writing your "code" and what tools do you use for simulating your design? 

[Richard Lewis]

Short answer:

Tools used: Quartus, Sigasi Studio, GHDL, Visual Studio Code, git

My workflow:

1. Create an empty project in Quartus 

2. Import project into Sigasi and start adding VHDL (or Verilog/System Verilog) 

3. Compile with GHDL

4. Simulate GHDL or ModelSIM

5. Switch over to Quartus to do pin assignments and timing adjustments

6. Program chip

Quartus II for Altera/Intel CPLD and FPGA.  Vivado for Xilinx FPGA and ISE for older Xilinx CPLD parts. 

For the MAX and MAX7000S (which is 5V) Quartus Web Edition <= 13.0.1 must be used (current version is 19.1) but it quite stable and in fact I would argue it's better software (even though it's 7 years older). They are both free. 

I do all of my "coding" (hardware description) exclusively in VHDL since I come from a software engineering background and VHDL feels more natural to me. I generally use Sigasi which is based off of Eclipse (and is free up to a point), then analyze (compile) and simulate using open source GHDL. At the moment I'm transitioning the initial workflow  Visual Studio Code with a GHDL plugin. 

When I've finished the initial development and simulations I switch over to Quartus to do the pin assignments, timing optimizations, place and fitting, and finally program the chip. The workflow is basically the same for Xilinx parts. I could do everything from start to finish in Quartus but the editor is quite dumb (doesn't have auto-completion, formatting or refactoring like Sigasi has).

Received a temp license for ProChip Designer. The basic license is around $2000. I had a laugh when I installed it and ran it. Yeah it understands VHDL and Verilog but it is super old and primitive compared to modern toolsets. Also the UI hasn't been updated in 20 years. I think they sold it off to a support company who just ensures it runs on Windows 10. If I had used the application in 2000 I would have been shocked by how "antiquated" the UI is. 

If I needed to do any project that required combinatoric logic only I would just use an EPROM. Way easier. In fact if it is something simple like 7-segment decoder I would just use a diode matrix. 

-Richard