SC126 - Rising edge of the RESET signal

[Marten Feldtmann]

This is the rising edge of the /RESET signal of my SC126 ... is this a bad-quality-signal (no rectangle signal) ?

I have a chip which reacts on the rising edge of a /RESET signal and I assume, that this signal could

result into trouble ? Is there a way to make it better ?

Marten

[Alan Cox]

On Mon, 10 Feb 2020 at 17:28, Marten Feldtmann wrote:
>

> This is the rising edge of the /RESET signal of my SC126 ... is this a bad-quality-signal (no rectangle signal) ?

The power looks stable before it rises and Z80 parts seem remarkably tolerant. Some non-Z80 devices do need a real sharp edge.

> I have a chip which reacts on the rising edge of a /RESET signal and I assume, that this signal could

> result into trouble ? Is there a way to make it better ?

Two inverters of a 74HC14 ? As your power is stable and they are schmitt triggers it should switch sharply when the reset hits 66% of Vcc.

I've taken to use reset control devices on all my boards where it matters. I stole liberally from the SC108 in fact which uses a DS1233-5 and has nice sharp reset edge and used that on a pile of things very successfully.

Alan

[Thomas Jager]

An RC circuit is often used on reset pins, which causes the signal to look a lot like that. The RC filter's time constant on the SC126 is 4.7 μs, which pretty closely matches what you've measured.

The maximum rated rise time on RESET for the Z8*180 chips is 50 ms, 5000 times this signal.

[Sergey Kiselev]

This is likely the expected behavior. SC126 uses the DS1233 CPU supervisor circuit, that has a 1nF capacitor on the /RESET signal. It would take a bit of time to charge that capacitor through the internal pull-up resistor in DS1233.

Ideally, in such a case, the devices that use /RESET should have a Schmitt trigger / hysteresis RESET inputs. Or even better include a Schmitt trigger (e.g. a pair of 74HCT14 gates) on the output of CPU supervisor (the CPU supervisor usefulness is questionable in this case... a simple RC will do).

It is not clear if Z8S180 has a hysteresis on the /RESET. The manual suggests that RESET fall/rise time should be 50 ms maximum. Check if your readings are within this spec.

In SC126, /RESET also goes to two 74HCT273 flip-flops. Most likely they will be OK with slowly changing RESET (in the worst case they will read it a series of HIGH/LOW transitions, and reset themselves a few times... shouldn't be any harm).

But more importantly, this /RESET also goes to the RC2014 bus. So you'd need to check your RC2014 cards for their /RESET specifications.

Thanks,

Sergey

[Tom Szolyga]

I use a DS1233 in my SBC designs as well.  It works very well.

The SC126 uses a DS1233 to generate the /RESET signal.  There is no time constant for this device.  The reset signal is bidirectional so a switch to ground will re-trigger the reset signal.  If you are thinking the 4.7K resistor and the 1nf capt connected to reset as a "time constant", this is not true.  From the datasheet:

"For proper operation with an external pushbutton, a capacitor between 100pF and 0.01uF must be

connected between RST and ground. In applications where additional reset current is required, a

minimum capacitance of 500pF should be used, along with a parallel external pull-up resistor of

1k minimum."

Thus, if the DS1233 is loaded into the board correctly and it is a good part, reset should have nice edge.

Best regards,

Tom

[Sergey Kiselev]

Check the DS1233 datasheet / block diagram. The /RST pin is basically connected between a 5 k pull-up resistor and a MOSFET. Connecting a 1 nF external capacitor forms an RC network with time constant of 5 us. That gives about 2 us transition between 33% and 67% of the power supply voltage. Fairly slow transition, but well within 50 ms specification of Z8S180.

- SK

[Steve Cousins]

Actually the rise time should be about twice as fast as the value calculated from the DS1233's 5k internal pull-up and the 1 nF external capacitor as SC126 also has a 4k7 pull-up on the reset line.

Steve

[Douglas Miller]

I'm no expert on the SC126, but that waveform makes me nauseous.  The problem is, unless your entire system is truly a single chip (which has schmitt-trigger input), you need to provide a synchronized RESET to all the hardware. If you feed that signal to several chips - even though each might have schmitt-trigger input - you have a situation where variations in the chips would lead to the chips coming out of RESET at different times. The old 74'14 method is what we used to use in the old days, you get a clean RESET signal that everyone sees at the same time (or close enough).