New RCBus Module Z80-CPM - Z80 CPU, 512 KiB of Flash ROM and 512 KiB of RAM

[Sergey Kiselev]

I designed yet another Z80 CPU with integrated memory RCBus module.

This is hopefully a simpler to understand and build design (vs. my previous CPLD based RCBus CPU modules). It uses a simplified MMU, similar to the SC602, where the CPU address space split into two 32 KiB banks. The lower 32 KiB can be mapped to any 32 KiB page of the memory, while the upper 32 KiB is always mapped to the top 32 KiB of the RAM.

The module has only one I/O register, that is used to set the page number - 0x78 (aliased to 0x79). The LSB bit of this register is ignored. This allows using the module with unmodified RomWBW image, which uses similar memory split, and writes two consecutive page numbers to 0x78 and 0x79, and always maps top 32 KiB to the top of the RAM.

Theoretically the module should work with less memory, e.g. 128 KiB or 256 KiB flash ROMs and 128 KiB SRAM, but I haven't tested that functionality yet.

Here is the project's GitHub repo: https://github.com/skiselev/Z80-CPM

Thanks,
Sergey

[Steve Cousins]

Nice design. Lots of functionality on a single module.

Steve