Running ROM less Z80 single board CP/M at 20MHz

[Mark T]

Originaly posted about my single board CP/M which is a romless design using an FT245 to bootstrap the battery backed RAM without the need for any programmed parts.

https://groups.google.com/forum/#!msg/rc2014-z80/4e-e4GRH8uY/nVVoVWhXCgAJ;context-place=forum/rc2014-z80

I had found that I couldn't get this to run with clock speeds above 12MHz and suspecting this was due to propagation delays in the 74LS156 or slow RAM access time I made some wire mods to try and extend the access time. Attached a copy of the current schematic here.

I was going to try adding a wait state generator as I wanted to test my shift register SPI SD card module at 20MHz.

https://groups.google.com/forum/#!msg/rc2014-z80/A5lvM31saQo/gbm5jgtaBgAJ

I was able to check that the Z80 seemed to be actioning instructions received via the FT245 during the first stage bootstrap, although I hadn't confirmed this was writing data to RAM correctly.

Before trying to wire up a prototype wait state generator I loaded the battery backed ram while running at 12MHz, then switched off bootstrap mode, swapped the crystal to 20MHz, and was surprised to see it boot up and run.

The shift register SPI SD card module also seems to be running, tested by using PIP to copy a 1028K file from one sd card to the other. At 12MHz this takes 50 seconds, at 20MHz this is only reduced to 40 seconds as there are overheads in the sd card that are not directly dependent on clock speed. Its not exactly reliable, I have seen an occasional couple of panic messages, but this was using only 74LS163 and I had expected to need to use the 74ALS163 to reach 20MHz.

I'm now suspecting that the issue preventing bootstrap at 20MHz is the time taken to assert WAIT, when the second stage bootloader is reading input data from the FT245.

I've tried swapping the 74HCT138 IO address decoder to a 74ALS138, and also the 74HCT74 to a 74ALS74. I was hoping to see a slight increase in frequency for bootstrap but this is still not working at 14.195MHz.

It looks like its possible to get 74ALS156 so thats one more thing to try. Also building up another module without the wire mods to see what frequency I can run without the modified address decoding.

Mark

[Mark T]

I didn’t get around to sourcing a 74als156 to see how much of an improvement this would make for increasing the clock during bootstrapping. Instead I replaced the 74ls156 with a plug in module, two off 74lvc1g3157 and one off 74lvc1g125, assembled on 1.27mm pitch protoboard. I’ll draw up the schematic when I get some spare time. One ‘3157 switches the z80 rd from the bus to read control for the ft245, the second ‘3157 is switched between ft245 read and z80 wait by the RXF output of the ft245. The ‘125 drives the ft245 read control when its addressed as an input port. 

The propagation delay through the ‘3157 switch is less than 1ns according to spec, probably delayed a bit by load capacitance. I haven’t tried to measure the delay as my 200MHZ scope is probably not fast enough or good enough probes. I am now able to bootstrap the 512k ram at 20MHz clock.

The 74lvc1g series are able to operate at 5v supply, unlike the larger 74lvc types that are only intended to operate at 3.3v. They do need cmos input levels, not ttl inputs, so anything driving 74lvc1g inputs should be cmos.

[Mark T]

I’ll continue the investigation into the speed of the shift register micro sd card interface in this thread.

Link to the original thread in rc2014 group

https://groups.google.com/forum/#!msg/rc2014-z80/A5lvM31saQo/gbm5jgtaBgAJ

And then a variant on this to interface to a featherwing wiznet:-

https://groups.google.com/forum/#!msg/rc2014-z80/T7j-9CAsKAo/3J3SMD8AAwAJ

Investigating increasing the reliability at higher clock speeds, using the micro sd card version first, but hopefully this will also apply to the wiznet interface. The featherwing wiznet doesn’t seem to be readily available now, but there are a couple of similar modules available at lower cost. I have sourced a couple of each of these, so may adapt the featherwing wiznet interface or make an adapter from the micro sd card module pmod connector.

I replaced the 74ls165 with a 74als165, and this then enabled reliable operation of the micro sd card at 18MHz, copying 1MB files between micro sd cards. At 20MHZ it sometimes works, maybe 2/5 verify passes, but getting worse the longer it runs. The limit seems to be the 74LS595 setup time. 

I couldn’t source 74ahct595 in dil, so have a 74ahct595d mounted on an adapter, 1.27mm protoboard with point to point wiring.

The micro sd card interface now seems to be reliable at 20MHz, but only when using a crystal oscillator, and fails everytime when using a 20MHz oscilator module (again this is smd mounted on proto board adapter.

Its possible the mark/space ratio of the crystal oscillator is helping, but I probably need to adjust the clock to the 74als165 to match the 74als165 propagation time to the sd clock. Maybe a small rc delay to the input of the 74ahc02 that generates sd clock and 74ahct595 clock.

[Bill Shen]

I did a similar FT245 bootstrapping scheme with W65C02.  6502 makes its access in high phase of clock cycle, so without wait state, the fastest the 6502 computer with FT245 console can run is about 8MHz which has 62nS in the clock high phase.  Later on I added a wait state for FT245 access and able to run to 24MHz.  24MHz with one wait state is 60nS access time.  My particular design is all TTL so there are more propagation delays, my conclusion was FT245 needs about 50nS access time.  There is a long-ish discussion about this on 6502.org.  The post on Aug 4 2023 was when I talked about adding wait state to run 6502 to 24MHz.  You may need to consider adding wait states when accessing FT245.
  Bill

[Mark T]

I had thought that the minimum time to consider was RD active during M1 fetch at 1.5 clock cycles, approx 75ns at 20MHz. There is also the case where wait is active and then released when data is received. In this case there is up to 7.5ns set up time for wait, then 0.5 clock cycle but data needs to be valid 12ns before the clock rises, so only 20.5 ns.

I think the ft245 is only working during bootstrap because the ft245 buffer is never emptied.

After bootstrap the ft245 is only accessed by input and output instructions. Again worst case is when wait is released, in this case 7.5ns set up time, one full clock cycle, less 12ns. Possibly 45.5ns. 

I might just be getting away with this due to having a better than spec ft245.

The wait input to the z80 probably needs to be registered against the rising edge of clock to add one extra half clock cycle.

[Mark T]

I modified the micro sd card module to measure the timing between the falling edge of sdclk and the transition time of mosi. First removed the 74act163, linked Qd to ground to keep sdclk enabled, the linked the inverting output of the 74als165 to the input.

I found approx 7ns delay from falling edge of sdclk and the transition of mosi. I thought it might be enough to stop the micro sd card working correctly with a 50/50 mark/space ratio from the 20MHz oscillator module, possibly allowing it to work with the output of the 20MHz crystal oscillator which is not symetrical.

First attempt to delay sdclk was a simple rc delay on the input of the 74ahc02. 100 ohm and 100pF delayed the falling edge of sdclock to match mosi transition. Unfortunately this changed the mark/space ratio of sdclk to 25/75. Robably due to 5v clock source into 3.3v 74ahc02.

Second attempt was resistor divider, 470 ohm series and 1k to ground in parallel with 10pf. This reduced the timing from falling edge of sdclk to mosi transition to approx 1ns, while keeping 50/50 mark space ratio.

Unfortunately no change to the issue. Micro sd card interface still not working with the 20MHz oscillator module, but works ok with the 20MHz crystal oscillator, so back to trying to figure out why the oscillator module is a problem.

[Mark T]

I found a spec from Kingston with some information on the hardware timing of micro sd cards.

https://www.kingston.com/datasheets/SDCIT-specsheet-8gb-32gb_en.pdf

I think this shows the timing should work without the extra delays that I have added.

I have also added a 74ahct1g32dckr to delay the clock input of the 74ahct595, but still not working with the oscillator module. Maybe one more attempt with an RC delay in front of the ‘32. I didn’t want to put an RC direct on the clock input of the shift register.