P90CE201, 68000 with 8-bit data bus, 24-bit addresses and integrated I/O

[Bill Shen]

Learned about this device from a posting on Facebook.  It is available from Poland for $2.92.  https://www.ebay.com/itm/1pcs-P90CE201AEB-QFP64-PHILIPS-BULK/293331078060  Yes, it is SMT, but the lead pitch is 1mm, very generous.  I thought I give it a try.  It is like 68008 but with 24-bit addresses, 12MHz CPU, and integrated I/O.  Among them are two I2C buses.

Hurried up a pc board design to check out the device.  It is in RC2014 form factor.  Should receive the board back next week, hopefully the device as well.

Also designed a carrier board so I can reuse the device without tedious rework.

  Bill

[Greg Holdren]

As I mentioned on the facebook post $13 seems high for a part or two. :) One person mentioned that is normal. May pull the trigger anyways. If others are interested I can do a group order and send out for a couple bucks extra to people in the US.

Is there a reason the clk, reset, wr/rd and extra addr line wasn't connected? I now you banged it out quickly. :) I guess you wanted to stay with a single row bus connector for now too.

Interested in how it turns out!

Greg

[Bill Shen]

I'm always amazed at the free shipping or low shipping cost from China. I think it was a hold-over agreement from a couple decades ago when China needed the shipping discount. I don't think $13 is unreasonable shipping from Europe to US.

The board fabrication is done, I am expecting the pc boards Monday. Don't know about the part delivery schedule, however.

There are loose ends with the hurried-up design. The reset is active high, clock is divided-by-2, haven't made up my mind about RD, WR, IORQ. My goal with this board is get the processor to talk through the serial port. I'll make up the rest as I go along or design another board from what I've learned.

Bill

[Marten Feldtmann]

Seems to be a newer and enhanced version of the 68070 ?

Marten

[Bill Shen]

I would say it is 8-bit version of 68070, like MC68008 is 8-bit version of MC68000. 
  Bill

[Tom Szolyga]

I found the SCC68070CAAA84 on eBay for $4.62.  URL:https://www.ebay.com/itm/1pcs-SCC68070CAA84-SCC68070-16-32-Bit-Microprocessor-PLCC84-PHILIPS/263326671803  The shipping is $11 but it is ths same cost to buy 1 or more.  The part seems to be a 68000 with 16 bit data bus and 24 bit address bus plus UART, timers, DMA and I2C.  It is not clear whether the UART can run faster than 19.2K.

Tom

[Alan Cox]

On Saturday, 23 November 2019 18:22:11 UTC, Tom Szolyga wrote:

I found the SCC68070CAAA84 on eBay for $4.62.  URL:https://www.ebay.com/itm/1pcs-SCC68070CAA84-SCC68070-16-32-Bit-Microprocessor-PLCC84-PHILIPS/263326671803  The shipping is $11 but it is ths same cost to buy 1 or more.  The part seems to be a 68000 with 16 bit data bus and 24 bit address bus plus UART, timers, DMA and I2C.  It is not clear whether the UART can run faster than 19.2K.

The 070 is a seriously weird Signetics offshoot. It's clearly somewhat different internally as the instruction timings are actually much slower (like about 33% - and that's before you add a wait state for the MMU). It also has strange exception handling in that it's 'almost' a 68010, and it's got a segment based MMU that's sort of a Signetics 68905 but not quite either. I believe it was originally mostly intended as a custom 680x0 variant for CD-i players coupled with a 68470.

Would certainly be an interesting CPU to run Fuzix or Minix on with the actual MMU.

Given it was pretty much half the speed of a 68000 with MMU enabled I dread to think how hard an 8bit wide version would suck !

Alan

[Richard Deane]

I hope you get it working well, as I've just bought one and a few spares (postage to UK within EU is cheap ) - I hope I will eventually be able to solder up a release of your board and have it working with Fuzix (and if anyone is able to implement RunCPM under Fuzix I could run most of my favourite cp/m apps as well! (I recollect reading that Fuzix has some support for running cpm apps but I assume that was only for a z80 flavour - and I've not been able to find any further info on that)

Richard

[Bill Shen]

As Alan pointed out, P90CE201 may not be much of a processor performance wise.  I do have existing design of 68008 running CP/M68K, so I can compare them.

There are basic questions of whether the part is any good.  You may have noticed that they are sold in 'used' condition, I assume they were removed from existing boards, possibly need cleaning up and straightening out which means manual soldering and visual inspection are required.  Lots of unknowns right now, but yes, I'll definitely release all the design files once these issues are solved.

  Bill

[Bill Shen]

Received the P90CE201 this afternoon.  Parts are carefully packaged and appear to be new parts, not used parts removed from old boards.  The planarity is not level, however, so manual soldering is necessary.  Fortunately the generous 1mm lead pitch means it is quite easy to solder by hand and adjust legs that are not level.  I'm displeased with my QFP64 footprint, the default library is for machine soldering, I would make the pads longer to make it easier to hand solder.

Wrote a very simple program with EASy68K and burn it into EPROM.  Power it up and it's alive!  Current consumption is 50mA, 5V.
  Bill

* 11/27/19
* first test program for P90CE201 on X688 pc board
*
SBUF     equ      $80002021                  * serial port data reg
SCON     equ      $80002023                  * serial port control reg
T0CON    equ      $80002035                  * timer0 control reg
T1CON    equ      $80002045                  * timer1 control reg
T2CON    equ      $80002055                  * timer2 control reg
TH2      equ      $80002050                  * timer2 high reg
TL2      equ      $80002051                  * timer2 low reg
RCAPH2   equ      $80002052                  * timer2 reload reg high
RCAPL2   equ      $80002053                  * timer2 reload reg low

         org 0
         dc.l stack
         dc.l start
start:
         nop
* use timer2 to generate baud clock for UART        
         move.b #$ff,RCAPH2                  * stuff 0xfffc into RCAP2
         move.b #$fc,RCAPL2
         move.b #0,T0CON                     * disable timer0
         move.b #0,T1CON                     * disable timer1
         move.b #$34,T2CON                   * timer2 is baud rate at 115200
* set UART to normal serial mode
         move.b #$50,SCON
* serial port should be ready now
tx0:
         move.b #$20,d1                      *start with ' '
tx:
         move.b d1,SBUF                    * write to serial port

         move.w #$fff,d0                     *delay loop
spin:        
         nop
         dbra d0,spin
         add.b #1,d1                         *increment serial data
         cmp #$7e,d1
         bne tx
         bra tx0


         
         org $1001000
stack:      

         end start  

[Greg Holdren]

Very nice Bill. It sure does look a little tight on the pads for sure.

Any ideas on where you want to go on the next rev?

Greg

[TonyD]

+1 what Greg said, very nice looking board.

Did you hand solder the P90CE201?

Tony

[Bill Shen]

Greg,
I need to explore a bit to find out its capabilities.  The stack frame is like 68010 so that's good for operating system, but the vector base is still fixed at 0x0 so I need to swap out EPROM with RAM somehow.  I want to port CP/M68K because it is easy, and will give me an idea about its performance.  Next board revision is likely to add a PLCC44 CPLD, fix the QFP64 footprint, add a mass storage, and interface to RC2014 bus.

I'm also thinking of adding it to the -uno family of boards design for Arduino Mega case: Zuno for Z80, uZuno for Z84C90, ZZuno for Z280, and Kuno for P90CE201.  (Urban dictionary defines Kuno as "The best thing that has ever happened to the universe", whew, not quite!
  Bill

[Bill Shen]

Tony,
Thanks.  Yes, I soldered P90CE201 by hand.  The lead pitch is 1mm, so it is significantly easier than soldering 0.5mm SMT.  With improved QFP64 footprint, it should almost be "easy" to solder.
  Bill

[Colin MacArthur]

Hello Bill

GREAT looking board...

As for the RAM @ 0x0, I have had good luck with the DS1213D SmartSocket.

See attached file Dallas Semiconductor Application Note 4, Option 2: Density Upgrade (DS1213D can be upgraded from 128K x 8 to 512K x 8 memory)

If your PCB does not have RAM/ROM jumper options for pins 3,29,31 then you need to jumper the following:

ROM           RAM

31(WE) to 29(WE)

29(A14) to 3 (A14)

 3(A15) to 31(A15)

(Someday I will make a small PCB with the above changes, socket on one side and pins on the other...)

(It would be GREAT if everyone put RAM/ROM jumpers on the PBC, like Sergey's MINIMAX 8085 board etc)

Then I just put a ram chip in the SmartSocket.

Put the SmartSocket in the TL866 Programmer

Select DS1250AB (512kx8 NVRAM), program & GO.

Now you have your boot program in RAM.

I use this all the time and its easy to reprogram in place with the HEX file load option.

Also the RAM is faster the most ROMs

FYI

You could also use a  DS1250AB NVRAM chip if you have one...

or two if you want both ram chips to be NVRAM...

CM

[Bill Shen]

Colin,
Beside getting program into battery-backed RAM initially, there is another important requirement: there needs to be a protected area to keep the bootstrap code; the bootstrap code is accessible only immediately after reset and copied to the normal RAM area.  This is because application code, like CP/M will overwrite code at 0x0 and destroy the bootstrap code if it is not protected somehow.

The simplest approach is probably switching the ROM & RAM chip selects which requires some minimal circuitries. 

A quick status on P90CE201 development status:

* Raised the CPU clock to 22MHz and reduced EPROM/RAM wait states. 

* First order of business is developing a simple S record loader so I don't have to burn EPROM so much.

* The next order of business is developing a simple memory diagnostic to check the RAM. 

* Here is a simple S record loader.  It assumes program to be loaded is written for EPROM ORG at 0x0 and first executable code is at 0x1000.  The code must be PC-relative so during S record load it is actually located into RAM at 0x1000000 and program execution starts at 0x1001000 after loading.  I kludged up some hooks so exception vectors that are in absolute addresses 0x0-0x3FF (ROM space) can be changed with code loaded in RAM.  I'm trying to keep the modification to a minimal when the program is ready to be burned into EPROM.

* A simple RAM diagnostic that initializes a location with a number, adds a prime number for next location, continue for the entire RAM, then goes back to verify.  It repeats the test with different seed value every pass.

* Timer is turned on to interrupt CPU at 100 ticks per second.

All is working well.

  Bill

[Bill Shen]

I have a new version of bootstrap EPROM that implemented the basic EASy68K trap 15 service routines, enough to run Lee Davison's EhBasic for 68000.  With EhBasic running, I can run the ASCII mandelbrot benchmark and compare to other processors.  Running this on 11MHz P90CE201 takes 96 seconds.  By comparison, it takes 102 seconds for 8MHz 68000.  So 11MHz P90CE201 is about as fast as 8MHz 68000.  That's actually better than I've expected.  Good to know.
  Bill

10 FOR Y=-12 TO 12
20 FOR X=-39 TO 39
30 CA=X*0.0458
40 CB = Y*0.08333
50 A=CA
60 B=CB
70 FOR I=0 TO 15
80 T=A*A-B*B+CA
90 B=2*A*B+CB
100 A=T
110 IF (A*A+B*B)>4 GOTO200
120 NEXT I
130 PRINT " ";
140 GOTO 210
200 IF I>9 THEN I=I+7
205 PRINT CHR$(48+I);
210 NEXT X
220 PRINT
230 NEXT Y

[Bill Shen]

Build up  2nd X688 board because I need to do some modification to the design, and didn't want to mess up the one good working board I have.  Board #2 will have the RAM/EPROM swapping logic kludged in.  It uses a quad data selector, 74ALS157, to switch between RAM and ROM chip selects using one of the auxiliary register outputs.  So at power up, the EPROM is located at 0x0 and RAM located at 0x1000000; after switching, RAM will be at 0x0 and EPROM at 0x1000000. 

The challenge now is getting the base addresses correct in my head as I switch the RAM/EPROM around.  I also need to write everything as position independent codes.  Frankly I'm getting confused right now, a nap would be good...
  Bill

[Bill Shen]

With RAM at 0x0, the exception vectors can now be modified easily without elaborate hooks.  More importantly CP/M68K is now possible.  The board does not currently have a mass storage, so CP/M files need to stored on the 1/2meg EPROM, which already contained a monitor and EhBasic and soon a CP/M system file, so there are only about 390K remaining.  CP/M68K files are larger than CP/M Z80 files, so 390K is not enough for everything.  A fairly major pruning is needed.  CP/M68K also needs a R/W disk, e.g., RAMdisk which is carved out of the 1/2meg RAM.  64K for CP/M.sys, 192K for TPA, leaves 256K for RAMdisk.

Because everything is on RAM or EPROM, the CP/M68K bios is shockingly simple.  For now the BIOS and CP/M BDOS/CCP are serially loaded.  Once it is stable, it'll be copied to EPROM and run with a command.

Generating the ROM disk is a bit of trick because CP/M68K distribution files are in relocatable form, .rel, which take twice as much space.  A 'RELOC' command is needed to convert files specifically for my hardware environment.  Because of the tight space, I want to do the conversion before saving them to the EPROM.  This is where the EASy68K simulator becomes very useful.  I run the CP/M68K in the simulator, loading up a virtual disk with all CP/M68K relocatable files, setting up a 2nd virtual disk identical to the EPROM; then run through the RELOC command to convert files to .68K format and copy the bare minimal files to the 2nd virtual disk; then save the 2nd disk image into binary and burn into EPROM.

So here is CP/M68K running on X688.  I thought the performance is quite reasonable.  I'll copy the CPM system file into EPROM and created a command to boot CP/M so I don't need to serially load it every time.
  Bill

[Bill Shen]

This is the last test before revising the pc board.  The I2C feature is one of the reason I want to experiment with P90CE201.  There are two I2C buses; there are no deep data buffer but interrupt service is quite good.  However, with 400KHz I2C speed, I'm still better off using polling method, but interleaving some work between each poll.  I ported the Z80 code to P90CE201 which at 11MHz is significantly slower than Z80 at 22MHz.  I believe I can utilize the better 68000 instruction set and bigger memory space to speed up the work, but I don't think 11MHz P90CE201 which is effectively 8 MHz 68000 can run as fast as a 22MHz Z80 except in some specialized tasks.  This is Gosper's glider gun running on P90CE201  https://youtu.be/DbL4SoDDJQU


Well, that was fun, I'm off to another 68000 design, 68EZ328 DRAGONBALL.  Even the name sounds impressive!

  Bill

[Marten Feldtmann]

Cool stuff, though I still assume, that an Atart ST (8 MHz 68000) will always be faster than a 22 MHz Z80 ?!

Marten

[Bill Shen]

Do you have any benchmark I can run? My feeling is 68000 @16mhz is faster than 22MHz Z80, but not 8Mhz 68000.
Bill

[Tom Szolyga]

I am interested in benchmarks too.  I have a 68030 design in the works and I would like to generate some performance data for it.

Tom

[Bill Shen]

Received another batch of pc boards; among them is this P90CE201 adapter.  Unfortunately the default library is for machine soldering so there are not much room for hand soldering.  That is compensated by the generous lead spacing (1mm), so I managed to solder it fairly well.  Anyone here in the USA interested in the adapters, PM me.  I'll drop a couple blank adapter pc boards in the First Class letter mail.
  Bill

[Bill Shen]

Documentation of X6800 and P90CE201 is here:
https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:x688

  Bill

[Bill Shen]

I have two blank pc boards free to anyone interested.  Send me an email.
  Bill

[Bill Shen]

Thinking some more about P90CE201, I really think there are many possibilities with it.  The simplified interface is easy to use, the large memory space make bit map graphic simple to do and there are plenty of interrupts.  I think a small laptop like the recently discussed ZedRipper is quite possible with P90CE201 using retro technologies (assuming 1990's technology is considered retro).

Before jumping into full-up laptop design, I thought I'd start off with a general purpose motherboard that has several expansion slots (RC2014 bus, of course).  This way I can experiment with different OS, I2C bus, SPI bus, video, keyboard, music, OLDE display, etc.  So here is a first-cut design:
* P90CE201 running at 22MHz
* 115200 baud serial communication
* 512K EPROM, in-situ programmable
* 512K RAM
* EPM7032S/7064S CPLD for programmability
* 3 RC2014 expansion slots
* Compact flash interface supporting both CF as well as DOM (DiskOnModule)
* I2C connector
* Dedicated I2C connector for 128x64 OLED display
* CPM68K ready
* Economical 4"x4" 2-layer PC board

This a rough schematic and board layout.

  Bill

[Bill Shen]

On the drawing board is also Kuno, P90CE201 for Arduino Mega enclosure.  It has the same features as the motherboard above, except with only one expansion connector.  The form factor 2.1"x4" and layout very much like MicroZ, see attached photo.  One difference from MicroZ is the 2x8 LED array will be replaced with 128x64 OLED display inside the acrylic enclosure.
  Bill

[Tom Szolyga]

Hi Bill,

I REALLY like the idea of a CP/M 68K system in the microZ form factor.  It would fit in a pocket and could use a notebook/chromebook for the keyboard/display. Just a Thought:  What If the board fit inside a Pinebook?   Sign me Up.

Tom

[Bill Shen]

Tom,
Thanks for the feedback.  I like the Arduino Mega enclosure because it is cheap, under $2.50, and is about the size of standard RC2014 board.  I already have two versions of Z80 for Arduino Mega enclosures.  I'm working on the P90EC201 version, and I plan to put a Z280 in the enclosure as well.

Are there room inside Pinebook for additional board?
  Bill

[Greg Holdren]

Bill,

Looks nice! I'm not sure if you worked up the CPLD code yet but maybe a 7128S part instead? The 32/64 PLCC version doesn't seem pin bound but extra pins are nice. Not sure if you are nearing logic limits.

If I remember the datasheet A19-A23 could be used as IO so these 5 lines could be routed with or without other logic to the spare T(x) pins.

Greg

[Bill Shen]

The logic is so minimal, I'm hard pressed to even use a CPLD.  I thought about using SPLD like GAL22V10, but I don't really want to deal with more inventory of parts.  I managed to acquired about 200 EPM7032SLC44 for about 50 cents each so from cost point of veiw EPM7032S is definitely cheaper.

A16-A23 can also be used as general I/O, in fact A23 is used to swap RAM & EPROM chip selects.  I brought them into the CPLD as discrete controls.
  Bill

[Tom Szolyga]

Bill,

Take a look at the Pinebook 14.  It is $99.   It looks like there is space on the left of the track pad in the photo. 

Tom

[Bill Shen]

Great! plenty of room, there are even mounting holes.  Interesting idea!
  Bill


On Monday, December 9, 2019 at 11:50:48 AM UTC-7, Tom Szolyga wrote:

Bill,

[Bill Shen]

Found some time to finish the P90CE201 board designs and sent off designs to JLCPCB yesterday.  The first one is a 102mmX102mm motherboard with P90CE201, 512K RAM and EPROM, CPLD, CF or DOM interface, and 3 expansion slots.  The expansion slots are for RC2014 I/O peripherals.  I should be able to run CP/M68K using either CF disk or DOM for mass storage.  The CF connector is mirror image of DOM connector, so by adding one more row, I should be able to use either CF disk or DOM.

The 2nd design is same as the motherboard design but the expansion slots are eliminated and the overall form factor fitted for the Arudino Mega enclosure.  The parts will be assembled and tested first in the motherboard, and then soldered down to fit the Arduin Mega enclosure.
  Bill

[Bill Shen]

Received the pc board yesterday and built up the first P90CE201 motherboard.  It runs the previous software OK, including the barebone CP/M68K that was stored in EPROM.  I'm adding the CF disk to CP/M68K now.  Current consumption at 22MHz is good, 110mA @5V.
  Bill

[Bill Shen]

Kuno, same design as the P90MB above but with only one expansion bus and designed to fit Arduino Mega enclosure
  Bill

[Greg Holdren]

Bill,

I finally had some time this weekend to put together the x688 board. I figured I'll get this one going and play with it before attacking the full featured P90mb.

It was a fast build but had issues in getting the CPU to run at all. No wiggling on the address/data and control line. Did all the basic debugging stuff with out any luck. I noticed that the P90mb uses a 2.2uF cap on the reset line while the picture of your x688 and schematic shows 10uF for the reset cap. It appears that the 10uF reset cap is not a good choice of value to use. The datasheet also recommends a 2.2uF for auto start too.  You might want to update the schematic with the 2.2uF value or make a note in the builder page for it. I'm guessing it worked for you at some point.

Also, the schematic shows a 24MHz crystal which is what the P90mb uses apparently but the photo shows 14.7456 MHz and the description mentions 22MHz. The bootstrap code mentioned 22MHz. :) The UART outputs legible chars with 22MHz so I figured that should be the final answer based on the baud timer values in the source. :)

As a twist in all this I actually cut a P90 out and replaced it as I figured it was a bad device. The originally installed VSS2 pin was hanging on by a thread when I Installed it. (damaged corner pin) I thought that this might have been something to do with it not working. It probably would have worked anyway as it was the reset cap after all. Well I do have another P90 CPU for the P90mb so life is good.

I'm using an dip Atmel 29C020 for now. I do have AMD 29F040 in PLCC but the TL866II Plus didn't like it with my home made PLCC to DIP adapter board. I do have the adapter boards you made but haven't tried it yet with my PLCC parts.

So the boot loader works. I can load and run the RAM test/Wall clock just fine. I'm having some problems with Eh Basic (high RAM load version) I guessing the other is for the Easy68K sim.

What I'm doing is loading Basic, typing eb and pressing enter with nothing coming up. Is this the correct procedure?

Tnx,

Greg

[Bill Shen]

Greg,
I have to admit that 6+ months later, X688 is a blur in my mind.  I had tried several different approaches before X688 and after that they all ran together in my head now.

I looked at my X688, it has a 10uF capacitor and powered up OK, but all my other P90CE201 boards have 2.2uF, so maybe 10uF happened to work for that particular part.

Which version of EPROM are you using?  I just powered mine up, it is version 0.3 and EhBasic runs with 'eb' command.

Simple S record loader, v0.3
load address is offset by $1000000 to run in RAM
auto execute at 0x1001000 after load finish
type eb followed by carriage return to run EhBasic
ready to receive S record
eb
391694 Bytes free

Enhanced 68k BASIC Version 3.52
for the Sim68k 68000 simulator
Extension commands Version 2.33

Ready

[Bill Shen]

Attached is files for rev0.3 X688.
  Bill
PS, 22MHz is the correct clock for X688

On Monday, July 6, 2020 at 3:42:56 PM UTC-6, Greg Holdren wrote:

[Greg Holdren]

Bill,

I think I have the same files which are on the builder page.

I have the S loader 0.3 burned into Flash and I'm trying to load EhBasic using the S loader feature. I guess this is the wrong way since it is not working. Loading the RAM test using this process works.

So I guess the two S files need to be merged and then burned into flash. Is this what needs to be done? I'm trying this now but my PROM tools are brain dead and it is not capable without jumping hoops. My TL866 doesn't understand S files (but I can merge bin files) and the other CQ burner can't manage loading two S files without writing over each other. (that is seriously brain dead, do what the file tells you to do)

So it either make two bin files with proper padding on the loader section or get my DOS based Needhams EMP  program out to take a stab at it.

Do you have a single image you can send while I work out how deal with the S file issue?

Greg

[Greg Holdren]

Bill,

All is good. I used the Bin tool that came with Easy68k and created two binary files with proper padding on the boot file and used the TL866 burner sw to combine the two and burn the flash.

ASCII art runs!

Thanks,

Greg

[Bill Shen]

Greg,
In the zip file I attached yesterday is a image file .bin for flash which merged several S record files. I too used EASy68K bin application to convert s record to bin and then used the EPROM burner program to merge several bin files into one image. Looks like you've figured out the same process. It goes to show that Great Minds think alike! ;-)
Bill

[Greg Holdren]

Bill,

Yeah, I didn't see a .bin file in the zip. Just source and s files with an include file.

Greg

[Bill Shen]

Someone is interested in a P90MB.  I've revised the board in 2020 to fix the compact flash interface (adding 100pF/100R filter, 8x100R serial termination for data lines), so I use this opportunity to update P90MB homepage and assembled/tested 2 updated boards.  The CF interface is now quite robust.  I took a picture of P90MB running Game of Life on one of its two I2C buses.
  Bill

[Greg Holdren]

I was just looking at the Rev 0 of the board and I have a CPU to put on it. Need to find time. I have many boards backed up in the queue.

The Rev0 100pf/100 ohm resistor mod maybe doable but I doubt the series term is possible.

Greg

[Bill Shen]

If you heat the adapter's pin a bit longer, the plastic will soften then you can pull the pin out with tweezers easily.  After that you cut off the connecting plastic shell so resistors can fit then solder in 100 ohm resistors.  You need to use 1/10W resistors, the regular 1/4 resistors are too fat to fit.
  Bill