I'm working on an "universal" VGA/keyboard board that will work with Z*80, 68K, and 6502. This is based on the 40-pin RC2014-compatible
VGARC which has a 4K dual port RAM with processor interface on one port and video controller on other port. There are two challenges;
1. Accommodate the addressing scheme of Z*80 16-bit I/O space to linear memory map of 68K and 6502
2. Adopt RC2014 bus to RC6502 bus
I've had success modifying VGARC for CB030 that I want to describe in some details here.
VGARC is designed for Z80's 16-bit I/O space where most-significant byte of address is A0-A7 and least-significant byte of address is A8-A15. Since VGARC has 4K dual port RAM, addresses A3-A0, A15-A8 are mapped to 4K dual port RAM. For CB030, the addresses need to be A11-A0. This can be done with jumpers that replace the connections to A15-A12 with A7-A4. However, the resulting addresses are scrambled such that the most significant nibble is A3-A0, middle significant nibble is A7-A4, and least significant nibble is A11-A8. This scrambled addresses can be straighten out by unscramble the address assignment of the 2nd port. It is a brain twister but I was able to demonstrate that on a modified VGARC by cut/jumper the addresses and recompile CPLD with new address assignments.
CB030 has a 40-pin RC2014-like expansion slot. It is not RC2014 compatible, but more like RC6502 bus. The main difference is Z80's /RD is replaced with 68030's /DTACK0 and Z80's /WR is replaced with 68030's R/W. Z80's /MREQ and /IORQ are mapped to 68030's I/O space at 0xFFFFD000-0xFFFFDFFF for /MREQ and 0xFFFFC000-0xFFFFCFFF for /IORQ. The I/O device must provide data acknowledge when accessing 0xFFFFD000-0xFFFFDFFF, but no data acknowledge is needed for accessing 0xFFFFC000-0xFFFFCFFF. So VGARC's PS2keyboard data and status are mapped to CB030 0xFFFFC0F4 and 0xFFFFC0F5, whereas VGARC's dual port RAM is mapped to CB030's 0xFFFFD000-0xFFFFDFFF. More modifications to CPLD where existing /RD line is redefined to drive 68030's DTACK0 and RWB is inverted to drive dual port's /OE.
These are significant modifications but can be done with 5 jumpers and a different CPLD equation in production hardware.
Next post I'll show a CB030 driving the modified VGARC and the potential for a standalone 68030 computer.
Bill