Z80 Clock vs Peripherals

[Alex French]

I'd like to build a system using a 20MHz Z80 at full speed that includes PIO, CTC, and DMA peripherals, but unfortunately the fastest peripherals top out at 10MHz. Are there good ways of dealing with this? I can add wait states for IO requests, CTC and DMA can use a halved clock, and SIO will get its clock from the CTC, so I think that's ok? The interrupt chain on the other hand is going to be quite slow in comparison to the CPU, and I can't insert wait states there, but I think it might be possible to work around its latency using the lookahead scheme described on pages 199 & 200 of the peripheral manual (UM0081).

I'll do some more research and calculation on this, but I was wondering if any of you more experienced folks might have some insight.

[Sergey Kiselev]

I've used 20 MHz CPU and 10 MHz CTC in Zeta SBC v2 without any issues.

[Alan Cox]

Another option except for the DMA is just to use non Zilog parts, they
were OK but even in their heyday often not the best choice. So you can
for example often swap the PIO, CTC and SIO for a single 26C92 derived
chip (which is one reason so many S100 boards used those not the Zilog
parts).

Sergey - do you know if 74LS/ALS is needed to make the Zeta v2 do
20MHz ? Just wondering if that's worth trying with the RC2014 version
of the ZetaV2 memory to crank up the speed of the 65C02/65C816 boards.

Alan

[Karl Albert Brokstad]

The easy solution is z80 at 20mhz with z80 kio. 

[Mark T]

Maybe just try the 10mHz peripherals and see how high you can go with clock speed before they stop working.

The Z80 peripherals also decode the z80 instructions during M1 fetch, to watch for RETI, so I think they need to be able to run at the same clock speed as the z80.

Mark

[Alex French]

On Wednesday, March 25, 2020 at 6:32:22 PM UTC-4, Alan Cox wrote:

Another option except for the DMA is just to use non Zilog parts, they
were OK but even in their heyday often not the best choice. So you can
for example often swap the PIO, CTC and SIO for a single 26C92 derived
chip (which is one reason so many S100 boards used those not the Zilog
parts).

 Hmm! That looks like a pretty awesome part. I'll consider switching to that.

However, I also want to use the DMA and CTC for my video circuit. I'm planning on using a monochrome STN panel without a controller, so I need to feed it screens of 4 bit wide data a line at a time. It's not terribly complicated to drive, and I figured that might be a good way to do it without involving the CPU, but I haven't really worked it out yet. Of course, if that's all I need the DMA and CTC for, then I don't have to worry about the interrupt chain, and it might all work fine with the 20MHz CPU.

[Alex French]

On Wednesday, March 25, 2020 at 6:41:26 PM UTC-4, Karl Albert Brokstad wrote:

The easy solution is z80 at 20mhz with z80 kio.

Is the KIO a good part? It seems complicated and I was worried it might have odd incompatibilities between versions, like the Z180. Maybe it's worth a closer look.

[Greg Holdren]

For what it is worth I'm running a 6 MHz Z80, CMOS, version at 22 MHz. Works fine at 5V and at room temp. So Id say just try it and go from there.

Greg

On Wednesday, March 25, 2020 at 3:08:42 PM UTC-7, Alex French wrote:

[Bill Shen]

Assuming memories and peripherals can keep up, 20MHz CMOS Z80 can reliably operate to 24MHz, some of them up to 30MHz.  KIO is rated at 12.5MHz, but it can be overclocked recklessly to 24MHz, even 30MHz.  The first picture of this link shows a Z80 with KIO running at 29.5MHz.  https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:k80

VGA frequency is 25.175MHz, so it would be nice to run Z80+peripherals at that frequency.

I have a number of UG32F01 LCD panels (monochrome 5.2" 320x240) which has no controller.  I'm interested in driving it with Z80 as well.  I haven't figure out how to interface to it.  Love to hear more about your plan of driving LCD panel directly.
  Bill

[Alex French]

On Wednesday, March 25, 2020 at 8:57:48 PM UTC-4, Bill Shen wrote:

Assuming memories and peripherals can keep up, 20MHz CMOS Z80 can reliably operate to 24MHz, some of them up to 30MHz.  KIO is rated at 12.5MHz, but it can be overclocked recklessly to 24MHz, even 30MHz.  The first picture of this link shows a Z80 with KIO running at 29.5MHz.  https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:k80

VGA frequency is 25.175MHz, so it would be nice to run Z80+peripherals at that frequency.

I have a number of UG32F01 LCD panels (monochrome 5.2" 320x240) which has no controller.  I'm interested in driving it with Z80 as well.  I haven't figure out how to interface to it.  Love to hear more about your plan of driving LCD panel directly.
  Bill

Wow, that's encouraging. I've heard all about people overclocking these devices, but I didn't realize it could be taken so far. I wonder if that's a result of newer processes used to make the recent chips?

I haven't figured out how to drive the LCD yet, but it seems plausible. The part I'm planning on using is the Newhaven Displays NHD-320240WG-ATMI-TZ#. It's 320x240 STN blue and uses NT7086 drivers, which are pretty forgiving devices. Basically you drive a 4 bit wide shift register and two clocks, one you pulse on every line and the other is used to shift data in. Max clock rate is 8MHz, which is within the realm of Z80 devices, and you can go much slower. Timing isn't really critical so long as you don't go too fast. There's a special "M" signal that's used to AC bias the display to prevent it from eating itself, but on this panel it's generated internally so you don't have to worry about it. I figure I can use the CTC to generate the timing pulses, and the DMA can transfer the data. Maybe a couple extra 74 buffers to swap between upper and lower nibbles.

VGA would be nicer. Ideally I'd get a 480xN display like in some of the early battery operated machines so I could do 80 columns with 6x8 characters, but nobody makes wiiiide STN displays anymore, and all the bigger displays are TFT with high resolutions that would require an FPGA. I'm not a fan of FPGAs in a retrocomputing project.

[Bill Shen]

The Z80 spec is very conservative which is a problem when trying to overclock the device.  If you go by the datasheet, 25MHz Z80 requires memories with negative access time!  Yet, I know for fact that Z80 with 55nS RAM can run to 30MHz.  So I just throw away the data sheet (my mentor is spinning in his grave right now!).

The Newhaven Display seems similar to UG32F01, which is still available on eBay such as this:  https://www.ebay.com/itm/Samsung-UG-32F01-LCD-Display-5-2-320x240-Dots/251013308889   I dug out work I did a few years back.  The pin assignments are:

1. Scanstart, FLM
2. DF, (M)
3. CP1 (line latch)
4. CP2 (data clock),
5. DispOff,
6. D0,
7. D1,
8. D2,
9. D3,
10. VDD (+5V)
11. VSS
12. VEE
13. VO
14. GROUND

It is also 4-bit data with line clock and data clock, but it does have M signal.

Ha, this is great!  I think I'll revisit LCD interfacing again...
  Bill

[Phillip Stevens]

Bill Shen wrote:

If you go by the datasheet, 25MHz Z80 requires memories with negative access time!

Yet, I know for fact that Z80 with 55nS RAM can run to 30MHz.

So I just throw away the data sheet (my mentor is spinning in his grave right now!).

Bill, that's an interesting point.

I'm running Z180 devices at 36.864MHz using 45ns RAM and 55ns Flash, using 1 memory wait state.

I started using 1 wait state at this frequency because my YAZ180 wouldn't run with 0 wait state.

Perhaps that was actually caused because the address and data buffers (using ABT logic) or GAL (15ns) chip select logic causes too much fixed delay?

I should try to see if the SC130 and SC131 devices work with 0 memory wait states at 36.864MHz. They are much simpler with the chip select using AHCT logic, and no buffer delay.

Putting that on tonight's test list...

P.

[Bill Shen]

Inserting a wait state to Z80 is actually pretty tricky above 20MHz, so I run everything with 0 wait state.  For memory access, chip select to data valid is the long path, so I enable chip select as early as possible (using MREQ only) and decode the output enable & write enable with additional logic.  The CPLD I use is either 15nS or 10nS part.
  Bill

[Phillip Stevens]

Bill Shen wrote:

Inserting a wait state to Z80 is actually pretty tricky above 20MHz, so I run everything with 0 wait state.

My comment, a little off OP topic, was regarding Z180 wait states, so that is actually easy to add.

 

For memory access, chip select to data valid is the long path, so I enable chip select as early as possible (using MREQ only) and decode the output enable & write enable with additional logic.  The CPLD I use is either 15nS or 10nS part.

I've just reminded myself of the timing flow for YAZ180, and the chip select is determined from unbuffered upper address lines, through a GAL only. From my picture, I'm reminded I'm using 7 ns GAL16V8D parts.

But unfortunately I put the /MREQ through an ABT logic buffer which costs 3 ns more propagation delay before it goes into the GAL. But still, that should still pretty fast, with 10 ns total delay.

The SC130 and SC131 don't use any buffering, and use a 74AHCT139 (using /MREQ and A19 with 4.5ns propagation delay) to generate the chip select.

So they should have the chip select available about 5 ns earlier, which may be enough to avoid using a memory wait state.

Experimentation will see. ;-)

P.

[Phillip Stevens]

Phillip Stevens wrote:

The SC130 and SC131 don't use any buffering, and use a 74AHCT139 (using /MREQ and A19 with 4.5ns propagation delay) to generate the chip select.

So they should have the chip select available about 5 ns earlier, which may be enough to avoid using a memory wait state.

Experimentation will see. ;-)

:-( doesn't work... back to the proven working 2,1,0 configuration for SC130 and SC131...

CPUOSC       .SET 18432000  ; CPU OSC FREQ IN MHZ
;
Z180_CLKDIV  .SET 2         ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 1         ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT  .SET 0         ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)

Pity, would have been nice.

P.

[Bill Shen]

The AS6C4008 RAM needs 1 wait state at 18.4MHz?  That doesn't sound right.  I thought Z180 has similar bus timing as Z80.  Or maybe you are running at 36.8MHz and needed 1 wait state?
  Bill

[Bill Shen]

Oh, never mind. You already have said a couple posts back that you were running at 36.8mhz with 1 wait state.
Bill