RomWBW architecture, Z180 CSIO drivers, I2C/SPI

[7alken]

hi all, I was for a while seeking for some way to support both I2C/SPI simple way with Z180, as I am trying to make on breadboard now somethin like Bill's RIZ180 (3V3). Initially I thought that I am fine with CF-card, but, on breadboard, I have almost no way to connect it (ya, maybe wires inserted into cfcard directly but dont want this way). So, I can tend also to the SC131 approach, where SD is supported by RomWBW directly, there is raw connection to the 5V module, okay; BUT, I also think advance about how my system will look post-breadboard once I will go to Kicad and was trying to find something for I2C/SPI (generic) over CSIO, so this will need probably something in drivers/init in RomWBW probably, in case somebody wants to try what I found - I am not "pure retro guy" probably, thinking about fusion of old tech with new, and actually, as I read RomWBW architecture, this is in fact "quite super modern" approach with drivers and autodetection, so it is not pure retro at all too ))) ... ya, I like the new SW on retro HW to puch the limits, but allow also easily solderable DIP modules with SMD, in case there is not alternative. And there isnt in much cases, and also todays world is maxed at 3V3 often ... ufff

So, I found these NXP chips combo - SPI-I2C and I2C-SPI bridges

this thing looks like "designed for CSIO" as it has only Mode3 and single config command to REVERSE bit order ... quite cool
https://www.nxp.com/products/peripherals-and-logic/signal-chain/bridges/spi-to-ic-bus-bridge:SC18IS604

and this thing is unobvious I2C-SPI bridge (sure, there is 400kbps limit, but I think about sensors here mostly) with 3 CS per chip (can imagine 2 on DIP module together with 1 SPI-I2C connected to Z180 CSIO ... with some supported sharing with CSIO native SDCARDs to not be limited by 400k bottleneck of bridges.

https://www.nxp.com/products/peripherals-and-logic/signal-chain/bridges/ic-bus-to-spi-bridge:SC18IS606

Sure, as Bill and Alan noted I2C is okay by bit-banging, even SPI maybe, but these bridges while need 3V3 Vcc have 5V tolerant buses and alow even sensors BELOW 3V3 ...

And they have buffers and INT ... cant imagine how better can be support of I2C/SPI over these bridges supported by interrupts - never wrote anything for this before; for me its new all, never had motivation to play with sensors and devices only because its fashion;

As I read about current RomWBW, it supports on CSIO the SRcard and also WizNet 5500 chips till now, mostly ... isn't something as generic SPI/I2C layer in consideration too?

I WILL probably definitelly use these in my new system as I also want to put here another modern OS in fact, portable to other chips out of 8080/Z80, if everything will go well ))

But dont want to hide only to myself what I found, so what you guys think on these bridges? My system will probably have dedicated bus for 3V3 on parallel IO side, but this is something like "serial-bus" side of things .... Something possible? Can fit in HBIOS? Never peeked into source yet...

Petr

[7alken]

Hi Wayne, when I was searching for something about supported MMUs, I read current RomWBW docs, but there was almost nothing mentioned, for sure not term "MMU" (at least once some note good to have, as reference to the "architecture" document - which in fact ALSO isn't in your current docs, but this document is interesting and probably helps to answer many questions here - no term MMU also, but lots of "BANK" references, so that mandatory RomWBW 32/32 is here even with picture and whole document V3.0 is very nice - I was trying to search "romwbw architecture" here in retro-comp no and found also this my old post from Oct 2023... so, here are links to the "architecture" documents I found for V3.0 and V2.5 + also interesting list of releases up to V2.7 - where I don't understand fully the issue with "N8VEM", if its expected to vanish, be replaced by "retrobrew" ??) ...

you know, you don't have at least that nice V3.0 doc in github doc folder, so its mistake?
https://github.com/wwarthen/RomWBW/tree/master/Doc

V3.0
https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=software:firmwareos:romwbw:romwbw_architecture.pdf

V2.5
https://www.retrobrewcomputers.org/n8vem-pbwiki-archive/0/46653651/49169434/RomWBW%20Architecture.pdf

and the list of releases up to V2.7 - also interesting history ...
https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:romwbw:announcements

Petr

[7alken]

ahhh, I see, it's now "RomWBW System Guide PDF (V3.6), excuse me for another noise ...

On Saturday, October 7, 2023 at 4:26:31 AM UTC+2 7alken wrote:

[Wayne Warthen]

On Tuesday, May 27, 2025 at 5:58:02 PM UTC-7 antos...@gmail.com wrote:

ahhh, I see, it's now "RomWBW System Guide PDF (V3.6), excuse me for another noise ...

No problem.  Glad you found it.

-Wayne 

[7alken]

Hi Wayne, thanks for kind words, I yesterday read entire new SG and HW docs and here are my notes from it, if its not somehow disturbing also ))
As "Memory Manager" is abbreviated often also here as MMU, would be possible to note this in docs somehow and in WomWBW init info??
I then succeeded with searching for "BANK", obviously ))

my cheeky notes:

RomWBW - Wayne Warthen
=========================

System Guide (ex Architecture)
 - 4.1 add note to MMU (= memory management unit) and reference it in text with MMU abbrev ??
 - provide list of implemented MMUs (created from Hardware system list??)

 
Hardware
 - 1.2 add note to MMU (= memory management unit) and reference it in text with MMU abbrev ??
 - 1.2 provide list of implemented MMUs - this seems to be as one of most crucial parameters, apart from CPU type ??
 - replace text "Memory Manager" by MMU in systems descriptions ??
 - !!!??? list in RomWBW info also MMU? as "MMU: Z2" for example? - this can be fixed string by specific ROM build probably ??


???
Would be hard to rewrite RomWBW services to plain 8080 to support also 80C85 ?? :-)
 - umm, I will peek into source how big it all is ...


MMUs: (from Hardware pdf)
============================
Z2     15x
Z180   13x
Z280    4x
ZRC     3x
SBC     3x
MBC     1x
N8      1x
EZ512   1x
RPH     1x

[Wayne Warthen]

Those are good suggestions for the documentation.  I will implement them soon.

Converting RomWBW for 8080 would be a very large effort.  It could be done, but there are significant dependencies on the index registers of the Z80 (IX/IY).

Thanks, Wayne

[Alan Cox]

On Wed, 28 May 2025 at 19:38, Wayne Warthen <wwar...@gmail.com> wrote:

Those are good suggestions for the documentation.  I will implement them soon.

Converting RomWBW for 8080 would be a very large effort.  It could be done, but there are significant dependencies on the index registers of the Z80 (IX/IY).

I did look at it for the 8085 CPU card but it's a huge undertaking and it's not clear how you'd ever keep it in sync with the Z80 version. ROMWBW also bundled a lot of stuff that isn't 8080 clean so there would be a lot of the things ROMWBW has that you couldn't use anyway.

In the end I just did a simple CP/M 3 port for it.

[Wayne Warthen]

I think I have addressed most of this in the documentation.  The only thing I didn't do was change the instances of Memory Manager to MMU.

Thanks, Wayne

[7alken]

umm, this MMU abbrev was never used in your docs till now, so I dont want to push something, but would be nice to have MMU: xx listen in HBIOS info;

it quite identifies style of solution together with cpu; that was in my mind while reading and searching for this crucial info; but its only minor thing;

Petr

[7alken]

Hello Wayne, I today had chance to peek into RomWBW source, got zip from github (I am not ready  to do some big refactoring over pull requests, so this is only MY OWN preview, where I analyzed how and where its done, and modified it here only for myself) ... you probably already started some MMU abbrev introduction into docs, ya? I wanted to try to refactor even the source to be able easily to find where MMU is handled; I see you have MEMMGR variable and MM_* constants, but by searching in source, even inside HBIOS, it finds also some occurrences related to FDC main menu?? and IMM Iomega driver ...

So I used vscode "replace in files" (vscode is GREAT(!!) at auto-refactoring inside C code, but this Z80 asm I am not sure, I dont know, so went manual way, it shows nice preview of finds, its also okay)
MEMMGR to MMU

MM_* to MMU_*
 
Its only my try here to use this for my searching ... first peek into RomWBW source, its nice :-)
so this is only proposal, but for you is known your approach, sure ... but searching for case-sensitive MMU then is quite precise,
including that already used Z180 Z280 occurrences (+ sd.asm note for Z80Retro!)

this was my local goal here, to be able to find *everything* which relates to MMUs ...

(I tried to attach ZIP of HBIOS with mods (and original state before changes), and screenshots from vscode and tc-search + notes

but gg is not allowing me to attach this, even with scripts deleted - I am probably too afraid to present this as PR, the right way,
if you are interested, I can send it over gdrive or by mail .... or to that PR - but I am not building it here to test correctness, yet ... )

Petr

[7alken]

at least that screenshots zipped??

[Wayne Warthen]

Hi Petr,

I agree that MMU and MMU_xxx would be more consistent than the current MEMMGR and MM_xxx.  However, these values are used pervasively throughout configuration files.  I am reluctant to change this naming -- it would likely cause grief for a lot of people that have customized their configurations.

Thanks, Wayne

[7alken]

ya, truth.... understood;
Petr

[Wayne Warthen]

Based on some feedback from Harry Speer, I have added some text to the "Memory Managers" section of the RomWBW System Guide.  I know this not what you were hoping for, but perhaps helpful for others in the future.

Thanks, Wayne

[7alken]

thanks for reply Wayne, I abused it here locally to understand slightly more about RomWBW internals and MMUs, I hope
Petr