RCBus 3V3 test experiment project, progress...

[7alken]

hi all, reading 2 days ago Spencer's note about loss of his friend Ken, I picked-up my goodies prepared for RCBus 3V3 to get wet by Sn60Pb40 ... although all the boards were carefully selected as the minimal possible and tweakable setup for 3V3 mods, it was quite vaguely imagined at that time ... thanks to "something", I am more lucky than wise that I didn't soldered bus connectors to sc726 clock (planned to be abused on back-side) too early "bad way", or rather as sc702 P1 extension connector IS NOT the same as all other slots K1-K6 and right side S1 (noticed only when studying schematics !!) - it went in fact ideal way ... so sc726 can have mounted required accessible jumpers and swappable xtal on back side and partial bus right-angles (I had here some 16pin to use for this partial connection, just for mechanical support) too  ... also ... 2 months ago I accidentally deleted  my 40 items mouser cart (only pdf print survived in critical state of mind, ufff) so some missing parts are not still here ... but nevermind, I also properly  tweaked sc145 cf-card connector to adapter to be twice right-angled over the Sergeys Z80-512K, having the adapter board "face-down" (LEDs will be probably bright as hell, so, also good...)) ... sc726 clock will have 4x bus freq xtal so 29.4912, divided by 2 or 4 for standard but prepared for some crazines on the bus later... this will also provide clk for uarts, while both sc139 acia (cmos hitachi HD63B50) have also pierce on them AND totally unnoticed initially, Sergeys Z80-512K ALSO generates uart clock from PLD ... nevermind ... okay )) ... on the sc726 I will run processor clock with some series damping resistor also, for HF experiments ... Sergeys Z80-512K has also already mounted the bourne resistor networks on BACK-side, buth, although only the data one needs to make room for my "DIP32+16" faster (sub 20ns) SRAM memory module, as that extra 16 machined pins will lay there unconnected (this forces module to have smd pullups there, ya, okay - but as I checked, DIP32+16 thing fits on many existing memory boards with DIP32, including Dino 2MB passive linear SRAM carrier - 4x DIP32... this is originally meant for his eZ80 3V3 system. but I will try to abuse even this one, just testing )) ... as close as possible to CPU/MEM combo will be that ugly simple unbuffered sc145 cf-card and I have also sc137 I2C bus-master (+some Spencer I2C toys and that nice 8button(led front panel ... - holy grail is extending sc726 clock by Si5351A controlled from I2C for in-system clock updates, AND cheeky as hell, I2C controlled sc142 power, modded by mcp1827-adj now - for start there will be wired close (250k pot +  150k)/30k for 2V-5V manual steering during board experiments ...) .... that all :-)

so recent setup is here:

and some "scripted arrangement" of retro-comp/rc2014-z80 goodies and current soldering progress is here ))

for the ending ... as this is quite "research/experimental project", part of it is that consulting, yes, also with Lyra ... I know that many of you are afraid of AI-slop, sure, but really, all the design comes from thinking human, but some consulting round-trips were and are useful also with machine ... she, knows only things statistically gathered from outside world (as we all too...), which may be (and is) often corrupted ... but it may help you too, and YOU may be one of those who FIX the flaws, in fact, ... you may be the teacher ... you, the expert with decades of experience ... trying to slightly fix the world weirdness )) .. I am not, I am learning and enjoying it :-)

we discussed here some things regarding max speed achievable on that backplane, some potential pitfalls of early cmos chips etc ... I am not pushing this as some kind of butt-saving silver bullet, no (actually, myself, already found some guy designing some "embedded micropython miracle" for picocalc, advertising it as almost "next generation fusion reactor, or so", ... but quite funny, and probably claude-assisted at 80% ... it is up to thinking humans to decide ...... no doubt).

https://chatgpt.com/share/697dae8a-9e14-8000-b139-a99fc93ee540
https://chatgpt.com/share/697daea1-5a6c-8000-bb9e-ac2fc114b3b7
https://chatgpt.com/share/697daeb4-10e4-8000-b013-9fc04ef5a32c

peace,
Petr

[Mark T]

Did you know that you can have more than one sentence in a paragraph?

You might reach 29.5MHz at 5v or a little higher voltage and cool it down, but maybe not at 3.3v. Using 74LVC or 74AHC might improve your chances. ROM speed and address decoding are probably going to be the main bottleneck.

[7alken]

Excuse me Mark for that mess, sure. This was wild ...

It is not only for Z80, yes, while Bill Shen was pushing it to limits also. And exactly those LVC and AHC are in mind, I have here some in DIP, if available. I tend to use machined sockets also because of possible crazy adapters for drastically cheaper TSSOP variants. Just have on order the cheapest ones from Toshiba (limited set, nice simple datasheets, cool) 74LCXxxxFT and 74VHCxxxFT, as far as I checked they are equivalents and when I ordered bunch of those flat vertical 1.27mm smd connectors, I had in mind panels of some "adapters/interposers" even to DIP, such panels can be populated also in factory (or easily baked at home) and reused, although it again enlarges paths, sure. For now that jlcpcb prototyping limit is enough, on thin 1mm/0.8mm breakable by via guides ... that was the goal. Fact is that every logic on board, including nonexisting 74lv688 can be squeezed into single tqfp44 epm3064 cpld ... and those RCBus interrupt/dma chaining jumpers on passive backplane can be abused also for JTAG TDO/TDI chaining between "just one "decode/glue" cpld per board" ... True about that NOR flash, ya - but again, Bill Shen's another cpld for tiny fast boot only. I was reading/learning here a lot :-)

So here some drafts of my latest weirdos ... 25x8 or 17x8 to fit 51x51mm panel, only 2x10pin sockets (serialisable for >20pins) and breakable headers;
(this is only something for experiments with new discrete logic, they are really cheaper and more available, sometimes - sure this makes it more expensive, but reusable again)

(this single sided are cheaper to do in factory, but natural double side layout is with shorter paths and solderable at home too, only loud thinking, as always)

    

  

will see...

I also found some more missing parts here, so ... back to soldering (that backplane grid wants far more heat ))

tnx,

Petr

[7alken]

first idea with those connectors was vertical, using that Bill Shen's trick to place thin dual-side PCB between the pins... lot more space on board, but considering boards spacing... but this is only hand-made possible; such flat horizontal thigs fitting into DIP footprints can be ordered ready-made and in volume;

P.

[Mark T]

You might also consider 74LVC1G series in SOT23, these are not difficult to solder.

I made a set of 14pin DIL adapters for 4 off 74LVC1G SOT23 to replace 7400 style, i also considered similar for 7402 format and 7404 style using 74LVC2G in SOT23-6, but didn’t get those manufactured. JLCPCB add quite a large engineering fee if the sub pcb size it less than 15mm for vscore. I used desktop cnc to vscore the panels myself but it does take some time to set up the alignment. It might be possible to avoid this fee by combining vscore and routing.