Z80-based LCD controller for a 320x240 LCD panel

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Bill Shen

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May 9, 2020, 9:35:56 AM5/9/20
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Here is another design out at JLCPCB.  In a moment of madness many years ago, I purchased a box of UG32F01 320x240 LCD panels.  It has no controller so is not usable, but hey, they were cheap so I did saved bunch of money buying these useless junks.  :) 

Ever so slowly it dawns on me that a Z80 can serve as a controller with help of CPLD, so this Z80 SBC is dedicated as the LCD controller.  The edge connector at the bottom plugs into the corresponding 14-pin connector on the LCD panel.

I'm just designing the board, I'll make up the CPLD equations and Z80 software as I go along.  Making up stuffs as I go along, such is the joy of retirement!

  Bill


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z80lcd_annotated.jpg

Richard Lewis

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May 9, 2020, 5:44:08 PM5/9/20
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Hi Bill,

Do you have the schematic available? I'm having difficulties in-circuit programming a 7000S CPLD. It doesn't show up at all in the JTAG chain. Do you see anything wrong with this circuit? I bought 20 EPM7032STC44 and I've only been successful in getting one of them to show up in the JTAG chain ( only intermittently)  and that was on a breadboard. Either they are all locked (i.e. the JTAG pins have been reconfigured as I/O pins), they are counterfeit, or my circuit is wrong.  



MAX7000S.jpg



Richard

Bill Shen

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May 9, 2020, 7:43:02 PM5/9/20
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Richard,
That looks about right.  Here is a schematic of my CPLD JTAG hookup
https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=builderpages:plasmo:protorc3:protorc3_scm.pdf

I pretty much use the same circuit for all my CPLD designs.  I don't bother with TDI/O pull up.  I use 4.7K for TCK pull down, but I think the current spec uses 1K as you did.  The grounds on JTAG header should be pin 2 and pin 10.  I see pin 10 to ground on your circuit, what's pin 2 hooked up to?
  Bill

Richard Lewis

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May 9, 2020, 8:27:06 PM5/9/20
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Pin 2 is also hooked up to GND. For some reason, the JTAG symbol that comes with KiCAD has pin 2 defined as ground but hidden on the schematic. 

JTAG.jpg

Bill Shen

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May 16, 2020, 8:39:21 AM5/16/20
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Able to boot and run Z80-based LCD controller by itself.  I'm working up enough nerve to boot the whole thing up...
  Bill
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Colin MacArthur

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May 17, 2020, 4:40:34 PM5/17/20
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Looks like you have built ANOTHER GREAT board...

THX
CM

Interocitor Steve

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May 18, 2020, 3:51:23 PM5/18/20
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Look nice, Bill.  Can't wait to see it in action !

Bill Shen

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May 18, 2020, 4:13:04 PM5/18/20
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Still hasn't power it up, yet. I have a backlog of ZRCC orders that I'm trying to clear. Never was interested in selling, that confirmed it.
Bill

Interocitor Steve

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May 20, 2020, 11:58:09 AM5/20/20
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I have a design for a WS2812B pulse generator.  It uses a ring shift register and some NOR gates. 
The circuit changes a color info bit stream into PWM pulses at the Baud rate.
A 3 X Baud clock is used.
=Steve.

Mark T

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May 20, 2020, 1:38:19 PM5/20/20
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Hi Steve,

As you have a common clock to the flip flops, you might be able to use a single ‘175 instead of two ‘74s. The ‘175 has a common reset, but no preset, but you can make up for this by using the inverted output of the first stage and take it’s input from the inverted output of the final stage.

Mark

Bill Shen

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Sep 26, 2023, 10:27:36 PM9/26/23
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ROMWBW is like the BORG - resistance is futile - happily expanding to run on so many platforms.

--Richard Dean, Retro-comp Google forum, Sept 23, 2023


I was chewing the fat with a forum member about CPLD, Simple80, and RomWBW, and it dawned on me that an inexpensive, hobbyist-friendly (i.e., through-hole technology), RomWBW capable, fast (22MHz) Z80 SBC that requires no expensive flash programmer is desirable, AND I may have one already if I just make a few modifications to Z80LCD and replace the SMT CPLD with PLCC84.

So I'm reviving this old topic to explore the RomWBW capability for Z80LCD (another word, Z80LCD just got BORG-ed).  If that's successful, it will lead to a new SBC design using PLCC84 EPM7128S.  Pictures show the Z80LCD mods for RomWBW:
* replace 128K RAM with 512K RAM
* add two bank lines so it will have 16 banks of 32K RAM.
* add RTS handshake for serial port that emulate 6850 ACIA.
* software-wise, it will boot from CF disk into RomWBW.

to be continued...
  Bill
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Bill Shen

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Sep 28, 2023, 5:02:56 PM9/28/23
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CPLD modifications of Z80LCD for 512K RAM and the corresponding software for RomWBW function are greatly simplified by an existing similar design, ZRC.  The design is simpler than ZRC because ZRC uses 2meg DRAM that needs a DRAM controller and more bank registers to control the larger memory.  By trimming away the DRAM controller and scaling down the bank registers, I now have a working RomWBW-capable Z80LCD.  I'm using a configuration of RomWBW that splitted 512K RAM into 256K ROM and  256K RAM.  It works, as shown below.  However, it also got Wayne Warthen's interest to develop a more suitable RomWBW for RAM-only Z80 computers.   

The CPLD is only 80% utilized and have lots of spare pins so while waiting for a more suitable RomWBW, I will add LED, RTC, and I2C functions using prototype board.
  Bill

z80lcd_512K_boot_RomWBW.jpg

Bill Shen

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Sep 30, 2023, 8:09:32 PM9/30/23
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Built up a prototype board for RTC, I2C, and 5 WS2812 LED.  Third photo shows how it looks plugged into the Z80LCD board.  The RTC is based on DS1302 located at I/O address 0xC0, mainly because it is supported by RomWBW.  I2C is the 4-pin header at the top right of the proto board.  The 5 WS2812 are chained together from left to right with a 3-pin expansion header for more WS2812.

I can set DS1302 with RTC.COM in RomWBW.  RomWBW also detects RTC at start up, so I'm pretty confident the RTC circuit is working.  

I need to dig up old software that drove the WS2812 as well as software for I2C OLED display.
  Bill
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Z80LCD_RTC_detected.jpg
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Bill Shen

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Nov 6, 2023, 11:00:35 PM11/6/23
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This is PCB version of ZRC512.  It is 2"x4" pc board with classic RC2014 bus; all through-hole technology.  Z80 is running at 22MHz.  For additional peripherals it has RTC, I2C and WS2812D-F5 (NeoPixel LED) and a dozen spare CPLD I/O.  It is designed to run the ROM-less RomWBW.  Below is the screen capture of ROM-less RomWBW booting up.  RTC is detected and CPU clock is calculated as 21.996MHz, good.  I was worry about RTC not been accurate.
  Bill
**************************************************************
>boot CP/M
4--ROMWBW: 4 press Return to execute command
S

RomWBW HBIOS v3.4.0-dev.9, 2023-10-14

ZRC [RCZ80_zrc512] Z80 @ 21.996MHz
0 MEM W/S, 1 I/O W/S, INT MODE 1, ZRC MMU
0KB ROM, 512KB RAM

CTC: IO=0x88 NOT PRESENT
ACIA0: IO=0x80 ACIA MODE=115200,8,N,1
DSRTC: MODE=STD IO=0xC0 Sat 2000-01-01 00:00:12 CHARGE=OFF
VRC: IO=0x00 NOT PRESENT
MD: UNITS=1 RAMDISK=256KB
FD: MODE=RCWDC IO=0x50 NOT PRESENT
IDE: IO=0x10 MODE=RC
IDE0: ATA 8-BIT LBA BLOCKS=0x0001E900 SIZE=61MB
IDE1: NO MEDIA
PPIDE: IO=0x20 PPI NOT PRESENT
FP: IO=0x00 NOT PRESENT

Unit        Device      Type              Capacity/Mode
----------  ----------  ----------------  --------------------
Char 0      ACIA0:      RS-232            115200,8,N,1
Disk 0      MD0:        RAM Disk          256KB,LBA
Disk 1      IDE0:       Hard Disk         61MB,LBA
Disk 2      IDE1:       Hard Disk         --


ZRC [RCZ80_zrc512] Boot Loader

Boot [H=Help]: c

Loading CP/M 2.2...

CBIOS v3.4.0-dev.9 [WBW]

Configuring Drives...

        A:=MD0:0
        B:=IDE0:0
        C:=IDE0:1
        D:=IDE0:2
        E:=IDE0:3
        F:=IDE0:4
        G:=IDE0:5
        H:=IDE0:6
        I:=IDE0:7

        1509 Disk Buffer Bytes Free

CP/M-80 v2.2, 54.0K TPA

A>dir
A: ASM      COM : CLRDIR   COM : COMPARE  COM : COPY     COM
A: DDT      COM : DDTZ     COM : DUMP     COM : ED       COM
A: FDISK80  COM : FILEATTR COM : FILEDATE COM : FLASH    COM
A: INITDIR  COM : LDDS     COM : LDP2D    COM : LINK     COM
A: LOAD     COM : MBASIC   COM : NULU     COM : PIP      COM
A: PUTDS    COM : RELOG    COM : RMAC     COM : STAT     COM
A: SUBMIT   COM : SUPERSUB COM : TD       COM : UNARC    COM
A: XSUB     COM : ZAP      COM : ZCAL     COM : ZDE      COM
A: ZPATH    COM : ZSCONFIG COM : ZXD      COM : ASSIGN   COM
A: MODE     COM : RTC      COM : SYSCOPY  COM : XM       COM
A: FDU      COM : FORMAT   COM : SURVEY   COM : SYSGEN   COM
A: TALK     COM : TIMER    COM : CPUSPD   COM : CPM      SYS
A: ZSYS     SYS
A>
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Bill Shen

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Nov 7, 2023, 4:55:05 PM11/7/23
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Compact flash and EPM7000 were introduced in mid-1990.  i think monolithic 512K RAM only became available around mid 1990's as well.  So ZRC512 is actually not that "retro".  However, it is simple to build and fairly low cost.

There are no bodge wires so far, but I have not tested the I2C and WS2812 functions.  I have 4 new designs in this batch of boards; I'm doing quick tests of three designs and currently working on the last design.  Afterward I'll circle back to do full test of ZRC512 and release the design files which should be in 2 or 3 days.  Stay tuned.
  Bill
PS, CPLD has 12 spare I/O.  The 2x7 jumper pads at the edge of pc board above CPLD are 12 spare CPLD I/O plus power, ground.  It is certainly enough to drive lots of LED's

On Tuesday, November 7, 2023 at 1:00:47 PM UTC-7 Paul dB wrote:
Nice job of getting it all onboard, Bill :)

This must be about the most *retro* (except for the NeoPixel of course ;)), through-hole (and fast) Z80 SBC, with 512K RAM and running RomWBW, on an RCBus module, including an RTC, reprogrammable glue logic, extra I/O and an easily replaceable 'ROM' (the CF card!).

Just wondering: Did the PCB work first time or did you make any changes? How much of the EPM7128S did you have to use?

If no changes need to be made to the PCB, please make the gerbers available (I've got my soldering iron heating up already 8))

Thanks,
Paul

Bill Shen

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Nov 10, 2023, 7:34:14 AM11/10/23
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I've tested I2C and WS2812 interfaces and they are working.  So I'm releasing the design information here:
https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:zrc512:zrc512home

This is the bare minimum infor to get ZRC512 build.  I will add more info in next few days.
  Bill

Paul dB

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Nov 10, 2023, 9:16:07 AM11/10/23
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Hi Bill, thanks for that. 

Paul
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