Pull up and pull down

[Interocitor Steve]

Has anyone run a Z80 with pull up, or pull down on the addr and data pins?

Ditto for the input control pins?

Thanks,

=Steve.

[Alan Cox]

On Thu, 8 Jun 2023 at 06:50, Interocitor Steve <ZO...@gladucalled.com> wrote:
>
> Has anyone run a Z80 with pull up, or pull down on the addr and data pins?
> Ditto for the input control pins?

Yes - in fact it's the normal configuration as it is required if you
are using a DMA controller or other bus master because the lines will
float during the transfer of control. The RCbus processor cards and
some retrobrew stuff lack this so you have to retrofit it to the DMA
card or backplane.

ROMWBW does have problems depending which pins you pull which way. I
found this accidentally as one of my TFT adapters pulled only some
lines up and it would hang for ages in the disk probe. If you pull to
FF all should be good though, and Wayne fixed the case I hit in the
dev branch at least.

[Mark T]

Has anyone run a Z80 with pull up, or pull down on the addr and data pins?

Ditto for the input control pins?

The long answer is it depends.

Z80 input control pins, if the Z80 is on a pcb that doesn’t include the circuits driving those control inputs, but you might want to drive them from somewhere else, should be pulled high, probably with 10k resistors. For the cmos Z80 you could go higher, at a slight risk of being triggered by noise, but then if you do start using them with open collector drivers you might need to reduce the value of the pull up resistor to reduce the rise time when deactivated. 4k7 or even 1k might be better on the wait input if timing is tight.

Pull ups on control outputs of the Z80 is important in systems with DMA on the control outputs that the Z80 will tristate during bus request, IORQ, MREQ, RD, WR. Its better if these are located at the inputs on the cards where these signals are used, but this raises a problem on a system that has a variable number of cards as the pull ups add together and increase the load on the Chip driving the signals. Compromise is probably to put them on the DMA module. These pull ups only need to hold the signals high after the Z80 has already driven them high, so they should be ok at 10k.

Pull ups on address and data lines might not be needed. This depends how long the bus request is held active with no other device driving the bus. Capacitance on the bus will hold the last signal level long enough to avoid floating inputs that might cause issues with inputs at invalid levels. Probably still a good idea to use 10k pull ups on the dma card.

Pull ups on the data lines also means if you try and execute an instruction from an address that doesn’t exist you get a RST 38, so you can use this as an error trap.

Pull ups on dip switches for address selection should use 20k for 74ls inputs, maybe 47k for cmos inputs. These don’t need fast rise time and if you use a lower resistor they can add more current drain if all the switches are on, though probably not at big problem in retro systems.

[Interocitor Steve]

Thanks guys. Let me tell you more about my situation.

As you probably know, after a three year hiatus I and working again the Interocitor. The Front Panel takes control of the system using BUSREQ. When I get the BUSACK the bus is up for grabs. In my design, I do not touch any circuits at all except BUSREQ.

I have added numbers so I can track my action items.

(1) Mark T, I am beginning to think that CPU control signals should be held (inactive) except when needed. This might actually be the case in my design, but if it is, it's by happenstance (luck). :::> Check this.

(2) Alan, regarding the address and data lines. On the data bus side, I suspect they can be left open and I will get, as Mark says, the byte FFh. Which is fine. Regarding addresses though, my Font Panel can address only the first 256 bytes, so all addressing is limited to 0000h - 00FFh. And RAM, for me, begins at 0000h. That means the high order address lines must be low. The Front Panel does nothing with A15-A8 which means it will probably not be accessing low memory. I guess this depends on the memory chips involved . :::> The high order bits will need to be kept low. I will look at doing this on one the Interocitor cards.

(3) My question was originally posed because I have latches reading the address bus. So I am examining what happens if an HCT latch has an open input, that is, the latch input is looking at a tri-stated output. Not good, I think. :::> review

(4) It might be simpler from a design perspective up put pull-up /pull-downs on the motherboard. The way I would not have to track wether a signal was tri-state mode. :::> See if anyone has already tried this.

(5) It seems to me that the control inputs MUST be controlled at all times. They continue to function during a BUSACK. I should go through the control signals one at a time. :::> review Zilog spec.

You see things when you leave a project and then come back to it later.

=Steve.

[Mark T]

I think you misread something, you will only get FF on the data bus from areas with no memory mapped if you have pull up resistors.

You mustn’t let the inputs to cmos float, including hct. It might work, but can cause damage to the inputs as both the input transistors will turn on. This also applies to the z80 and most memory and interface ICs.

Your front panel could be arranged to drive the address and databus when busak is granted, so you may not need pullups if that is the case. Example if the panel will always be reading and displaying the content of addressed memory except when you write to memory from the switches.

One possible for the high address byte to be driven by the front panel would be to add a tri-state latch. Then you can clock the low address byte into the high address byte to select any address 0 to FFFF instead of only 0 to FF.