SC126 Single Card Solution for SIO/2 and CTC Like SC125 for ZBUS??

[Jim McGinnis]

I just completed the build of the SC126 and was very impressed with the entire process and documentation. Thanks Steve!

The assembly has the SC126 + RC2014 CF + RC2014 PPIDE + SPI SD Card + RC2014 SC104 SIO/2 attached - all BP slots occupied.

ROMwbw was updated to 2.9.2 pre.25 and configured to support the additional cards (PPIDE, SIO).

The storage devices all work correctly without issues. The SC126 serial ports operate very well.

Changing baud using the Mode command works as expected.

The COM1 port was setup to run KERMIT-80 4.11 and that port is attached to a PI 3B+ running C-Kermit @57600 baud.

The port works well to transfer files in either direction when setting the C-Kermit in SERVER Mode. Very fast and convenient..

The SIO/2 card is recognized but I realized that SIO/2 Port B would require a clock on CLK2 and using the CLK BP signal for Port A will be problematic.

QUESTION:

CLK appears to have the main clock on it at 18.432 MHz.

CLK2 doesn't appear to have any signal present.

Does their exist an SC126 compatible "single card solution" that incorporates the SIO/2 + CTC where two of the CTC channels can drive the SIO/2 A and B port baud rates independent of the CLK back-plane signal?

I think the SC110 is close. But it depends on the CLK signal for the SIO/2 A port.

SC125 for the ZBUS is the desired electrical implementation, but for a different bus.

It would be nice to have a single card solution resident on the SC126 SBC without extending the Back Plane.

Thanks in advance for your valuable time.

Jim

I

[Jim McGinnis]

This forum is really awesome. The folks here are really sharp, creative, and helpful. Thanks...

Here is an image of an SC110 schematic that I marked up for cuts and wires. It is the RC2014 version 1.1 that I am offering as a starting point.

They are simple mods to change the SIO and CTC port addresses and to patch the CT0 output to the SIO/2 port A clocks for read and write. Populate X1.

The real question that I am not qualified to answer is whether the CTC and SIO will work with the SC126 bus timing for reads and writes. Will the chip ratings need to be upgraded to ??? speed?

<<SNIP>>

I

[Bill Shen]

You may want to consider KIO (Z84C90) which is a combination of SIO, CTC, PIO, and more.  The nominal clock of KIO is 12.5MHz, but I found it can be over-clocked easily to 30MHz.  I have a Z80 motherboard design based on KIO and as you can see in the picture, the clock is 29.5MHz.  That's Z80, KIO, RAM, ROM, CF interface all running at 29.5MHz.
https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:k80

  Bill

[Jim McGinnis]

Bill,

Thanks for that suggestion. I have been seeing some activity regarding the KIO (all in one) and am interested in the combo - including the PIO which I have plans for using eventually.

It is above my skill set (experience wise) to do a board that will interface with the SC126. My skills fall on the software side with great "familiarity" in interfacing with the hardware end.

And, of course, I could take this option as a challenge. Particularly with all the great help here.

Thanks Bill. I only need one added serial (not two) for a total of three serial ports so this KIO option may be a player. Particularly with the delays in getting SIO/2 chips right now.

Thanks again,

Jim

[Karl Albert Brokstad]

I have made a KIO module, which should fit the SC12, but it doesnt work :( 

I think I have made an error in the design related to the clock circuit.

anyway

I have tested my serial card with with my Z180 system and it appears to work;

The third serial port at &HF0

Unit        Device      Type              Capacity/Mode

----------  ----------  ----------------  --------------------

Disk 0      MD1:        RAM Disk          384KB,LBA

Disk 1      MD0:        ROM Disk          384KB,LBA

Disk 2      IDE0:       Hard Disk         --

Char 0      ASCI0:      RS-232            38400,8,N,1

Char 1      ASCI1:      RS-232            38400,8,N,1

 

B>survey

                *** System Survey (December 17) ***

Drive A: 24K bytes in 0 files with 360K bytes remaining

Drive B: 380K bytes in 58 files with 4K bytes remaining

Memory map:

0       8       16      24      32      40      48      56      64

|       |       |       |       |       |       |       |       |

 TTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTTCCCBBBBBBB

T=TPA   C=CPM   B=BIOS or unassigned    R=ROM or bad

BIOS at E603    iobyte 94       drive 01        BDOS at D806

65535 Bytes RAM         0 Bytes ROM             55302 Bytes in TPA

0 Bytes Empty           65535 Total Active Bytes

Active I/O ports:

C0 C1 C2 C3 C4 C5 C6 C7 C8 CA CB CC CD CE CF 

D0 D8 DF 

E0 E1 E2 E3 E4 E5 E6 E7 E9 EA EB EC ED EE EF 

F0 F1 F2 F3 F4 F6 F8 F9 FA FF 

43 Ports active

B>

need to make a few changes to ROMWBW to register the port

The only modification I did to the #33f serial module, was to bend out the TX and RX pins (as alternative to cut the traces), running with internal clock at 7.3mhz and 115200 baud.

Karl

Karl

[Karl Albert Brokstad]

I have to correct myself;

putting the serial at &hF0 is not the best posistion, it collide with the Z180 internal regs.

It works at &h80

Karl

[Jim McGinnis]

Karl,

Do you have a link to your #33f card? Your site shows a #33e card.

Thanks for your inputs.

Cheers

Jim

[Karl Albert Brokstad]

33f is just the next revision of 33e

and I have to revise my website

Karl

[Steve Cousins]

Hi Jim

I don't know of a serial card for the RC2014 bus that does exactly what you want. I think you are right that SC110 is the closest. Your mods look good to me.

As to whether a CTC and SIO are compatible with an 18.432MHz Z180 bus, I'm not entirely sure. The Z180 is set up with wait states which should give the CTC and SIO the access time they need but there are concerns about the setup times specified in the CTC and SIO datasheets. As best I can make out the Z180 bus timings violate the setup times specified for the CTC and SIO. However, I suspect in practice this is not a problem. What do others think?

Steve

[Jim McGinnis]

Thanks Steve!

I have also looked at your Z80Bus SC125 schematic and I think I am going to use that design for the CTC out, clocks, Xtal, and feeds to the SIO/2.

I will risk building this modified board and see if it plays with the SC126.

Cheers

Jim

[Steve Cousins]

Hi Jim

You could head over to EasyEDA.com and clone SC110, then modify it to suit your needs. The mods you propose should be manageable and an interesting project even if you've never tried PCB design before.

Steve

[Jim McGinnis]

Steve,

I have taken your advice and am running with it. I have created an EasyEDA account and cloned the SC110 design into a private project.

(They won't let me make it public until I grow EDA whiskers, I guess! ;-)

I have completed the first design attempt. After review I then realized that I made a mistake in SIO/2 C/D and B/A nets connected to the address bus A0 and A1.

I want to implement the same addressing as is normally compatible with the RC2014 Dual Serial Module SC104 option for "Official SIO/2" addressing.

So, I ripped out the inverter in error when referencing the SC125 design.

And I will put the 74HCT04 back into the design to get that one gate!  More time with EasyEDA. Woohoo!

My problem is that I just endured the pain and trials of adapting to a new FPGA tool (Lattice Diamond) and it wasn't pretty.

FPGA tools can be a bear particularly when the reported errors are along the lines of "Something is wrong and I am not going to tell you where or why!" or "Please call 1-XXX-XXX-XXXX Core Error during Synthesis..."

I was feeling "snake bit" and was hessitent about EasyEDA and what it might pose as a challenge to the uninitiated.

It isn't that difficult when modifying an existing design - and THANK YOU for that advantage.

Would you be interested in reviewing the schematic briefly once I have it ready?

Review Gerber files?  Necessary?

Thanks in advance for your most valuable time!

Cheers

Jim

[Steve Cousins]

Jim

It is common practice here on the group to post designs for comment and checking. I'm happy to do it privately but posting here might get more feedback.

Steve

[Steve Cousins]

One word of warning. Circuit board design is addictive. Once you get your first board in the post you will likely be hooked. You will then never complete your other projects :)

Steve

[Jim McGinnis]

AOK!   Sounds like a party...

I will get the final mods in place and post here after a while...

Cheers

[Jim McGinnis]

Greetings!

I have completed my first EasyEDA project that, with help from Steve, is a hybrid design utilizing the base schematic from Steve's SC110 (RC20154 PRO BUS), SC104 Z80 SIO/2 Module, and modified using attributes from the SC125 (Z80BUS) implementation.

Objectives in General:

+ Maintain RC2014 Pro bus interface connectivity.

+ Maintain SIO/2 and CTC addressing basis from the SC110/SC104- compatible with the official SIO/2 addressing that is expected by ROMwbw

+ Utilize a 1.8432 MHz clock - from SC125

+ Provide SW configurable Baud Rate Settings (ONLY). This card may not work as the primary console port without SIO2 Port A baud being set by BIOS

+ Eliminate driving RC2014 bus RX, TX, RX2, and TX2. (Personal decision)

+ Simplify IEI and IEO by adopting the SC110 chaining of SIO/2 and CTC on board.

+ Retain chaining of CTC Channel 2->3 for long timer period generation.

What is yet to be determined is compatibility with the SC126 CLK and access timing for SIO/2 and CTC.  Fingers crossed that is just works!  (Naive Expectation?)

The schematic is attached as a PDF.

I think EasyEDA has taken off the "training wheels limit" for changing the project to Public...

Link: https://easyeda.com/jim.mcginnis.fl/sc110mod

It is searchable as well:   https://easyeda.com/search?wd=jm001&indextype=projects

Please let me know if I am committing any group transgressions here. I am respectful of the contributions made by individuals and will always give credit to the sources of my inspiration and learning.

Thought about the schematic??

Thank you in advance for your most valued time and contributions.

Cheers

Jim

[Jim McGinnis]

Post Script:

I modified the standard RC2014 board dimensions to enable easier routing. Actually, routing was unsuccessful with the standard board outline. And I don't have the experience to ferreting out the troubles with the layout to get maximum routing success. So, I added a bit to the height of the card...

It routes very quickly. Modifications and additions will be easier, I think.

Cheers

Jim

[Jim McGinnis]

You are so right. Just another "wife" to pay attention to, this circuit design and board design stuff...   :-)

On Friday, January 24, 2020 at 3:52:28 PM UTC-5, Steve Cousins wrote:

One word of warning. Circuit board design is addictive. Once you get your first board in the post you will likely be hooked. You will then never complete your other projects :)

Steve

<<SNIP>>

[Steve Cousins]

Hi Jim, it's looking good.

You probably had routing problems because you kept my really thick tracks. I use the thickest tracks that I can fit in - just my personal 'thing'. If you had lowered the minimum track width to say 10 mil it probably would route without any difficulty.

The schematic looks good. You have listed your design goals and their implications, but just for a little more information here are a few observations and comments.

The reason for the inverter is to keep the SIO registers mapped the same as the official RC2014 SIO module (as you noted). I considered this important in my RC2014 SIO designs as I wanted at least serial port A to work with existing firmware and existing CP/M CBIOS. With your design, this is a bit unnecessary as your serial data clock is not the expected 7.3728MHz (it is 1.8432MHz and is also passed through the CTC). Thus you will already need special firmware and/or software. I don't think you would lose anything useful if you remove the inverter and configured the register addressing for the more 'obvious' scheme.

My serial module for the Z50Bus did not have to deal with the odd RC2014 SIO addressing scheme so an inverter was not necessary. It also did not have to conform to an existing serial data clock frequency, so I was able to use a 1.8432MHz oscillator. This makes the serial card independent of the bus clock. In other words, my RC2014 SIO module was constrained by history, while my Z50Bus SIO card was not.

A quick look at RomWBW's configuration options suggests that your card won't work without code modifications as there are no apparent CTC functions to set the baud rate. Perhaps I've missed something here.

SCM can detect which register order is used and works with both addressing schemes (with or without the inverter). RomWBW can be configured (compiled) to work with either scheme but the stock version assumes the inverter version.

Steve

[Jim McGinnis]

Steve,

Fine business on the trace widths you were using and how that may constrain routing success. I will have to add that constraint to my "awareness list."

Thanks for your comments. The idea that the card will require some "custom" software for baud rate settings is something I assumed but still had not settled for sure.

My intent is to use this card as an adjunct to the primary serial IO provided by the SC126. The expectation that it will "plug and play" with the existing Z80 RC2014 systems may be less important.

And a result, I can simplify the schematic a great deal. I need to dwell on that a bit to be sure I understand the ramifications.

Perhaps the answer lies in the fact that even if ROMwbw doesn't recognize the added serial port, it is of no consequence since if I want to keep COM0: and COM1: Z180 peripherals, the CP/M standard only allows these additional ports to be "mapped" to the PUN and RDR IOBYTE variants and those are single direction - BIOS and CP/M APIs are rigid in this relationship.

The Altairduino Emulator is much more flexible in that it emulates 88-SIO, 88-SIO/2, ACR and LPT. You can configure four (4) bidirectional serial ports using SIO, SIO2 and LPT. But that is the subject of another discussion.

MODE.COM

It is obvious that the mode.com program is designed to manipulate the Z180 serial peripherals - COM0: and COM1:. It works very well for that purpose.

I think I need to understand any additional capabilities of the mode.com utility. In the SC126, the SC104 card is visible to the utility and the COM2: and COM3: ports are listed.

I will look for the MODE.COM source code.

Obviously, an additional step is required to set up the COM2: and COM3: baud rates to the actual desired rates. And that may just be another utility - MODE2.COM or the like.

The subsequent conundrum is whether there exists an add-on card that MODE.COM can manipulate - baud rate, etc? What hardware interface expectations exist for MODE.COM to affect configuration changes for a COM2: or COM3: interfaces? Probably none since the CTC is "a stranger" to the original design.

This is all very satisfying and I am looking at a few more design iterations before we "make a few boards."

Thanks for your excellent feedback and info.

Jim

[Jim McGinnis]

Greetings:

I decide to focus on a SIO/2 + CTC board for the SC126/SC130 platform(?) with no expectation of being compatibly hosted in the RC2018 Z80 system domain.

Brief Requirements:

1. Allow SIO/2 to be addressed as either 0x80 or 0x84 base address using JP7

2. Allow CTC to be addressed as either 0x88 or 0x8C base address using JP8

3. Employ SIO/2 C/D and B/A classical addressing - not RC2014 official A0 states.

4. Clone the SC125 CTC output wiring

    CTC TO0 --> SIO/2 Port A Baud Clock

    CTC TO1 --> SIO/2 Port B Baud Clock

    CTC TO2 --> CTC TRG3 (Daisy chained for long timer period)

5. No net that links SIO/2 TX and RX lines to the backplane. Personal choice.

6. Board will inter-operate with SC126 bus timing (RISK)

7. Interrupt chain flows from SIO/2 through CTC (RISK)

8. Utilize same local OSC (1.8432 MHz) as is found in the SC125 board design.

Risks/Concerns:

Bus Timing - may not be "usable" with SC126 timing.

Interrupt Scheme - can interrupt source be determined? (saw posts drawing this into question, haven't researched whether polling source in INT handler is effective)

Software Impacts - at least a new SW tool is required to set CTC divisors. Can ROMwbw SIO driver be modified or a new driver created for the SIO/2 + CTC pair on this card?

Your comments and suggestions are gratefully received!

I hope to build boards after the Chinese New Year celebration ends and boards can come out of fab.

Best regards to the group...

(The design is visible on EasyEDA - just search for JM001. Thanks)

Jim

[Wayne Warthen]

On Sunday, January 26, 2020 at 10:08:42 AM UTC-8, Jim McGinnis wrote:

Risks/Concerns:

Bus Timing - may not be "usable" with SC126 timing.

I think Steve has already mentioned this, but Z180 is very flexible with respect to adding up to 3 additoinal I/O wait states.  I'm sure you can get the timing to work, but not sure if you will need additional wait states.  Adding wait states in RomWBW is a simple config setting.

 

Interrupt Scheme - can interrupt source be determined? (saw posts drawing this into question, haven't researched whether polling source in INT handler is effective)

Both the SIO and the CTC can be programmed with different interrupt vectors.  This is the standard way to differentiate the interrupt source and is fully supported in RomWBW.

 

Software Impacts - at least a new SW tool is required to set CTC divisors. Can ROMwbw SIO driver be modified or a new driver created for the SIO/2 + CTC pair on this card?

The existing RomWBW SIO driver can be modified to utilize the CTC for a baud rate divisor.  This modification was already being considered because there are other cards that could leverage this capability.

Thanks,

Wayne 

 

[Jim McGinnis]

Wayne,

Thanks for the feedback. I really appreciate the guidance and technical fills.

I hope to play with this design as soon as I can get the cards built and populated.

And I certainly enjoy using ROMwbw on the SC126.

Thanks again. I will keep my ears peeled for new developments...

Jim McGinnis

 

[Tadeusz Pycio]

I was also looking for additional serial ports, I didn't follow threads here and that's why this board went into production. If it passes the tests successfully, I will provide a copy. A bit of work is waiting for me, because Wayne in his RomWBW does not support the use of the 88C681 system in this solution, and I do not want to give up his good work.

[Alan Cox]

On Sunday, 26 January 2020 18:44:35 UTC, Wayne Warthen wrote:

On Sunday, January 26, 2020 at 10:08:42 AM UTC-8, Jim McGinnis wrote:

Risks/Concerns:

Bus Timing - may not be "usable" with SC126 timing.

I think Steve has already mentioned this, but Z180 is very flexible with respect to adding up to 3 additoinal I/O wait states.  I'm sure you can get the timing to work, but not sure if you will need additional wait states.  Adding wait states in RomWBW is a simple config setting.

The problem is more the way the clock is used and the cheats pulled by the Z80 peripheral boards. You can play with the RX/TX clocks subject to some limitations but they get really upset when the CLK is not the CPU clock.

 

Interrupt Scheme - can interrupt source be determined? (saw posts drawing this into question, haven't researched whether polling source in INT handler is effective)

Both the SIO and the CTC can be programmed with different interrupt vectors.  This is the standard way to differentiate the interrupt source and is fully supported in RomWBW.

But not RC2014. Some of the cards support various user pin and flying lead schemes for IEI/IEO (but not even consistently). Without those you can get a situation where both CTC and SIO interrupt together, a fight breaks out on the bus and the CPU jumps to fishkill. It's why I gave up using IM2 for generic RC2014 in Fuzix. A similar problem occurs the moment you add any non IM2 capable device.

It does work with proper IM2 supporting designs like the EasyZ80 and  I use it there.

Alan

[Wayne Warthen]

Yes, excellent points that I missed.  Thanks Alan.

[Jim McGinnis]

Please pardon my inexperience and lack of understanding here:

Here is my boiled down assumptions based on the additional valuable feedback provided (Thanks Alan).

Lets assume that:

1. The SC126 INT0 is employed in IM2. ONLY the peripheral cards with devices of interest have been enabled via control register settings.
2. The IEI/IEO lines are instantiated and utilized as required/defined by the Zilog documentation.
3. No RC2014 devices are expected to participate in the interrupt enabled "cadre" of peripheral cards.

Q: Will this configuration provide reliable interrupt behaviors as would normally be expected?

Q: Does the system need to be devoid of ANY RC2014 cards due to electrical/signal issues even if they are not empowered to generate interrupts?

I do appreciate the help and hope to come up to a higher level of understanding by your inputs.

Cheers

Jim

[Jim McGinnis]

Additional assertion:

Currently, SC126 \INT bus line is connected to the processor INT0 pin.

This would need to be modified such that the correct IEO signal on USR3 pin (RC2014 bus reference) is, instead connected to the INT0 input to the Z180. Likely a pull up is required, as well.

Looks like RP1 on the SC126 already covers that pull up duty.

I think that covers all of my question inputs.

Jim

[Steve Cousins]

Hi Jim

Regarding "...modified such that the correct IEO signal on USR3 pin (RC2014 bus reference) is, instead connected to the INT0..."

This is not correct. All interrupting devices are connected to INT (known as INT0 on Z180) and any of them can pull this line low to notify the processor that they need servicing. This line does indeed have a pull-up resistor. The IEI/IEO signals are not linked to the INT signal but instead form a separate daisy chain.

Under Z80 mode 1 interrupt handling the processor must then examine each possible interrupting device to determine which one needs servicing. As part of that servicing, the device releases the INT line.

Under Z80 mode 2 interrupt handling the processor determines the device, or more specifically the address of the device's servicing routine, from a vector placed on the data bus by the interrupting device. To manage multiple devices and provide an interrupt priority system, all mode 2 capable devices are linked via the IEI/IEO daisy chain. The first device in the chain with its IEI high and pulling the INT line low is the one which puts its interrupt vector on the data bus and is thus serviced.

The implications of all this are:

You can't directly mix mode 1 and mode 2 devices. In a mode 2 set up and devices that do not support mode 2 must have their interrupt output connected to an input of a device that can generate a mode 2 interrupt for it. A device such as a Z80 CTC or PIO can be used for this purpose, allowing all sorts of non-Zilog parts to generate mode 2 interrupts.

Official RC2014 modules do not support the IEI/IEO daisy chain and thus have to be used in mode 1 or only a single device in the system can generate mode 2 interrupts. The only official RC2014 mode 2 capable module is the SIO and this hardwires IEI high, does not provide access to IEO, and thus does not allow for even a flying lead style interrupt daisy chain.

The Z80 CTC can only be sensibly used in mode 2. Given the lack of IEI/IEO on official RC2014 systems, this prevents the addition of interrupts from a CTC. There is no official RC2014 CTC module.

So to answer your earlier questions:

The set up you described should be reliable.

You can add official RC2014 modules to SC126's bus provided there are no address clashes and the modules can cope with the higher bus clock speed. Simple modules like the RC2014 digital I/O module and the RC2014 compact flash module work fine. I not confident I can give a definitive statement about other modules and particularly any that need interrupt support.

Steve

[Alan Cox]

The Z80 CTC can only be sensibly used in mode 2. Given the lack of IEI/IEO on official RC2014 systems, this prevents the addition of interrupts from a CTC. There is no official RC2014 CTC module.

Fuzix uses the CTC in mode 1 8) It isn't that hard to do. You can also use a Z80 SIO (and indeed most serial chips) as an interrupt controller if you are not using all the modem and user lines on them. I've not looked at hacking a combo SIO/CTC board to do this but I think it's as simple as running your CTC channel for timer output into a spare SIO modem pin and handling the interrupt for the modem change.

I do the same on my tweaked Tom's SBC to add a clock/timer interrupt and also on the retrobrew SBCv2 with the 16x50.

Alan

[Jim McGinnis]

Brilliant set of replies. Thank you!

I hope to incorporate the following card functionalities as bus cards attached to the SC126 beginning with the closest slot in the IEI/IEO chain:

1. JM001 SIO/2+CTC using IM2
2. SC103 PIO using IM2
3. RC2014 CF Card no INT net needed
   
4. SC129 Basic Digital Discrete IO - no INT net needed
5. SC115 Prototyping Breakout - no INT net required at first.*

I will add IEI/IEO jumpers on the back of the SC126 card for each slot that has a non-IM2 card inserted.

Looking at Sergey's EasyZ80 schematic (thanks for the hint, Alan) I see there is a 10K pull-up on the

IM2 device that has the highest priority - on the IEO pin. I will add that to the JM001 SIO/2+CTC card as a jumper option - since the card is still on paper.

The ability to bring the SC115 Breakout Non-IM2 card into the IM2 fold by slaving the SC115 /INT interrupt off of a PIO input is intriguing.

I am probably abusing the "slaving" term here. Please forgive.

That is a bit out in the future for my thick headed personage. But I am a glutton for being cannon fodder!

What have a botched up so far?

Thanks Steve for the detailed explanation. I think my needs for using cards pretty much excludes cards that require IM1 mode interrupts and don't support IM2.

Thanks for all the help getting me this far into the design discussion and understanding of Z80 interrupt modes.

Cheers

Jim

[Jim McGinnis]

Well, I see via more careful examination of the EasyZ80 that the pull up is for an IEI in that schematic. Otherwise, it has no source.

I am modifying the JM001 for configuration flexibility...

• RC2014 USR2 IEI is routed to the SIO/2 IEI.
• SIO/2 IEO is routed to the CTC IEI.
• CTC IEO is routed to RC2014 USR3 IEO.

[Dave White]

One thing to be aware of when using IM2 - you can only have a maximum of four ICs sourcing an interrupt vector without including some pretty messy look ahead logic.

[Interocitor Steve]

Hello all,

I don't know if this is the right thread, but the Z85C30 is an SIO with a baud-rate generator built in and the clock(s) come out to pins.

I just got this board back from a PCB fab house. It is a KiCad project which I can make available. (dunno if it works yet). 

I am hoping to use the B channel for SPI.  This chip can do synchronous IO.

=Steve.

[Alan Cox]

The original SIO can also do synchronous serial. I've never tried doing SPI with it but I don't think you can simply because you can't turn off all the stop and start bits. It can do all sorts of other synchronous protocols (HDLC, Bisync etc, even sort of PC keyboard) but not I think raw SPI. A lot of PC sync cards, and also machines like the 68K macintosh and the Sun3 systems used the 8530/85230 SCC/ESCC.

One thing I learned the hard way when programming the 8530 and 85230. There is a 'suggested' programming order. If you don't follow it exactly then weirdness happens. So IMHO 'suggested' is the wrong word 8)

Not sure how important the SPI side is anyway. An 8MHz Z80 can bitbang an SD card at 18Kbytes/second.

Alan

[Jim McGinnis]

Thanks.

I will keep that constraint in mind. I think I am ok so far with the compliment of peripheral cards in mind.

Jim

[Jim McGinnis]

Another interesting chip with possibilities. Combining the CTC and this device will allow for 4 independent CTC output to play with or...

And Steve's prediction is fulfilled again...  Board design is addictive.

Thanks for all the technical advice and info.

Jim

[Interocitor Steve]

Hi Allen,

Thanks for sharing your experience about programming using the "suggested" steps.  I appreciate it.  You just saved me a bunch of time.

If you run in Bisync mode you can stuff the header with the first two data bytes and eliminate start & stop "bits".  I used it in Mode 2 and generated a continuous data stream in the past. I want SPI is for some commonly available Arduino accessories.  I've never been a bit-bang fan, but that's just me.  I might have some model railroad applications too. *-)

=Steve.

[Alan Cox]

On Wednesday, 29 January 2020 16:48:10 UTC, Interocitor Steve wrote:

Hi Allen,

Thanks for sharing your experience about programming using the "suggested" steps.  I appreciate it.  You just saved me a bunch of time.

If you run in Bisync mode you can stuff the header with the first two data bytes and eliminate start & stop "bits".

Very clever - not a trick I have seen before.

Alan

[Colin MacArthur]

Great to see someone has built a SCC board...

I have a box full of 85C30 40pin dip that I recovered from old "Otis Elevator" control boards....

Have been wanting to do a SCC board BUT it kept getting pushed back by other projects...

Steve, Are you in the USA or Canada ?

If you have a spare board I would be interested or Gerbers would be great...

(I can add it to the 105 Boards that are sitting waiting to ship @ jlcpcb...) 

Thank-You

CM