Re: Dual CPU Motherboard - Z80 CPM-80 2.2 -and- 68000 CPM-68k - ???

[Harry S. Speer]

================================================================================   

   22:40, 10:40 PM, Sunday, September 6th, 2026  

   Re: Dual CPU Motherboard - Z80 CPM-80 2.2 -and- 68000 CPM-68k - ???

           

   I've been thinking about a Dual-CPU motherboard with a   

   Z80 CPM-80 2.2  -and- 68000 CPM-68k - as an advanced project.

   The oldest design I know of was back in the S-100 days - 

    

   S-100 Cromemco DPU Board - at John Monahan's website 

   https://www.s100computers.com/Hardware%20Folder/Cromemco/DPU%20Board/DPU%20Board.htm

   

   But there have been others since. I've searched around a little.

   But you have to crawl before you can walk, then walk before you

   can run, but I've been thinking down the road a bit. I am still

   at the very beginning. 

    

   At the time of the S-100, having the support of a common OS for

   "support" CPM-80 2.2 - would help to bootstrap into the newer

   CPM-68k.  Nowadays, with the ubiquitous IBM-PC clones, and their

   descendants, they more than provide a stable place to work 

   from. 

    

   The reason to add a Z80, in the case of the RC2014 bus and 

   the RCBus, is that any IO cards that use a Zilog SIO chip, 

   for example, need a Z80 CPU chip to interface with. 

   So in this example, the Z80 would act as an IOP - 

   an input / output co-processor. 

   Historically, There was also the "Sega Genesis" where the 

   Z80 handled the sound chips, IIRC. The 68000 was the "main"

   CPU:  

   https://www.chibiakumas.com/68000/genesis.php

            

   And there was also a Canadian "Cypher" Dual-CPU SBC at 

   one time from a company called "Motel Computers" of Ontario.

   Github:  

   https://github.com/rcl9/Cypher-Z80-68000-Single-Board-Computer-1984-by-Motel-Computers---History-and-Documentation     

     

   There's also "Microbee Technology" of Australia, with a Dual-CPU:    

   https://www.microbeetechnology.com.au/new-models.html 

   With a Z80 and a MC68SZ328 (Dragonball SZ) MC68000 CPU at 66 MHz.

             

   I came across the Microbee Dual-CPU on Facebook in the 68000     

   Builders room, IIRC.  Though he hadn't built it and couldn't     

   tell me much about it. He pointed me to the website.  I got    

   the impression he was writing code for it, but under an "NDA"   

   probably. It seems these kits are not yet available. I envy  

   him having the hardware to play with.   ;-)      

      

   But in my case, I am somewhat following behind Mark Durham of 

   the UK who has already created a working set of 68k cards for 

   the RCBus.  I am very pleased and impressed with his work. 

      

   Mark's boards work with some of the RC2014 & RCBus cards,   

   but it is not compatible with the Zilog IO chips on some of  

   those cards.  Which is what led me to thinking about an IOP  

   - a sort-of "slave" IO Z80 co-processor for handling the 

   Zilog-based IO Chip cards. And having it on board would  

   also allow booting of CPM-80 2.2, for example. And possibly 

   CPM 3 later. Maybe. Probably would need an MMU for the Z80.

     

   And then you would probably need a Dual-Ported RAM, or 

   some other way of exchanging data between the two CPU's, 

   to pass blocks of data back and forth, if need be.  

      

   Right now, this is just an idea I'm kicking around but it  

   does solve the use of the Zilog IO cards problem that a  

   68000 CPU could not easily deal with on it's own, solo.  

   

   Part of my idea is to have a connector for an RCBus 

   Backplane as an extension, similar to Steve Cousins

   SC130 Z180 Motherboard and even more similar to his

   newer SC720 RCBus Z80 Motherboard, Here: 

   https://smallcomputercentral.com/rcbus/sc700-series/sc781-rcbus-z80-sbc-motherboard/ 

    

   Conceptually, I have been thinking of something about 

   twice the size of the SC720 or even bigger. The 16-bit 68000 

   requires pairs of memory chips whereas the SC720 is an

   8-bit board. It might end up quite large, especially a 

   prototype. 

                  

   Please feel free to kick around the idea like a "soccer-ball"

   (USA) or "football" (UK). I'm sure people will come up with 

   some pros and cons.   ;-)  

    

   Regards, 

   Harry 

   cc: self 

=============================================================================      

[Jon Jones]

Is there really a need to drive a Zilog SIO board with a 68000? After all, there are 68k native serial chips. Plus some of the non-Zilog serial boards might work too (ACIA or 16C550)

I'm a lucky owner of some of Mark's 68k boards and I've got far too many Z80 RC-Bus boards too. I know Mark's tested a variety of Steve's boards and over the weekend, I got Spencer's LCD board and Colin's OLED board all working fine with Mark's 68k boards.

Clearly a 68k based CPU can work with a lot of RC based boards. The only ones that'll have problems are ones that use some Z80 magic (Either its interrupt structure or need of an M1 line) And how many of them are there where a native 68k solution doesn't exist?

Then you've got the challenge of getting two disparate CPU architectures to share a bus. That's a challenge that's way out of my league. All I know is: It's going to be hard. If you look at Olimex's Cerbius which has a 6502 & Z80 it's got three chunky PLDs on the board to do the arbitration.

Saying that: It's your itch and if you want to scratch it - go for it! And can you put my name onto the waiting list?

J

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[Alan Cox]

The Cypher machines ran system 3 Unix on the main CPU and the Z80 ran the I/O for it presumably to reduce load and get better serial performance or could be used to run CP/M instead.

I built a similar kind of setup using a 1K dual port RAM on a little board that bridges two rcbus systems and appears on both as IO and an interrupt. The IDT 1K DPRAM part does all the work except decoding a chip enable each side 

Alan

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[Mark Durham]

Not quite on topic (i.e. no Z80) but I've got a prototype RCBus-80 board that I need to build and test that uses an 8051 and a bit of dual port RAM. Its main reason for existing was to see if I could get an SPI interface with a reasonable turn of speed. It'll probably bit-bang an I2C interface as well once programmed to do so.

Mark. 

[Tadeusz Pycio]

Offtopic - Mark, perhaps, rather than using the 8051 for this task, it might be worth considering PIC microcontrollers with a Parallel Slave Port for such applications (PIC16C877A/874A or PIC18F452/4550)? 

[Alan Cox]

Mine used an Arduino but 8051, tms7000, z8 etc would be much more period authentic, or perhaps even the good old HC11 later on

On Mon, 7 Sept 2026, 10:00 Tadeusz Pycio, <ta...@wp.pl> wrote:

Offtopic - Mark, perhaps, rather than using the 8051 for this task, it might be worth considering PIC microcontrollers with a Parallel Slave Port for such applications (PIC16C877A/874A or PIC18F452/4550)? 

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[Jaap van Ganswijk]

Zilog also had a variation on the Z8030 dual serial port chip called the Z8530 that could be connected to other CPU's if I remember correctly. I'm not a fan of systems with two CPU's and especially from two different families. My 'boss' also had ideas in that direction but I said: just use a faster single processor and I'll program it. It's all about the overhead costs of interrupts. And when they are too slow use DMA...

Op ma 7 sep 2026, 11:08 schreef Alan Cox <etched...@gmail.com>:

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[Sam Sawyer]

jaapvan, You missed a system sold by Radio Shack (Tandy Corp.) The Model 16 and the Model 6000 used both the Z80 and the 68000. They were on separate PCBs, but still the concept of Z80 for I/O and the 68000 for complex computation. The z80 assembly language program for I/O processes and the 68000 ran Xenix OS (a Unix derivative). The first model shipping was the Model 16 in 1982 and the model 6000 followed in 1985.

[Ed Porter]

There's a Zilog application note in a few of the data books on Bitsavers
showing a few ways to interface z8500 peripherals to the 68000. It's in
this one at page 697:
https://archive.org/details/bitsavers_zilogdataBmICs_46443879/page/n699/mode/2up

-ed

[T Gerbic]

I also remember thinking "what a good idea" when the Heath/Zenith (maybe H-19?) came out with a Z80 processor and an 8051 to handle I/O. I have always thought it is a good idea to let one processor do the heavy lifting computing and one do the mundane I/O processing. 

[Harry Speer]

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13:52, 1:52 PM, Tuesday, September 8th, 2026. 

Regarding Dual-CPU computer,  I've also thought about having two 68000-family CPU's working together.  

A 68030 with it's built-in MMU could run some Linux variant.  IIRC  -  There is / was a Debian 32-bit for m68k - and I've thought that would be fun to run.  There are "minimal" Unix-Like / Linux-Like OS'es available for the 68000 without MMU - ucLinux, Minix, also 

Gloworm.  I Linux-like OS would be a lot more useful to me than  the old CPM-68k.  

The secondary CPU could handle a Video Screen Display (VGA, DVI, or HDMI) and also handle  mundane IO  like Serial, Parallel, USB, also useful CF or SD or other interface to a "disk drive",  mass-storage, Block-Device.  

I'd like to be able to use the Flock-2 Card to  play with some real physical floppy disk drives again.  I recall MS-DOS rather fondly.  :-) 

No reason to burden the Main 68030 CPU - it can handle the Main OS directly. 

But as I said before, I learn to crawl, then walk, then run. I have a long way to go.

Harry

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[Bill Shen]

I have a couple dual processor designs for classic 40-pin RC2014 bus.  The designs are based on the inexpensive 4Kx8 dual port RAM, IDT7134 ($2-$3 each).  One is based on Z80, https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:dpram, the other is based on 6502, https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:dualport6502:home.  The CPU/DPRAM/CPLD portion took small area of 100x100mm pc board, so there are plenty of room for prototyping.  The Z80 dual processor page has several examples about quad serial accelerator, 128x64OLED display accelerator, and sound chip accelerator.  Since it is for classic RC2014 bus, it should be compatible with CB030’s RC2014 expansion bus, although I have not actually tried it.

Z80 dual processor was discussed on retro-comp forum here, https://groups.google.com/g/retro-comp/c/A98YbLhjHyI/m/xu6vTwEuBAAJ

Bill

[Bill Shen]

BTW, Z80 dual processor took 4K of Z80’s 64K I/O space, so a Z80 motherboard can have as many as 16 Z80 co-processors.  So 17 Z80 on RC2014 bus, what kind of software can we run?

Bill

[Bill McMullen]

Looks like this didn't post the first time ... my apologies if it's a duplicate.

BTW, Z80 dual processor took 4K of Z80’s 64K I/O space, so a Z80 motherboard can have as many as 16 Z80 co-processors.  So 17 Z80 on RC2014 bus, what kind of software can we run?

Instead of using the Z80 as the master, why not consider using the Z180 with the dual-ported memory in a banked area?  That's what I did with my NYOZ system that supports 16 slave Z180s, all at 33 MHz and it worked well.  As to software: all the loader & slave software I developed was based on CP/M 2.2 but the objective was to eventually upgrade the master to MP/M and interact with the slaves via CP/NET.

[Bill McMullen]

BTW, Z80 dual processor took 4K of Z80’s 64K I/O space, so a Z80 motherboard can have as many as 16 Z80 co-processors.  So 17 Z80 on RC2014 bus, what kind of software can we run?

Instead of using the Z80 as the master, why not consider using the Z180 with it's banked memory?  That's what I did with my NYOZ system that supports 16 slave Z180s, all at 33 MHz.  As to software: all the loader & slave software I developed was based on CP/M 2.2 but the objective was to eventually upgrade the master to MP/M and interact with the slaves via CP/NET.

On Tuesday, 8 September 2026 at 16:17:39 UTC-6 Bill Shen wrote:

[Bill Shen]

That’s a great quad coprocessor design.  My problem is not sure how to use multiple processors to solve a problem, so my design has plenty of prototyping area to try different things.  I only has one example of three Z80 accelerating the ‘game of life’, https://groups.google.com/g/retro-comp/c/A98YbLhjHyI/m/xu6vTwEuBAAJ. I really wouldn’t know how to use 16 processors.  Do you have a working software for your Quad coprocessors?

Bill

You’ve mentioned a fast Z180 host supporting 16 CP/NET terminals.  That may be a good application for large number of coprocessors.  

[Bill Shen]

The link in the above post went to the right topic but wrong message.  The 3 Z80 accelerating ‘game of life’ is the message dated Nov 27,2019 (sigh, where did the time go?)

Bill

[Bill McMullen]

In keeping with the 100x100mm cheap PCB's, I could only get 4 systems on a board but they're designed for four boards to be stacked with each board getting a prefix ID via 2 DIP switches.  Each MPZ4 board has 4 Z180's at 33MHz and each processor has 4K of dual-port RAM shared with the master, 512K of private SRAM and bidirectional interrupts with the master.  There's a quad-port ASCI to USB bridge for the consoles and the second ASCI port on each processor is connected to an RS485 bus that also has an external connector.

The slaves don't have any ROM and I got the software working for the master to load a CP/M-2.2 system into each slave and have each of them running as independent CP/M systems with their own console.  I also got a utility working to load each slave's extra RAM with a pre-configured RAMdisk and thus they were usable with various applications.  I didn't get to the MP/M & CP/Net stage although I did write a SNIOS driver for the slave.

Full disclosure: I only tested this combination with four slaves and the only foreseeable problem with an upgrade to 16 slaves might have been with power distribution.

[Alan Cox]

On Wed, 9 Sept 2026 at 00:21, Bill Shen <coinst...@gmail.com> wrote:

That’s a great quad coprocessor design.  My problem is not sure how to use multiple processors to solve a problem, so my design has plenty of prototyping area to try different things.  I only has one example of three Z80 accelerating the ‘game of life’, https://groups.google.com/g/retro-comp/c/A98YbLhjHyI/m/xu6vTwEuBAAJ. I really wouldn’t know how to use 16 processors. 

There are a collection of algorithms that scale very well across processors but the underlying problem is they are all things you'd not run on a Z180 except for the laughs - like password crackers. It is possible to scale life to 16 processors using tile based algorithms where each CPU computes a tile interacting with its neighbouring

processors as needed.

In the late S100 days there were systems where you plugged cards into the backplane and each had serial and sometimes local storage and ran a user as a CP/M system, with the main machine using MP/M (or more often all using one of the more upmarket CP/M and MP/M compatibles intended for this). That's basically what I modelled the Z180 RCbus slot in card upon. Again similar design - 512K RAM on board, 1K IDT DP RAM chip and a tiny bit of glue so the master can reset and control the slot in board. As th DP RAM is mapped at physical 0 you just load code into the DPRAM and kick the Z180 out of reset.

256 processor Z80 machines did get built. Look up ZMOB (NASA project NSG-7253). 1GHz of Z80 compute.

Alan