Announcement: Native-code compilation for Ngaro and Parable

[Mat]

Hello,

I'm working at current on an embeddable compiler for MISC style VM designs like my own (AVM), Ngaro and the Parable one. It is the successor of my Ngaro extension for Version 10.3 which can be found here: https://github.com/Mat2/extended-ngaro. Instead of this approach the compiler is now abstracted into clear processor specific back-ends and a CPU independent front-end which compiles AVM instruction bundles as immediate-code representation. On top of that, translators for different instruction-set architectures can be implemented though a common API generating AVM code.

Current status:

Back-ends: AMD64; In Work: IA32, MIPS5; Planned: ARMv7, MIPS3 (PIC32), Propeller II

Compiler: Out-Of-Order-spipe, In-Order-spipe; In Work: RISC-pipe; Planned: VLIW

Translators: AVM; In-Work: Parable; Planned: Ngaro

Code quality:

This little snippet demonstrate the quality of generated machine-code at moment. Following an AVM instruction-bundle of 8 instructions combined to 5 opcodes is compiled for Intel's Core architecture:

LI.LI|LI.ADD|MUL.LI|SHL|BR := $101,$202,$309,4

vD: 1 | 0: MOV  RAX,101  ; 1 cl

vD: 2 | a: MOV  R8,202

vD: 3 | 14: MOV  R9,309

vD: 2 | 1e: ADD   R8,R9      ; 1 cl

vD: 1 | 21: IMUL  RAX,R8

vD: 2 | 25: MOV  R8,4         ; 1 cl

vD: 1 | 2f: MOV  CL,R8B

                SHL   RAX,CL

Why not using LLVM, libJIT... ?

Because these are large projects with huge library dependencies and at last Nagro+Retro found applications for embedded applications beside cross-compilation. Also both prominent projects fail generating somewhat efficient code for MISC styled VM designs as I can demonstrate at demand.

Why not help ?

It would be nice founding someone who can test the compiler on different devices, specially with MIPS and ARM based CPU's. In addition: Because I can only work in my spare-time any help porting the back-ends would speeding up development. This is mostly trivial, all needed is an assembler which generate machine-code listings (FASM for ARM as example). The AVM instruction-set consisting of only 16 base and 24 macro instructions. For most CPU architectures porting would probably need not much time (I suspect one, two days inclusive debugging and testing).

Mat.

[Mat]

Repro: https://www.assembla.com/code/vanar/git/nodes/master/src-C