Re: memory_order_acq_rel and memory_order_seq_cst

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Dmitriy Vyukov

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Nov 9, 2009, 11:34:08 AM11/9/09
to Scalable Synchronization Algorithms, rel...@googlegroups.com
On Nov 9, 7:24 pm, Alexander Shuvaev <alex.shuv...@gmail.com> wrote:
> Dmitriy, I have the question about your Relacy Race Detector. You'd
> supported C++0x atomic operations in relacy, your implementation must
> be as weak as future standart guarantees (must permit same memory
> reodering). Obviously, it must not be stronger, otherwise some test
> never fail even if a program being testing is knowingly errorphrone.
> Am I right about atomic operations in relacy, the implemetation (in
> terms of verification possibility) guarantees is equal to that's given
> in standart?


Yes, your right. Relacy does not rely on underlying hardware memory
model during testing in any way, it models C++0x memory model as close
as possible. So even on x86 hardware you are able to test such things
as relaxed stores, relaxed RMW, failing compare_exchange_weak(),
absence of global order, etc.
Relacy provides "the worst C++0x implementation", in a sense.

--
Dmitriy V'jukov

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