80m Ver X2A Transmitter Discussion

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NZ0I

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Mar 13, 2018, 2:01:35 PM3/13/18
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The 80m transmit section of the Ver X2A transmitter has been built and, after a few modifications, is working considerably better than the X2 version did. It is putting 4 watts into a 50-ohm load, and the output waveform is looking cleaner, but not clean enough. The LM5134 does an excellent job of driving the final output FET: very sharp rise and fall times are evident on its output driving the FET gate. A little ringing is observed and some experimentation with a series resistor or ferrite bead should knock that down.

The two high-speed transistors driving the LM5134 are working adequately, but it was found that they are happiest operating at 5V instead of 12V. But they have one issue that is difficult to solve: they introduce some distortion to the 3.6 MHz signal due to slow rise/fall times, and the result is a significantly asymmetrical rectangular waveform instead of a square wave. The rise/fall times can be improved by lowering the values of the bias resistors, but that increases power consumption. Or the rise/fall times can be compensated for by pre-distorting the 3.6 MHz signal before it reaches the transistors, but that approach might require aligning each transmitter after it is built to ensure a square waveform.

A square waveform is essential in order to maximize the power at the fundamental frequency coming out of the power FET. Also, modeling suggests that the asymmetrical waveform is likely responsible for much of the distortion observed in the transmitter's output waveform. A straightforward no-align approach to generating a nearly perfect square waveform is to utilize a high-speed edge-triggered D flip-flop to divide the frequency in half, with each half of the flip-flop's output waveform corresponding to a rising (or falling) edge of the input signal. This could be done very easily in our transmitter because it is trivial to generate a 7 MHz signal using our Si5351 signal generator: the software need simply double the 80m frequency setting and use that to program the Si5351. That has been done, and tested, and shown to work.

The new 80m schematic is on the web: https://drive.google.com/open?id=0B9STTH26Cx2FX3dRTEtIUmlEUlk. The new design eliminates ALL the 80m transmitter's discrete transistors, except for the power FET. Based on testing this design has a high likelihood or working as desired. 

But there is one issue. When the signal driving the flip-flop is turned off, there is a 50:50 chance that the output of the flip-flop will stop in the high state. If that were to happen then the power FET would be powered on continuously creating a DC short between power and ground. The power supply would shut itself down safely, but still that is an unacceptable condition. To avoid that issue, the flip-flop's CLEAR pin has been tied to the HF_ENABLE signal coming from the processor. So the processor can (and must) always set the flip-flop output low before it turns off the oscillator. This design should work, but it would be nice to have the circuit be inherently safe. Any thoughts on a more elegant solution are welcome!

73,
Charles 


Gerald Boyd

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Mar 13, 2018, 7:38:25 PM3/13/18
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I need to look in my archive as I think I had to do something about the same logic one driving a FET.
If I find something will send it.
Jerry

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NZ0I

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Mar 15, 2018, 10:27:53 PM3/15/18
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More progress today:

Jerry's schematic provided a modification for preventing the flip-flop from causing the FET to short the power supply to ground: the addition of a capacitor between the flip-flop and the FET driver, with a pull-down resistor to keep the FET driver output low when no RF is applied.

The poor transmit waveform has now been corrected. It appears that the final output transistor is happier driving an impedance of around 500 ohms, rather than 50 ohms. So the low-pass filter was redesigned to have an input impedance of 500 ohms. The output signal is now a clean sine wave with the second harmonic about -25dB below the fundamental.

It seems that all the issues with the 80m transmitter are now understood, and the design has been modified to address them. The next board spin should require no more than tweaking a few component values in order to optimize performance of the 80m transmitter.

The 2m transmitter is working up to the driver - which seems to be delivering adequate power to drive the final amplifier and maintains a reasonable AM signal waveform. The 2m final output transistor has not yet been installed. That's next.

-Charles
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