Digital Interface Schematic Rev D.0.1

[NZ0I]

I have revised the Digital Interface schematic design so that it will work with the dual-band ARDF receiver, with the dual-band ARDF transmitter, and probably with a host of other projects. The latest schematic is Rev D.0.1.

New Features:

WiFi Support (ESP8266 using Adafruit HUZZAH breakout board)

15 Atmega328p port pins available to the client board (40-pin header)

8 expanded gpio pins available to the client board (40-pin header)

Provision for the client board to provide power to the processor

Cloning cable support (4-pin header)

UART RS-232 3.3V RXD and TXD pins available (40-pin header)

 

 

Same Old Features: 

I2C SDA and SCL pins available (40-pin header and 10-pin auxiliary header)

Provision for the Digital Interface to provide power to the client board

40-pin (2 x 20-pin headers) client/DI header

10-pin (2 x 5) auxiliary client/DI header

Si5351 HF-VHF programmable clock

DS3231 Real-time Clock

Stereo audio amplifier

Audio tone support (e.g. earphone beeps, audio-tone signal-strength indicator) 

USB serial port (FTDI) for bootloading, or PC communication/control 

Headphone turn-on circuit

Headphone jack 

These changes make the pin-out incompatible with earlier versions of the Receiver Board: so the receiver PCB will need to be revised for the next Receiver PCB spin. Using this board for the dual-band transmitter should simplify the transmitter design considerably. Do let me know if you spot any errors, or have suggestions for improvements.