Schematic Rev B.11

[NZ0I]

I've uploaded the latest schematic (Rev B.11) to the shared drive. It includes updates to the IF Module based on Jerry's latest test results. It provides three options for attenuating the signal at the IF level: SA605 Pin 4 (per Jerry's recommendation), SA605 Pins 1 and 2 (so far not tested), and using a variable attenuator in place of R212. Jumpers and optional part footprints are provided to allow selection between using Pin 4 attenuation, or pins 1 and 2. A footprint is provided for R212 if we decide to go with a fixed resistor, or shorting jumper.

The attenuator part is the same one cited in a previous email: http://www.digikey.com/products/en?keywords=1465-1300-1-ND

A 1.5k resistor ties the ground pins of the attenuator to +3.3V and a 100nF capacitor to ground (to ensure a good RF ground). The control voltage (-3V) is obtained by connecting the control voltage pin to the wiper of a potentiometer, allowing it to be set between +3.3V and ground. Since the ground pins are held at +3.3V DC, ground should appear as a negative voltage to the part; so no separate negative power supply is required. The attenuator is supposed to draw only 25uA of current, so the DC voltage drop across the 1.5k resistor should be only 40mV - negligible. I've never seen a variable attenuator used in this manner, so this is very experimental. But if it works, it will allow the processor to have a great deal of control over the receiver's gain at every stage. 

As always, please let me know if you find any errors, omissions, in the schematic, or suggested improvements.