His comments are:
"My laboratory tests demonstrate that spurious performance and
frequency extension are superior to all others actual DDS, including
the AD9951.
In a few words ... This new AD9912 DDS is the best solution available
today for amateur radio applications"
You may visit his web site and see spectrum analyzer screen shots and
comparison with his old AD9951 DDS design:
1) AD9912 with 190 MHz output ( Clock 1 GHz )Analyzer span= 200 MHz
2) old AD9951 with158 MHz output ( clock 500 MHz )Analyzer span= 200
MHz
3) AD9912 Frequency extension test: 400 MHz output ( clock 1
GHz )Analyzer span= 500 MHz
http://it.geocities.com/giulianoi0cg/dds4.html
If you have problems to from the web page to be readdressed to his
AD9951 DDS project you may try the following address:
http://www.radioamatore.it/i0cg/add9951.html
Giuliano is designing a new DDS PCB compatible with his actual AD9951
board as users of his DDS can easily upgrade to new performances for
spurs but also extending the DDS use to VHF and UHF with better SFDR
( HF, VHF and UHF VFO = 0-400 MHz with 1GHz clock or 0-480 MHz with
1.2 GHz clock ).
Old and new projects can be easily updated to frequency and
performances extension with better SFDR.
I0CG expect to have the new AD9912 PCB available during this coming
September.
Thanks Giuliano for all your dedicated work on this important aspect
of our radio technology.
73
Gian
I7SWX
Hi Ken,
AD9912 and the others, are expected to be released during sepember.
I2CG has done some additional tests usign a R&S 2GHz signal generator
as clock and it looks like the 9912 can be driven to nearly 1.5GHz, so
1.2 to 1.3GHz clock could be suitable.
Now we have to find a low phase clock generator around 1.0 to 1.3 GHz.
73
Gian
I7SWX
For applications sensitive to phase noise, the built in PLL's are not
a help but a pretty severe hindrance. 27 dB of hindrance in particular
for the chips I'm familiar with (AD9954 family) for phase noise 1kHz
out.
That doesn't mean that the DDS's (using refclock PLL or not) aren't
still damn useful for all sorts of stuff!
Tim.
Hi Ken,
Tim did comment properly to your PLL question.
User has to decide what he needs and if his application will be OK
with the internal PLL multiplier or need an external low noise clock.
If one live in a place where the roads are not good he hs to
compromise ... probably it is not good he buys a Ferrari but could be
OK with a Corvette...maybe red...
If you have a high performance RX front-end probably it is better to
use an AD9912 and an external Low noise oscillatorgiving at least 1Ghz
clean signal for low phase noise and low spurs. If you have a SoftRock
SDR I am sure you will be OK with an AD9851 using the internal PLL
like it is done in the DDS-60.
73
Gian
I7SWX