Z180 Processor Board Build "Discoveries"

[Tom Szolyga]

I am converting one of my RC2014 Z80 systems to use a Z180 processor board.  The board is SM Baker's Z180 processor board.  Building the board was no problem except for the surface mount reset chip.  I hacked in a through hole part instead.  I powered up the system using the Z180 and the screen was blank--nothing from the SIO/2 board.  I began debugging.

I made a couple of discoveries, learning the Z180 operating requirements.

1.  The Z180 has a bank of 64 registers.  To read or write them you must (if you want your code to work) use the Z180 instructions IN0  and OUT0.  The registers actually have 16 bit addresses in the Z180 address space.  The normal IN and OUT instructions put the contents of a CPU reg on the upper 8 bits.  The IN0 and OUT0 force the upper 8 bits to zero, creating a valid 16 bit address to access the registers.
2. The I/O addresses of the 64 register bank default to 0000H to 003FH.  They can be relocated by writing to register 003FH.  If your SIO board uses these addresses, (I had mine set to use 0000H-0003H) there is a conflict.  The register bank can be relocated to any of the 4 blocks of address blocks below.  Be sure to relocate them or change I/O card address.
• 0000H-003FH
• 0040H-007FH
• 0080H-00BFH
• 00C0H-00FFH
3. DRAM Refresh cycles can be turned off in the Z180.  Writing a 0 to register 0036H turns them off.
4. The Z180 has an automatic wait state generator.  It can insert wait states in memory or I/O bus operations.  This is important if the Z180 clock is higher frequency than the system memory or I/O (SIO card) can tolerate.  Writing 1111000b to register 0032H creates the maximum wait states for both kinds of operation.

After these "discoveries" or learnings and adding these instructions the initialization section of my EPROM based debugger, the system works perfectly.  It boots and runs CP/M from a CF Card with no modifications the CP/M.

My next "discovery" will be how to use the Z180 built-in serial ports.

Tom

[Steve Cousins]

Hi Tom

Interesting stuff, thanks for sharing.

I wouldn't mind a look at your initialisation code to clarify your description.

I am wondering if I should add this initialisation to my Monitor ROM so it is Z180 compatible. My source code already has conditional compilation options, so I could easily make it yet another option. The I/O address range the Z180 pinches would also need to be an option I think.

I guess you are moving towards the Z180 SBC you mentioned recently.

Steve

[phillip.stevens]

Interesting stuff, thanks for sharing.

I wouldn't mind a look at your initialisation code to clarify your description.

If you don't mind a bit of additional "discovery" sharing, I've some code that might save you some time.

A Z180 include file, with naming for all the Z180 internal registers.

Also found in z88dk includes for Z180, where it is massaged by m4 for private asm, PUBLIC asm, and C #define.

Also, code to initialise the Z180 and ports, to run the ASCI serial IO, and the PRT for a system tick.

All this similar code is in the z88dk too, but is more fragmented into smaller files that can be individually included into a build.

I am wondering if I should add this initialisation to my Monitor ROM so it is Z180 compatible. My source code already has conditional compilation options, so I could easily make it yet another option. The I/O address range the Z180 pinches would also need to be an option I think.

The main difference you'll encounter is that the Z180 needs to use its own instructions for addressing the internal registers; in0 and out0. These new instructions formalise the Z80 sekret capability, that B is placed on the upper address lines during in and out instructions, and make these two Z80 instructions 16 bit addressed for 64k IO locations.

The new in0 and out0 instructions keep B as zero and are used specifically for Z180 register management.

Bottom line is your compiler needs to know about these two additional Z180 instructions.

TASM does. z80asm in z88dk does. So either of these are useable.

I'm sure other assemblers are Z180 aware too.

 

I guess you are moving towards the Z180 SBC you mentioned recently.

Steve

My next "discovery" will be how to use the Z180 built-in serial ports.

Tom

Good luck with your "discoveries".

I hope this will save some time for you building your Z180 SBC.

Cheers, Phillip

[Steve Cousins]

Hi Phillip

Thanks for all the info and advice.

Looks like making my monitor truly Z180 compatible also means adding support for IN0 and OUT0 instructions in my monitor's assembler and disassembler. The single step feature also needs the disassembler to understand these extra instructions.

Then I'd need to support all that lovely on-board I/O.

A bit more to it than I initially thought, so not something to do right away.

Possibly worth adding an option now to include the initialisation instructions, so at least the monitor can be compiled to run on a Z180 without I/O address conflicts. 

Steve

[Tom Szolyga]

Hi Steve,

The init code for the Z180 is simple, just 3 commands.  They are:

          LD       A,00000000b      ; Turn off Z180 Refresh cycles

          OUT0  (36H),A

          LD       A,11110000b      ; Maximum wait states for Memroy and IO

          OUT0  (32H),A

          LD       A,01000000b      ; Reloc Z180 internal regs

          OUT0  (3FH),A               ;    to 40H-7FH I/O addresses

The internal registers can be relocated to 4 I/O address blocks by loading A with other values:

          LD       A,01000000b      ; Reloc Z180 internal regs to 40H-7FH

          LD       A,10000000b      ; Reloc Z180 internal regs to 80H-BFH

          LD       A,11000000b      ; Reloc Z180 internal regs to C0H-FFH

          LD       A,00000000b      ; Reloc Z180 internal regs to 00H-3FH - default after reset

Tom

[Steve Cousins]

Thanks Tom

I think I'll put an option in my Monitor source to include these instructions.

Hope you have fun learning more about the Z180.

Steve