Sord M5 Galax

[Mark T]

After fixing the CTC card I couldn't wait until tomorrow to see if any of the Sord M5 roms would run. I cleared the ram from 0 to 7FFF to FF, then loaded galax.rom at 2000 and sordjap.ic21 at 0000, set write protect on 0 to 1FFF, hit reset and surprise it almost works.

No controller or keyboard yet, but connecting R1 with C0 or C1 on the keyboard interface starts the game running.

I think I need to undo some of the wire mods to my TMS9918A card, after changing the TMS9918 to TMS9918A I don't think it needs a delay on CAS and might explain a few artifacts in the sprites and characters. I'll probably build up a new card without mods and maybe a trimmer cap on the crystal.

It seems no mods are needed to the rom files.

TMS9918A needs to be at 0x10, CTC at 0x00, SN76489 card at 0x20, Keypad/joypad at 0x40 and reset input at 0x50h(part of the keyboard card). Z80 running at 3.57MHz. Two links needed between TMS9918A and CTC, TMS9918A GROMCLK to CTC trigger 2 and TMS9918A INT to CTC trigger 3 and isolate TMS9918A INT from Z80 INT.

I've loaded the rom data into battery backed ram using toggle switch bootloader and PIC USB interface, but it should be possible to run from ram on an RC2014 under ROMWBW, perhaps with a cpm utility to load the rom data to the correct locations. TMS9918A at 0x10 will clash with the standard compact flash module.

Mark

[Steve Cousins]

Nice, very nice.

[Conrad Larsen]

Hi

Well done Mark look great!

[Mark T]

I built up a new pcb using TMS9918A and TMS4464-10 without track cuts and wire mods for the 74LS14 or capacitor on the /CAS line.

It seems to work OK on initial power up but something is still not quite right and starts to show strange bit maps for some sprites and characters after about 10 to 15 minutes. Either timing of signal to dram or possibly logic level mismatch.

Tried 10K pull up resistors on RD0-7 just in case the TMS9918A didn't like floating inputs when the 4464-10 outputs are tristate.

Tried pull up 20K pull up resistors on AD0-7, as TMS9918A VOH minimum of 2.4v and TMS4464-10 VIH minimum of 2.4v leaves no noise margin.

I realised then that the time between the end of the write signal and beginning of CAS for the next cycle is a lot shorter than it looks in the TMS9918A timing diagram, minimum is 25 ns, so if the end of the write signal is extended by more than 25ns the next cycle will write invalid data, as an early write cycle. Using a 74LS00 should delay the end of the write cycle by two gate delays, typical would be 20ns but maximum would be 40ns.

With 74LS00, to ensure the outputs of the data buffer are still tristate before the outputs of the 4464-10 are disabled requires using 74LS245 for the data buffer. Then from enabling the 74LS245 to the start of the write enable to the ram is only two gate delays between 20ns and 40ns while the propagation delay of the 74LS245 is typically 27ns and max of 40ns.

Maybe I can get the timing correct if I add an additional OR gate, 74LS32, to terminate the write signal to the ram as early as possible.

Or maybe its time to give up and use SRAM or try and get a TMS9128 that is intended to work with DRAM that supports early write and common input and outputs.