6850 vs 68b50

[Doug Jackson]

WOW.

I have started building my own RC2014 system, and am really confused.

I have a couple of  6850's, and know from its data sheet that it is designed to be operated at 1Mhz max - even the 68B50 is designed for 2Mhz at best.,

Are we really overclocking the B series chips at 7.8 Mhz instead on 2Mhz?

I ask because I only have 6850's and have just had to order 68B50's.

 

Kindest regards,

Doug Jackson

em: do...@doughq.com

ph: 0414 986878

[Spencer Owen]

Hi Doug,

Yes, the 68B50 runs fine at 7.3728MHz.  I have chips here that have run flawlessly for several hundreds of hours, and cumulatively amongst all the RC2014 Classic, Mini and Micro kits out there, it probably totals tens or hundreds of thousands of hours.

The 6850, however, won't run at this speed.  Well, maybe some will, but probably not reliably or for long.  They are, however, quite happy at half the speed (ie 3.6864MHz) but you'll have to drop the serial baud rate down to 57,600 though.

Cheers

Spencer

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[Bill Shen]

Doug,
Some members have ran their 68B50 to 20MHz.  I've successfully ran SIO/2 to 29.5MHz.  In all likelihood your RC2014 can run at 14.7456MHz by just changing out the oscillator and raise serial baud to 230400.
  Bill

[Mike, K8LH]

Does anyone know the frequency the 68x50 actually sees on its 'E' pin when installed in the 7.3728-MHz RC2014 system?

[Alan Cox]

I have a couple of  6850's, and know from its data sheet that it is designed to be operated at 1Mhz max - even the 68B50 is designed for 2Mhz at best.,

Are we really overclocking the B series chips at 7.8 Mhz instead on 2Mhz?

No - this is a common misconception.

The 68B50 is designed to run with a 2MHz 680x/68HC11 part using the Motorola bus not the rather messier Intel/Zilog one. On those systems the bus is controlled by an 'E' clock that has a half cycle where the signals change and a half cycle where the signals are valid. At 2MHz the part has that half cycle to respond (250ns) from when the signals are stable and it gets the E edge.

On a Z80 system there is no equivalent to the synchronous E clock, instead things happen over multiple CPU clocks. You fake it using the Z80 IORQ line.  The Z80 IORQ line and the bus are valid for multiple Z80 I/O clock cycles (about 2.5) so about 400ns. Thus you are not overclocking the part in fact you are well within it's specification because the Z80 applies a mandatory wait state to all I/O cycles.

A lot of it is actually merely how the clocks are measured. A 2MHz 6803 is in fact clocked at 8MHz but Motorola used the rather more honest bus cycle time for their description of the 680x parts. Thus a 6803 at 8MHz does various things internally over 4 input clocks but the external interface is a synchronous 2MHz cycle, whilst the Z80 is exactly the same but the transactions occur in steps over multiple external CPU clocks.

Both bus designs have advantages, the synchronous clock and the fact the CPU uses the bus every half cycle only means that 680x and 6502 machines are much much easier to multiplex with video and parts like the 6845/6847 without memory contention. It's also a convenient internal clock for I/O devices. The Z80 style bus doesn't have everything tied to a fixed cycle length which means things can be different numbers of cpu clocks long, some signals are defined and stable earlier, and it also doesn't have to deal with cycles where the CPU is not using the bus but must put something on the lines.

Later parts like the 68HC11 followed the same model but by then clock was a marketing term so they list the input clock like everyone else - all of which is completely misleading for performance as well. The 6502 uses the Motorola type bus but has an input clock that skewed is the E clock as the magic inside is different.

The Z80 IORQ hack is also why the RC2014 68B50 card doesn't work with non Zilog CPU cards. You have to modify it slightly to use the E clock as the designers intended.

B (2MHz) was the highest speed offered by Motorola, so I suspect the reason many 68B50 parts work at far higher speeds is that when they were binned they were binned for fail, 1MHz, 1.5MHz, and 2MHz or faster. Most "6850" would thus have been binned as such because they couldn't make 1.5MHz E clock.

Alan